/** @brief Notify FSP for ReadyToBoot * * @param unused */ static void fsp_finalize(void *unused) { printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseReadyToBoot)\n"); print_fsp_info(); post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE); FspNotify(EnumInitPhaseReadyToBoot); printk(BIOS_DEBUG, "Returned from FspNotify(EnumInitPhaseReadyToBoot)\n"); }
static void fsp_run_silicon_init(int is_s3_wakeup) { FSP_INFO_HEADER *fsp_info_header; FSP_SILICON_INIT fsp_silicon_init; SILICON_INIT_UPD *original_params; SILICON_INIT_UPD silicon_init_params; EFI_STATUS status; UPD_DATA_REGION *upd_ptr; VPD_DATA_REGION *vpd_ptr; /* Find the FSP image */ fsp_info_header = fsp_get_fih(); if (fsp_info_header == NULL) { printk(BIOS_ERR, "FSP_INFO_HEADER not set!\n"); return; } print_fsp_info(fsp_info_header); /* Initialize the UPD values */ vpd_ptr = (VPD_DATA_REGION *)(fsp_info_header->CfgRegionOffset + fsp_info_header->ImageBase); printk(BIOS_DEBUG, "0x%p: VPD Data\n", vpd_ptr); upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset + fsp_info_header->ImageBase); printk(BIOS_DEBUG, "0x%p: UPD Data\n", upd_ptr); original_params = (void *)((u8 *)upd_ptr + upd_ptr->SiliconInitUpdOffset); memcpy(&silicon_init_params, original_params, sizeof(silicon_init_params)); soc_silicon_init_params(&silicon_init_params); /* Locate VBT and pass to FSP GOP */ if (IS_ENABLED(CONFIG_GOP_SUPPORT)) load_vbt(is_s3_wakeup, &silicon_init_params); mainboard_silicon_init_params(&silicon_init_params); /* Display the UPD data */ if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA)) soc_display_silicon_init_params(original_params, &silicon_init_params); /* Perform silicon initialization after RAM is configured */ printk(BIOS_DEBUG, "Calling FspSiliconInit\n"); fsp_silicon_init = (FSP_SILICON_INIT)(fsp_info_header->ImageBase + fsp_info_header->FspSiliconInitEntryOffset); timestamp_add_now(TS_FSP_SILICON_INIT_START); printk(BIOS_DEBUG, "Calling FspSiliconInit(0x%p) at 0x%p\n", &silicon_init_params, fsp_silicon_init); status = fsp_silicon_init(&silicon_init_params); timestamp_add_now(TS_FSP_SILICON_INIT_END); printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status); display_hob_info(fsp_info_header); soc_after_silicon_init(); }
asmlinkage void *romstage_main(FSP_INFO_HEADER *fih) { void *top_of_stack; struct pei_data pei_data; struct romstage_params params = { .pei_data = &pei_data, .chipset_context = fih, }; post_code(0x30); timestamp_add_now(TS_START_ROMSTAGE); /* Load microcode before RAM init */ if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS)) intel_update_microcode_from_cbfs(); memset(&pei_data, 0, sizeof(pei_data)); /* Display parameters */ printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n", CONFIG_MMCONF_BASE_ADDRESS); printk(BIOS_INFO, "Using FSP 1.1\n"); /* Display FSP banner */ print_fsp_info(fih); /* Stash FSP version. */ params.fsp_version = fsp_version(fih); /* Get power state */ params.power_state = fill_power_state(); /* * Read and print board version. Done after SOC romstage * in case PCH needs to be configured to talk to the EC. */ if (IS_ENABLED(CONFIG_BOARD_ID_AUTO)) printk(BIOS_INFO, "MLB: board version %d\n", board_id()); /* Call into mainboard. */ mainboard_romstage_entry(¶ms); soc_after_ram_init(¶ms); post_code(0x38); top_of_stack = setup_stack_and_mtrrs(); printk(BIOS_DEBUG, "Calling FspTempRamExit API\n"); timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_START); return top_of_stack; }
static void nc_enable(device_t dev) { print_fsp_info(); }
static void fsp_run_silicon_init(int is_s3_wakeup) { FSP_INFO_HEADER *fsp_info_header; FSP_SILICON_INIT fsp_silicon_init; SILICON_INIT_UPD *original_params; SILICON_INIT_UPD silicon_init_params; EFI_STATUS status; UPD_DATA_REGION *upd_ptr; VPD_DATA_REGION *vpd_ptr; /* Find the FSP image */ fsp_info_header = fsp_get_fih(); if (fsp_info_header == NULL) { printk(BIOS_ERR, "FSP_INFO_HEADER not set!\n"); return; } print_fsp_info(fsp_info_header); /* Initialize the UPD values */ vpd_ptr = (VPD_DATA_REGION *)(fsp_info_header->CfgRegionOffset + fsp_info_header->ImageBase); printk(BIOS_DEBUG, "0x%p: VPD Data\n", vpd_ptr); upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset + fsp_info_header->ImageBase); printk(BIOS_DEBUG, "0x%p: UPD Data\n", upd_ptr); original_params = (void *)((u8 *)upd_ptr + upd_ptr->SiliconInitUpdOffset); memcpy(&silicon_init_params, original_params, sizeof(silicon_init_params)); soc_silicon_init_params(&silicon_init_params); /* Locate VBT and pass to FSP GOP */ if (IS_ENABLED(CONFIG_GOP_SUPPORT)) load_vbt(is_s3_wakeup, &silicon_init_params); mainboard_silicon_init_params(&silicon_init_params); /* Display the UPD data */ if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA)) soc_display_silicon_init_params(original_params, &silicon_init_params); /* Perform silicon initialization after RAM is configured */ printk(BIOS_DEBUG, "Calling FspSiliconInit\n"); fsp_silicon_init = (FSP_SILICON_INIT)(fsp_info_header->ImageBase + fsp_info_header->FspSiliconInitEntryOffset); timestamp_add_now(TS_FSP_SILICON_INIT_START); printk(BIOS_DEBUG, "Calling FspSiliconInit(0x%p) at 0x%p\n", &silicon_init_params, fsp_silicon_init); status = fsp_silicon_init(&silicon_init_params); timestamp_add_now(TS_FSP_SILICON_INIT_END); printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status); #if IS_ENABLED(CONFIG_DISPLAY_HOBS) /* Verify the HOBs */ const EFI_GUID graphics_info_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID; void *hob_list_ptr = get_hob_list(); int missing_hob = 0; if (hob_list_ptr == NULL) die("ERROR - HOB pointer is NULL!\n"); print_hob_type_structure(0, hob_list_ptr); /* * Verify that FSP is generating the required HOBs: * 7.1: FSP_BOOTLOADER_TEMP_MEMORY_HOB only produced for FSP 1.0 * 7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB verified by raminit * 7.3: FSP_NON_VOLATILE_STORAGE_HOB verified by raminit * 7.4: FSP_BOOTLOADER_TOLUM_HOB verified by raminit * 7.5: EFI_PEI_GRAPHICS_INFO_HOB verified below, * if the ImageAttribute bit is set * FSP_SMBIOS_MEMORY_INFO HOB verified by raminit */ if ((fsp_info_header->ImageAttribute & GRAPHICS_SUPPORT_BIT) && !get_next_guid_hob(&graphics_info_guid, hob_list_ptr)) { printk(BIOS_ERR, "7.5: EFI_PEI_GRAPHICS_INFO_HOB missing!\n"); missing_hob = 1; } if (missing_hob) die("ERROR - Missing one or more required FSP HOBs!\n"); #endif soc_after_silicon_init(); }