int main() { // capture any reset reason G_reset_source = MCUSR; // clear the status register by writing ones // (odd, I know, but that is how it is done) MCUSR = 0x1F; // Display on the LCD that serial connection is needed print("Waiting for"); lcd_goto_xy(0, 1); print(" serial conn..."); // This init will block if no serial connection present // so user sees message on LCD to make a connection init_interface(); // Display the user interface over the serial usb // connection serial_check(); print_reset_reason(); print_usb("Welcome to lab 3!\r\n", 19); print_usage(); print_prompt(); // clear "Waiting for connection" message from the LCD clear(); // turn on interrupts sei(); init_motor(); init_encoder(); // set controller for 1000 Hz init_controller_w_rate(50); while (1) { serial_check(); check_for_new_bytes_received(); } return 0; }
void stm32_boardinitialize(void) { #ifdef BOARD_HAS_BOOTLOADER /* Check if IWDG is enabled by bootloader. This is the case when * CONFIG_BOOTLOADER_NOWD_BKREG has lowest bit cleared. */ if ((getreg32(CONFIG_BOOTLOADER_NOWD_BKREG) & 1) == 0) { int i; /* Bootloader has enabled IWDG. This happens after POR-reset (since * backup-registers have been reset to zero) and after firmware update. * * Disabling IWDG is used as early boot firmware check (new firmware * started). We now enable NOWD flag and do reset loop with ADDR value * set to application firmware. * * If firmware does not manage to do early boot and gets stuck, IWDG will * reset device and bootloader will either attempt to flash backup * firmware or will reset loop by IWDG until 'current boot try count' * reaches threshold and bootloader boots device to DFU-mode. */ for (i = 0; i < 4; i++) up_lowputc('>'); /* Enable BKREG writing. */ stm32_pwr_enablebkp(true); /* Make bootloader disable IWDG. */ putreg32(1, CONFIG_BOOTLOADER_NOWD_BKREG); /* Setup bootloader to jump directly to firmware. */ putreg32(BOARD_FIRMWARE_BASE_ADDR, CONFIG_BOOTLOADER_ADDR_BKREG); /* Disable BKREG writing. */ stm32_pwr_enablebkp(false); /* Do system reset. */ board_systemreset(); } #endif /* BOARD_HAS_BOOTLOADER */ #if defined(CONFIG_ASSERT_COUNT_BKREG) /* Check value of assert counter (note: does not enable/disable BKREG access * with argument==0). */ if (up_add_assert_count(0) >= CONFIG_ASSERT_COUNT_TO_DFU_MODE) { const char *str = "\nToo many ASSERT resets; something wrong with software. Forcing DFU mode!\n"; while (*str) up_lowputc(*str++); up_mdelay(500); up_reset_to_system_bootloader(); } #endif /* Setup GPIOs based on HW version. */ up_configure_dynamic_gpios(); /* Configure MCU so that debugging is possible in idle modes. */ #ifdef CONFIG_STM32_KEEP_CORE_CLOCK_ENABLED_IN_IDLE_MODES uint32_t cr = getreg32(STM32_DBGMCU_CR); cr |= DBGMCU_CR_STANDBY | DBGMCU_CR_STOP | DBGMCU_CR_SLEEP; putreg32(cr, STM32_DBGMCU_CR); #endif #ifdef CONFIG_BOARD_MCO_SYSCLK /* Output SYSCLK to MCO pin for clock measurements. */ stm32_configgpio(GPIO_MCO); stm32_mcodivconfig(RCC_CFGR_MCOSEL_SYSCLK, RCC_CFGR_MCOPRE_DIV4); #endif /* Configure on-board LEDs if LED support has been selected. */ #ifdef CONFIG_ARCH_LEDS board_led_initialize(); #endif /* Configure chip-select pins. */ board_initialize_chipselects(); /* Configure SDcard pins (needs to be after chip-select init, to pull SDcard * CS down). */ gpio_initialize_sdcard_pins(); /* Configure power control pins. */ board_initialize_pwrctl_pins(); /* Initialize modem gpios. */ up_modem_initialize_gpios(); /* Initialize unused gpio pads. */ gpio_initialize_unused_pads(); /* Enable BKREG writing. */ stm32_pwr_enablebkp(true); /* Reset 'current boot try count' for bootloader. */ putreg32(0, CONFIG_BOOTLOADER_CBTC_BKREG); /* Make bootloader disable IWDG. */ putreg32(1, CONFIG_BOOTLOADER_NOWD_BKREG); /* Check if we need to enter standby/power-off mode. */ up_boot_standby_mode(); /* Disable BKREG writing. */ stm32_pwr_enablebkp(false); /* Force enable capsense and 9-axis for duration * of I2C initialization. After bus initialization * is done, this is undone and drivers will take care * of requesting power for themselves. */ board_pwrctl_get(PWRCTL_SWITCH_CAPSENSE_SENSOR); board_pwrctl_get(PWRCTL_SWITCH_9AXIS_INERTIAL_SENSOR); /* Flash mass-erase can leave option-bytes is bad shape, restore defaults if * needed. */ up_check_and_restore_valid_optionbytes(); /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function * stm32_spiinitialize() has been brought into the link. */ #if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) if (stm32_spiinitialize) { stm32_spiinitialize(); } #endif /* Give early information about reset reason. */ print_reset_reason(); }