static void prvSetupEMACHardware( void ) { unsigned short us; long x, lDummy; /* Enable P1 Ethernet Pins. */ PINCON->PINSEL2 = emacPINSEL2_VALUE; PINCON->PINSEL3 = ( PINCON->PINSEL3 & ~0x0000000F ) | 0x00000005; /* Power Up the EMAC controller. */ SC->PCONP |= PCONP_PCENET; vTaskDelay( emacSHORT_DELAY ); /* Reset all EMAC internal modules. */ EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES; EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM; /* A short delay after reset. */ vTaskDelay( emacSHORT_DELAY ); /* Initialize MAC control registers. */ EMAC->MAC1 = MAC1_PASS_ALL; EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN; EMAC->MAXF = ETH_MAX_FLEN; EMAC->CLRT = CLRT_DEF; EMAC->IPGR = IPGR_DEF; EMAC->MCFG = emacDIV_44; /* Enable Reduced MII interface. */ EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM; /* Reset Reduced MII Logic. */ EMAC->SUPP = SUPP_RES_RMII; vTaskDelay( emacSHORT_DELAY ); EMAC->SUPP = 0; /* Put the PHY in reset mode */ prvWritePHY( PHY_REG_BMCR, MCFG_RES_MII ); prvWritePHY( PHY_REG_BMCR, MCFG_RES_MII ); /* Wait for hardware reset to end. */ for( x = 0; x < 100; x++ ) { vTaskDelay( emacSHORT_DELAY * 5 ); us = prvReadPHY( PHY_REG_BMCR, &lDummy ); if( !( us & MCFG_RES_MII ) ) { /* Reset complete */ break; } } }
static void prvConfigurePHY( void ) { unsigned short us; long x, lDummy; /* Auto negotiate the configuration. */ if( prvWritePHY( PHY_REG_BMCR, PHY_AUTO_NEG ) ) { vTaskDelay( emacSHORT_DELAY * 5 ); for( x = 0; x < 10; x++ ) { us = prvReadPHY( PHY_REG_BMSR, &lDummy ); if( us & PHY_AUTO_NEG_COMPLETE ) { break; } vTaskDelay( emacWAIT_FOR_LINK_TO_ESTABLISH ); } } }