static void trace_file_output(ErlDrvData handle, char *buff,
ErlDrvSizeT bufflen)
{
int heavy = 0;
TraceFileData *data = (TraceFileData *) handle;
unsigned char b[5] = "";
put_be((unsigned) bufflen, b + 1);
switch (my_write(data, (unsigned char *) b, sizeof(b))) {
case 1:
heavy = !0;
case 0:
switch (my_write(data, (unsigned char *) buff, bufflen)) {
case 1:
heavy = !0;
case 0:
break;
case -1:
driver_failure_posix(data->port, errno); /* XXX */
return;
}
break;
case -1:
driver_failure_posix(data->port, errno); /* XXX */
return;
}
if (data->wrap) {
TraceFileWrapData *wrap = data->wrap;
/* Size limited wrapping log files */
wrap->len += sizeof(b) + bufflen;
if (wrap->time == 0 && wrap->len >= wrap->size) {
if (wrap_file(data) < 0) {
driver_failure_posix(data->port, errno); /* XXX */
return;
}
heavy = !0;
}
}
if (heavy) {
set_port_control_flags(data->port, PORT_CONTROL_FLAG_HEAVY);
}
}
inline void put64be(char*& s, uint64_t n) { put_be(s, n); }
inline void put32be(char*& s, uint32_t n) { put_be(s, n); }
inline void put16be(char*& s, uint16_t n) { put_be(s, n); }
inline void put8 (char*& s, uint8_t n ) { put_be(s, n); }
int
sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
{
size_t size;
DI val;
check_desc (sd);
if (!check_regno (regno))
return 0;
size = reg_size (regno);
if (length != size)
return 0;
switch (regno)
{
case sim_rx_r0_regnum:
val = get_reg (0);
break;
case sim_rx_r1_regnum:
val = get_reg (1);
break;
case sim_rx_r2_regnum:
val = get_reg (2);
break;
case sim_rx_r3_regnum:
val = get_reg (3);
break;
case sim_rx_r4_regnum:
val = get_reg (4);
break;
case sim_rx_r5_regnum:
val = get_reg (5);
break;
case sim_rx_r6_regnum:
val = get_reg (6);
break;
case sim_rx_r7_regnum:
val = get_reg (7);
break;
case sim_rx_r8_regnum:
val = get_reg (8);
break;
case sim_rx_r9_regnum:
val = get_reg (9);
break;
case sim_rx_r10_regnum:
val = get_reg (10);
break;
case sim_rx_r11_regnum:
val = get_reg (11);
break;
case sim_rx_r12_regnum:
val = get_reg (12);
break;
case sim_rx_r13_regnum:
val = get_reg (13);
break;
case sim_rx_r14_regnum:
val = get_reg (14);
break;
case sim_rx_r15_regnum:
val = get_reg (15);
break;
case sim_rx_isp_regnum:
val = get_reg (isp);
break;
case sim_rx_usp_regnum:
val = get_reg (usp);
break;
case sim_rx_intb_regnum:
val = get_reg (intb);
break;
case sim_rx_pc_regnum:
val = get_reg (pc);
break;
case sim_rx_ps_regnum:
val = get_reg (psw);
break;
case sim_rx_bpc_regnum:
val = get_reg (bpc);
break;
case sim_rx_bpsw_regnum:
val = get_reg (bpsw);
break;
case sim_rx_fintv_regnum:
val = get_reg (fintv);
break;
case sim_rx_fpsw_regnum:
val = get_reg (fpsw);
break;
case sim_rx_acc_regnum:
val = ((DI) get_reg (acchi) << 32) | get_reg (acclo);
break;
default:
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
regno);
return -1;
}
if (rx_big_endian)
put_be (buf, length, val);
else
put_le (buf, length, val);
return size;
}
inline void put64be(Ch*& s, uint64_t n) { put_be(s, n); }
inline void put32be(Ch*& s, uint32_t n) { put_be(s, n); }
inline void put16be(Ch*& s, uint16_t n) { put_be(s, n); }
inline void put8 (Ch*& s, uint8_t n ) { put_be(s, n); }
