Exemple #1
0
static pwmPortData_t *pwmInConfig(uint8_t port, pwmCallbackPtr callback, uint8_t channel)
{
    pwmPortData_t *p = &pwmPorts[port];
    pwmTimeBase(timerHardware[port].tim, 0xFFFF);
    pwmGPIOConfig(timerHardware[port].gpio, timerHardware[port].pin, 1);
    pwmICConfig(timerHardware[port].tim, timerHardware[port].channel, TIM_ICPolarity_Rising);
    TIM_Cmd(timerHardware[port].tim, ENABLE);
    pwmNVICConfig(timerHardware[port].irq);
    // set callback before configuring interrupts
    p->callback = callback;
    p->channel = channel;

    switch (timerHardware[port].channel) {
        case TIM_Channel_1:
            TIM_ITConfig(timerHardware[port].tim, TIM_IT_CC1, ENABLE);
            break;
        case TIM_Channel_2:
            TIM_ITConfig(timerHardware[port].tim, TIM_IT_CC2, ENABLE);
            break;
        case TIM_Channel_3:
            TIM_ITConfig(timerHardware[port].tim, TIM_IT_CC3, ENABLE);
            break;
        case TIM_Channel_4:
            TIM_ITConfig(timerHardware[port].tim, TIM_IT_CC4, ENABLE);
            break;
    }
    return p;
}
Exemple #2
0
static pwmPortData_t *pwmOutConfig(uint8_t port, uint16_t period, uint16_t value)
{
    pwmPortData_t *p = &pwmPorts[port];
    pwmTimeBase(timerHardware[port].tim, period);
    pwmGPIOConfig(timerHardware[port].gpio, timerHardware[port].pin, 0);
    pwmOCConfig(timerHardware[port].tim, timerHardware[port].channel, value);
    // Needed only on TIM1
    if (timerHardware[port].outputEnable)
        TIM_CtrlPWMOutputs(timerHardware[port].tim, ENABLE);
    TIM_Cmd(timerHardware[port].tim, ENABLE);

    switch (timerHardware[port].channel) {
        case TIM_Channel_1:
            p->ccr = &timerHardware[port].tim->CCR1;
            break;
        case TIM_Channel_2:
            p->ccr = &timerHardware[port].tim->CCR2;
            break;
        case TIM_Channel_3:
            p->ccr = &timerHardware[port].tim->CCR3;
            break;
        case TIM_Channel_4:
            p->ccr = &timerHardware[port].tim->CCR4;
            break;
    }
    return p;
}
Exemple #3
0
// note - assumes all timer clocks have been enable during system startup
pwmPortStruct_t *pwmInitOut(uint8_t pwmPort, uint32_t period, uint32_t inititalValue) {
    pwmPortStruct_t *p = 0;

    if (pwmValidatePort(pwmPort, period)) {
	p = &pwmData[pwmPort];
	p->direction = PWM_OUTPUT;

	pwmTimeBase(pwmTimers[pwmPort], period, pwmClocks[pwmPort] / PWM_PRESCALE);

	pwmOCInit(pwmTimers[pwmPort], pwmTimerChannels[pwmPort], inititalValue);
	if (pwmBDTRs[pwmPort])
	    pwmBDTRInit(pwmTimers[pwmPort]);

	TIM_Cmd((TIM_TypeDef *)pwmTimers[pwmPort], ENABLE);

	switch (pwmTimerChannels[pwmPort]) {
	    case TIM_Channel_1:
		p->ccr = (volatile uint32_t *)&pwmTimers[pwmPort]->CCR1;
		TIM_OC1PreloadConfig((TIM_TypeDef *)pwmTimers[pwmPort], TIM_OCPreload_Enable);
		break;
	    case TIM_Channel_2:
		p->ccr = (volatile uint32_t *)&pwmTimers[pwmPort]->CCR2;
		TIM_OC2PreloadConfig((TIM_TypeDef *)pwmTimers[pwmPort], TIM_OCPreload_Enable);
		break;
	    case TIM_Channel_3:
		p->ccr = (volatile uint32_t *)&pwmTimers[pwmPort]->CCR3;
		TIM_OC3PreloadConfig((TIM_TypeDef *)pwmTimers[pwmPort], TIM_OCPreload_Enable);
		break;
	    case TIM_Channel_4:
		p->ccr = (volatile uint32_t *)&pwmTimers[pwmPort]->CCR4;
		TIM_OC4PreloadConfig((TIM_TypeDef *)pwmTimers[pwmPort], TIM_OCPreload_Enable);
		break;
	}

	p->cnt = (volatile uint32_t *)&pwmTimers[pwmPort]->CNT;

	// finally allow the timer access to the port
	GPIO_PinAFConfig((GPIO_TypeDef *)pwmPorts[pwmPort], pwmPinSources[pwmPort], pwmAFs[pwmPort]);
	pwmGPIOInit(pwmPorts[pwmPort], pwmPins[pwmPort], GPIO_Mode_AF);
    }

    return p;
}
Exemple #4
0
pwmPortStruct_t *pwmInitIn(uint8_t pwmPort, int16_t polarity, uint32_t period, pwmCallback_t callback) {
    pwmPortStruct_t *p = 0;

    if (pwmValidatePort(pwmPort, 0) && callback) {
	p = &pwmData[pwmPort];
    	p->direction = PWM_INPUT;
	p->callback = callback;

	pwmTimeBase(pwmTimers[pwmPort], period, pwmClocks[pwmPort] / 1000000);

	pwmGPIOInit(pwmPorts[pwmPort], pwmPins[pwmPort], GPIO_Mode_AF);
	GPIO_PinAFConfig((GPIO_TypeDef *)pwmPorts[pwmPort], pwmPinSources[pwmPort], pwmAFs[pwmPort]);

	polarity = (polarity > 0) ? TIM_ICPolarity_Rising : ((polarity < 0) ? TIM_ICPolarity_Falling : TIM_ICPolarity_BothEdge);

	pwmICInit(pwmTimers[pwmPort], pwmTimerChannels[pwmPort], (uint16_t)polarity);

	TIM_Cmd((TIM_TypeDef *)pwmTimers[pwmPort], ENABLE);

	pwmNVICInit(pwmIcIrqChannels[pwmPort]);

	switch (pwmTimerChannels[pwmPort]) {
	    case TIM_Channel_1:
		TIM_ITConfig((TIM_TypeDef *)pwmTimers[pwmPort], TIM_IT_CC1, ENABLE);
		break;
	    case TIM_Channel_2:
		TIM_ITConfig((TIM_TypeDef *)pwmTimers[pwmPort], TIM_IT_CC2, ENABLE);
		break;
	    case TIM_Channel_3:
		TIM_ITConfig((TIM_TypeDef *)pwmTimers[pwmPort], TIM_IT_CC3, ENABLE);
		break;
	    case TIM_Channel_4:
		TIM_ITConfig((TIM_TypeDef *)pwmTimers[pwmPort], TIM_IT_CC4, ENABLE);
		break;
	}
    }

    return p;
}