static void
pxaohci_power(int why, void *arg)
{
struct pxaohci_softc *sc = (struct pxaohci_softc *)arg;
int s;
s = splhardusb();
sc->sc.sc_bus.ub_usepolling++;
switch (why) {
case PWR_STANDBY:
case PWR_SUSPEND:
#if 0
ohci_power(why, &sc->sc);
#endif
pxa2x0_clkman_config(CKEN_USBHC, 0);
break;
case PWR_RESUME:
pxa2x0_clkman_config(CKEN_USBHC, 1);
pxaohci_enable(sc);
#if 0
ohci_power(why, &sc->sc);
#endif
break;
}
sc->sc.sc_bus.ub_usepolling--;
splx(s);
}
/*
* Initialize the dedicated SSP unit and disable all chip selects.
* This function is called with interrupts disabled.
*/
static void
wzero3ssp_init(struct wzero3ssp_softc *sc)
{
if (sc->sc_model->sspaddr == PXA2X0_SSP1_BASE)
pxa2x0_clkman_config(CKEN_SSP2, 1);
else if (sc->sc_model->sspaddr == PXA2X0_SSP2_BASE)
pxa2x0_clkman_config(CKEN_SSP3, 1);
bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0);
bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR1, 0);
/* XXX */
if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS003SH)
|| platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS004SH)) {
pxa2x0_gpio_set_function(39/*GPIO_WS003SH_XXX*/,
GPIO_OUT|GPIO_SET);
pxa2x0_gpio_set_function(GPIO_WS003SH_MAX1233_CS,
GPIO_OUT|GPIO_SET);
}
if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS007SH)) {
pxa2x0_gpio_set_function(GPIO_WS007SH_ADS7846_CS,
GPIO_OUT|GPIO_SET);
}
if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS011SH)) {
pxa2x0_gpio_set_function(GPIO_WS011SH_AK4184_CS,
GPIO_OUT|GPIO_SET);
}
}
static void
pxauart_attach(device_t parent, device_t self, void *aux)
{
struct com_softc *sc = device_private(self);
struct pxaip_attach_args *pxa = aux;
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_addr_t iobase;
int cken = 0;
sc->sc_dev = self;
iot = &pxa2x0_a4x_bs_tag; /* XXX: This sucks */
iobase = pxa->pxa_addr;
sc->sc_frequency = PXA2X0_COM_FREQ;
sc->sc_type = COM_TYPE_PXA2x0;
if (com_is_console(iot, iobase, &ioh) == 0 &&
bus_space_map(iot, iobase, pxa->pxa_size, 0, &ioh)) {
aprint_error(": can't map registers\n");
return;
}
COM_INIT_REGS(sc->sc_regs, iot, ioh, iobase);
switch (pxa->pxa_addr) {
case PXA2X0_FFUART_BASE: cken = CKEN_FFUART; break;
case PXA2X0_STUART_BASE: cken = CKEN_STUART; break;
case PXA2X0_BTUART_BASE: cken = CKEN_BTUART; break;
case PXA2X0_HWUART_BASE: cken = CKEN_HWUART; break;
}
pxa2x0_clkman_config(cken, 1);
com_attach_subr(sc);
pxa2x0_intr_establish(pxa->pxa_intr, IPL_SERIAL, comintr, sc);
}
void
pxa2x0_i2c_open(struct pxa2x0_i2c_softc *sc)
{
/* Enable the clock to the standard I2C unit. */
pxa2x0_clkman_config(CKEN_I2C, 1);
}
static int
pxaohci_detach(device_t self, int flags)
{
struct pxaohci_softc *sc = device_private(self);
int error;
error = ohci_detach(&sc->sc, flags);
if (error)
return error;
#if 0
if (sc->sc.sc_powerhook) {
powerhook_disestablish(sc->sc.sc_powerhook);
sc->sc.sc_powerhook = NULL;
}
#endif
if (sc->sc_ih) {
pxa2x0_intr_disestablish(sc->sc_ih);
sc->sc_ih = NULL;
}
pxaohci_disable(sc);
/* stop clock */
pxa2x0_clkman_config(CKEN_USBHC, 0);
if (sc->sc.sc_size) {
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc->sc.sc_size = 0;
}
return 0;
}
int
pxaohci_detach(struct device *self, int flags)
{
struct pxaohci_softc *sc = (struct pxaohci_softc *)self;
int rv;
rv = ohci_detach(self, flags);
if (rv)
return (rv);
if (sc->sc_ih != NULL) {
pxa2x0_intr_disestablish(sc->sc_ih);
sc->sc_ih = NULL;
}
pxaohci_disable(sc);
/* stop clock */
pxa2x0_clkman_config(CKEN_USBHC, 0);
if (sc->sc.sc_size) {
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc->sc.sc_size = 0;
}
return (0);
}
void
pxa2x0_i2s_close(struct pxa2x0_i2s_softc *sc)
{
if (--sc->sc_open == 0) {
pxa2x0_clkman_config(CKEN_I2S, 0);
}
}
void
pxa2x0_i2s_open(struct pxa2x0_i2s_softc *sc)
{
if (sc->sc_open++ == 0) {
pxa2x0_clkman_config(CKEN_I2S, 1);
}
}
void
pxa2x0_i2c_close(struct pxa2x0_i2c_softc *sc)
{
/* Reset and disable the standard I2C unit. */
bus_space_write_4(sc->sc_iot, sc->sc_ioh, I2C_ICR, ICR_UR);
bus_space_write_4(sc->sc_iot, sc->sc_ioh, I2C_ISAR, 0);
delay(1);
pxa2x0_clkman_config(CKEN_I2C, 0);
}
void
consinit(void)
{
static int consinit_called = 0;
uint32_t ckenreg = ioreg_read(VIPER_CLKMAN_VBASE+CLKMAN_CKEN);
#if 0
char *console = CONSDEVNAME;
#endif
if (consinit_called != 0)
return;
consinit_called = 1;
#if NCOM > 0
#ifdef FFUARTCONSOLE
#ifdef KGDB
if (0 == strcmp(kgdb_devname, "ffuart")) {
/* port is reserved for kgdb */
} else
#endif
if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE,
comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) {
#if 0
/* XXX: can't call pxa2x0_clkman_config yet */
pxa2x0_clkman_config(CKEN_FFUART, 1);
#else
ioreg_write(VIPER_CLKMAN_VBASE+CLKMAN_CKEN,
ckenreg|CKEN_FFUART);
#endif
return;
}
#endif /* FFUARTCONSOLE */
#ifdef BTUARTCONSOLE
#ifdef KGDB
if (0 == strcmp(kgdb_devname, "btuart")) {
/* port is reserved for kgdb */
} else
#endif
if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) {
ioreg_write(VIPER_CLKMAN_VBASE+CLKMAN_CKEN,
ckenreg|CKEN_BTUART);
return;
}
#endif /* BTUARTCONSOLE */
/* no console, guess we're flying blind */
#endif /* NCOM */
}
int
pxa2x0_i2c_detach_sub(struct pxa2x0_i2c_softc *sc)
{
if (sc->sc_size != 0) {
bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size);
sc->sc_size = 0;
}
pxa2x0_clkman_config(CKEN_I2C, 0);
return 0;
}
int
pxaohci_activate(struct device *self, int act)
{
struct pxaohci_softc *sc = (struct pxaohci_softc *)self;
switch (act) {
case DVACT_SUSPEND:
sc->sc.sc_bus.use_polling++;
ohci_activate((struct device *)&sc->sc, act);
pxa2x0_clkman_config(CKEN_USBHC, 0);
sc->sc.sc_bus.use_polling--;
break;
case DVACT_RESUME:
sc->sc.sc_bus.use_polling++;
pxa2x0_clkman_config(CKEN_USBHC, 1);
pxaohci_enable(sc);
ohci_activate((struct device *)&sc->sc, act);
sc->sc.sc_bus.use_polling--;
break;
}
return 0;
}
void
pxa2x0_pi2c_open(bus_space_tag_t iot, bus_space_handle_t ioh)
{
u_int32_t rv;
/* Enable the I2C unit, and disable automatic voltage change. */
rv = bus_space_read_4(iot, ioh, POWMAN_PCFR);
bus_space_write_4(iot, ioh, POWMAN_PCFR, rv | PCFR_PI2C_EN);
rv = bus_space_read_4(iot, ioh, POWMAN_PCFR);
bus_space_write_4(iot, ioh, POWMAN_PCFR, rv & ~PCFR_FVC);
delay(1);
/* Enable the clock to the power manager I2C unit. */
pxa2x0_clkman_config(CKEN_PI2C, 1);
delay(1);
}
void
pxa2x0_pi2c_close(bus_space_tag_t iot, bus_space_handle_t ioh)
{
u_int32_t rv;
bus_space_write_4(iot, ioh, POWMAN_PICR, PICR_UR);
bus_space_write_4(iot, ioh, POWMAN_PISAR, 0);
delay(1);
/* Disable the clock to the power manager I2C unit. */
pxa2x0_clkman_config(CKEN_PI2C, 0);
delay(1);
/* Disable the I2C unit, and disable automatic voltage change. */
rv = bus_space_read_4(iot, ioh, POWMAN_PCFR);
bus_space_write_4(iot, ioh, POWMAN_PCFR,
rv & ~(PCFR_PI2C_EN | PCFR_FVC));
delay(1);
}
static int
obioohci_detach(struct device *self, int flags)
{
struct obioohci_softc *sc = (struct obioohci_softc *)self;
int error;
error = ohci_detach(&sc->sc, flags);
if (error)
return error;
if (sc->sc.sc_powerhook) {
powerhook_disestablish(sc->sc.sc_powerhook);
sc->sc.sc_powerhook = NULL;
}
if (sc->sc_ih) {
#ifdef NOTYET
obio_gpio_intr_disestablish(sc->sc_ih);
#endif
sc->sc_ih = NULL;
}
obioohci_disable(sc);
#ifdef NOTYET
/* stop clock */
#ifdef DEBUG
pxa2x0_clkman_config(CKEN_USBHC, 0);
#endif
#endif
if (sc->sc.sc_size) {
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc->sc.sc_size = 0;
}
return 0;
}
static void
pxaohci_attach(device_t parent, device_t self, void *aux)
{
struct pxaohci_softc *sc = device_private(self);
struct pxaip_attach_args *pxa = aux;
#ifdef USB_DEBUG
{
//extern int ohcidebug;
//ohcidebug = 16;
}
#endif
sc->sc.iot = pxa->pxa_iot;
sc->sc.sc_bus.ub_dmatag = pxa->pxa_dmat;
sc->sc.sc_size = 0;
sc->sc_ih = NULL;
sc->sc.sc_dev = self;
sc->sc.sc_bus.ub_hcpriv = sc;
aprint_normal("\n");
aprint_naive("\n");
/* Map I/O space */
if (bus_space_map(sc->sc.iot, pxa->pxa_addr, pxa->pxa_size, 0,
&sc->sc.ioh)) {
aprint_error_dev(sc->sc.sc_dev, "couldn't map memory space\n");
return;
}
sc->sc.sc_size = pxa->pxa_size;
/* XXX copied from ohci_pci.c. needed? */
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
/* start the usb clock */
pxa2x0_clkman_config(CKEN_USBHC, 1);
pxaohci_enable(sc);
/* Disable interrupts, so we don't get any spurious ones. */
bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
OHCI_MIE);
sc->sc_ih = pxa2x0_intr_establish(PXA2X0_INT_USBH1, IPL_USB,
ohci_intr, &sc->sc);
if (sc->sc_ih == NULL) {
aprint_error_dev(sc->sc.sc_dev,
"unable to establish interrupt\n");
goto free_map;
}
strlcpy(sc->sc.sc_vendor, "PXA27x", sizeof(sc->sc.sc_vendor));
int err = ohci_init(&sc->sc);
if (err) {
aprint_error_dev(sc->sc.sc_dev, "init failed, error=%d\n", err);
goto free_intr;
}
#if 0
sc->sc.sc_powerhook = powerhook_establish(device_xname(sc->sc.sc_bus.bdev),
pxaohci_power, sc);
if (sc->sc.sc_powerhook == NULL) {
aprint_error_dev(sc->sc.sc_dev->sc_bus.bdev, "cannot establish powerhook\n");
}
#endif
sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
return;
free_intr:
pxa2x0_intr_disestablish(sc->sc_ih);
sc->sc_ih = NULL;
free_map:
pxaohci_disable(sc);
pxa2x0_clkman_config(CKEN_USBHC, 0);
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc->sc.sc_size = 0;
}
void
pxaohci_attach(struct device *parent, struct device *self, void *aux)
{
struct pxaohci_softc *sc = (struct pxaohci_softc *)self;
struct pxaip_attach_args *pxa = aux;
usbd_status r;
sc->sc.iot = pxa->pxa_iot;
sc->sc.sc_bus.dmatag = pxa->pxa_dmat;
sc->sc_ih = NULL;
sc->sc.sc_size = 0;
/* Map I/O space */
if (bus_space_map(sc->sc.iot, PXA2X0_USBHC_BASE, PXA2X0_USBHC_SIZE, 0,
&sc->sc.ioh)) {
printf(": cannot map mem space\n");
return;
}
sc->sc.sc_size = PXA2X0_USBHC_SIZE;
/* XXX copied from ohci_pci.c. needed? */
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
/* start the usb clock */
pxa2x0_clkman_config(CKEN_USBHC, 1);
pxaohci_enable(sc);
/* Disable interrupts, so we don't get any spurious ones. */
bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
OHCI_MIE);
sc->sc_ih = pxa2x0_intr_establish(PXA2X0_INT_USBH1, IPL_USB,
ohci_intr, &sc->sc, sc->sc.sc_bus.bdev.dv_xname);
if (sc->sc_ih == NULL) {
printf(": unable to establish interrupt\n");
pxaohci_disable(sc);
pxa2x0_clkman_config(CKEN_USBHC, 0);
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc->sc.sc_size = 0;
return;
}
strlcpy(sc->sc.sc_vendor, "PXA27x", sizeof(sc->sc.sc_vendor));
if (ohci_checkrev(&sc->sc) != USBD_NORMAL_COMPLETION)
goto unsupported;
r = ohci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) {
printf("%s: init failed, error=%d\n",
sc->sc.sc_bus.bdev.dv_xname, r);
unsupported:
pxa2x0_intr_disestablish(sc->sc_ih);
sc->sc_ih = NULL;
pxaohci_disable(sc);
pxa2x0_clkman_config(CKEN_USBHC, 0);
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc->sc.sc_size = 0;
return;
}
config_found(self, &sc->sc.sc_bus, usbctlprint);
}
void
pxa2x0_apm_sleep(struct pxa2x0_apm_softc *sc)
{
struct pxa2x0_sleep_data sd;
bus_space_handle_t ost_ioh;
int save;
u_int32_t rv;
ost_ioh = (bus_space_handle_t)0;
if (bus_space_map(sc->sc_iot, PXA2X0_OST_BASE, PXA2X0_OST_SIZE, 0,
&ost_ioh)) {
printf("pxa2x0_apm_sleep: can't map OST\n");
goto out;
}
save = disable_interrupts(I32_bit|F32_bit);
sd.sd_oscr0 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSCR0);
sd.sd_oscr4 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSCR4);
sd.sd_omcr4 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OMCR4);
sd.sd_omcr5 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OMCR5);
sd.sd_osmr0 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSMR0);
sd.sd_osmr1 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSMR1);
sd.sd_osmr2 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSMR2);
sd.sd_osmr3 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSMR3);
sd.sd_osmr4 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSMR4);
sd.sd_osmr5 = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OSMR5);
sd.sd_oier = bus_space_read_4(sc->sc_iot, ost_ioh, OST_OIER);
/* Bring the PXA27x into 416MHz turbo mode. */
if ((cputype & ~CPU_ID_XSCALE_COREREV_MASK) == CPU_ID_PXA27X &&
bus_space_read_4(sc->sc_iot, pxa2x0_clkman_ioh, CLKMAN_CCCR) !=
(CCCR_A | CCCR_TURBO_X2 | CCCR_RUN_X16)) {
#if 0
pxa27x_cpu_speed_high();
#else
#define CLKCFG_T (1<<0) /* turbo */
#define CLKCFG_F (1<<1) /* frequency change */
#define CLKCFG_B (1<<3) /* fast-bus */
pxa27x_frequency_change(CCCR_A | CCCR_TURBO_X2 |
CCCR_RUN_X16, CLKCFG_B | CLKCFG_F | CLKCFG_T,
&pxa2x0_memcfg);
#endif
delay(500000); /* XXX */
}
suspend_again:
/* Clear wake-up status. */
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PEDR,
0xffffffff);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PKSR,
0xffffffff);
/* XXX control battery charging in sleep mode. */
/* XXX schedule RTC alarm to check the battery, or schedule
XXX wake-up shortly before an already programmed alarm? */
pxa27x_run_mode();
#define MDREFR_LOW (MDREFR_C3000 | 0x00b)
pxa27x_fastbus_run_mode(0, MDREFR_LOW);
delay(1);
#if 1
pxa27x_cpu_speed_91();
#else
pxa27x_frequency_change(CCCR_TURBO_X1 | CCCR_RUN_X7, CLKCFG_F,
&pxa2x0_memcfg);
#endif
pxa2x0_pi2c_setvoltage(sc->sc_iot, sc->sc_pm_ioh, PI2C_VOLTAGE_LOW);
sd.sd_gpdr0 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR0);
sd.sd_gpdr1 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR1);
sd.sd_gpdr2 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR2);
sd.sd_gpdr3 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR3);
sd.sd_grer0 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GRER0);
sd.sd_grer1 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GRER1);
sd.sd_grer2 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GRER2);
sd.sd_grer3 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GRER3);
sd.sd_gfer0 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GFER0);
sd.sd_gfer1 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GFER1);
sd.sd_gfer2 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GFER2);
sd.sd_gfer3 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GFER3);
sd.sd_gafr0_l = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR0_L);
sd.sd_gafr1_l = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR1_L);
sd.sd_gafr2_l = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR2_L);
sd.sd_gafr3_l = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR3_L);
sd.sd_gafr0_u = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR0_U);
sd.sd_gafr1_u = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR1_U);
sd.sd_gafr2_u = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR2_U);
sd.sd_gafr3_u = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR3_U);
sd.sd_gplr0 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPLR0);
sd.sd_gplr1 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPLR1);
sd.sd_gplr2 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPLR2);
sd.sd_gplr3 = bus_space_read_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPLR3);
sd.sd_iclr = read_icu(INTCTL_ICLR);
sd.sd_icmr = read_icu(INTCTL_ICMR);
sd.sd_iccr = read_icu(INTCTL_ICCR);
write_icu(INTCTL_ICMR, 0);
sd.sd_mecr = bus_space_read_4(sc->sc_iot, pxa2x0_memctl_ioh,
MEMCTL_MECR);
sd.sd_mcmem0 = bus_space_read_4(sc->sc_iot, pxa2x0_memctl_ioh,
MEMCTL_MCMEM(0));
sd.sd_mcmem1 = bus_space_read_4(sc->sc_iot, pxa2x0_memctl_ioh,
MEMCTL_MCMEM(1));
sd.sd_mcatt0 = bus_space_read_4(sc->sc_iot, pxa2x0_memctl_ioh,
MEMCTL_MCATT(0));
sd.sd_mcatt1 = bus_space_read_4(sc->sc_iot, pxa2x0_memctl_ioh,
MEMCTL_MCATT(1));
sd.sd_mcio0 = bus_space_read_4(sc->sc_iot, pxa2x0_memctl_ioh,
MEMCTL_MCIO(0));
sd.sd_mcio1 = bus_space_read_4(sc->sc_iot, pxa2x0_memctl_ioh,
MEMCTL_MCIO(1));
sd.sd_cken = bus_space_read_4(sc->sc_iot, pxa2x0_clkman_ioh,
CLKMAN_CKEN);
/*
* Stop clocks to all units except to the memory controller, and
* to the keypad controller if it is enabled as a wake-up source.
*/
rv = CKEN_MEM;
if ((sc->sc_wakeon & PXA2X0_WAKEUP_KEYNS_ALL) != 0)
rv |= CKEN_KEY;
bus_space_write_4(sc->sc_iot, pxa2x0_clkman_ioh, CLKMAN_CKEN, rv);
/* Disable nRESET_OUT. */
rv = bus_space_read_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PSLR);
#define PSLR_SL_ROD (1<<20)
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PSLR,
rv | PSLR_SL_ROD);
/* Clear all reset status flags. */
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_RCSR,
RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR);
/* Stop 3/13MHz oscillator; do not float PCMCIA and chip-selects. */
rv = PCFR_OPDE;
if ((cputype & ~CPU_ID_XSCALE_COREREV_MASK) == CPU_ID_PXA27X)
/* Enable nRESET_GPIO as a GPIO reset input. */
rv |= PCFR_GPR_EN;
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PCFR, rv);
/* XXX C3000 */
#define GPIO_G0_STROBE_BIT 0x0f800000
#define GPIO_G1_STROBE_BIT 0x00100000
#define GPIO_G2_STROBE_BIT 0x01000000
#define GPIO_G3_STROBE_BIT 0x00041880
#define GPIO_KEY_STROBE0 88
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR0,
0x00144018);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR1,
0x00ef0000);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR2,
0x0121c000);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR3,
0x00600000);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR0,
0x00144018 & ~GPIO_G0_STROBE_BIT);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR1,
0x00ef0000 & ~GPIO_G1_STROBE_BIT);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR2,
0x0121c000 & ~GPIO_G2_STROBE_BIT);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR3,
0x00600000 & ~GPIO_G3_STROBE_BIT);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PGSR2,
(0x0121c000 & ~GPIO_G2_STROBE_BIT) |
GPIO_BIT(GPIO_KEY_STROBE0));
/* C3000 */
#define GPIO_EXT_BUS_READY 18
pxa2x0_gpio_set_function(GPIO_EXT_BUS_READY, GPIO_SET | GPIO_OUT);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR0, 0xd01c4418);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR1, 0xfcefbd21);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR2, 0x13a5ffff);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR3, 0x01e3e10c);
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PSPR,
(u_int32_t)&pxa2x0_cpu_resume - 0xc0200000 + 0xa0200000);
pxa2x0_cpu_suspend();
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PSPR, 0);
pxa2x0_clkman_config(CKEN_SSP|CKEN_PWM0|CKEN_PWM1, 1);
pxa2x0_clkman_config(CKEN_KEY, 0);
#if 1
/* Clear all GPIO interrupt sources. */
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GEDR0, 0xffffffff);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GEDR1, 0xffffffff);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GEDR2, 0xffffffff);
#endif
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR0, sd.sd_gpdr0);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR1, sd.sd_gpdr1);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR2, sd.sd_gpdr2);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GRER0, sd.sd_grer0);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GRER1, sd.sd_grer1);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GRER2, sd.sd_grer2);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GFER0, sd.sd_gfer0);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GFER1, sd.sd_gfer1);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GFER2, sd.sd_gfer2);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR0_L, sd.sd_gafr0_l);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR1_L, sd.sd_gafr1_l);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR2_L, sd.sd_gafr2_l);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR0_U, sd.sd_gafr0_u);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR1_U, sd.sd_gafr1_u);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR2_U, sd.sd_gafr2_u);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPSR0, sd.sd_gplr0 &
sd.sd_gpdr0);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPSR1, sd.sd_gplr1 &
sd.sd_gpdr1);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPSR2, sd.sd_gplr2 &
sd.sd_gpdr2);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPCR0, ~sd.sd_gplr0 &
sd.sd_gpdr0);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPCR1, ~sd.sd_gplr1 &
sd.sd_gpdr1);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPCR2, ~sd.sd_gplr2 &
sd.sd_gpdr2);
/* PXA27x */
#if 0
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GEDR3, 0xffffffff);
#endif
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPDR3, sd.sd_gpdr3);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GRER3, sd.sd_grer3);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GFER3, sd.sd_gfer3);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR3_L, sd.sd_gafr3_l);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GAFR3_U, sd.sd_gafr3_u);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPSR3, sd.sd_gplr3 &
sd.sd_gpdr3);
bus_space_write_4(sc->sc_iot, pxa2x0_gpio_ioh, GPIO_GPCR3, ~sd.sd_gplr3 &
sd.sd_gpdr3);
bus_space_write_4(sc->sc_iot, pxa2x0_memctl_ioh, MEMCTL_MECR,
sd.sd_mecr);
bus_space_write_4(sc->sc_iot, pxa2x0_memctl_ioh, MEMCTL_MCMEM(0),
sd.sd_mcmem0);
bus_space_write_4(sc->sc_iot, pxa2x0_memctl_ioh, MEMCTL_MCMEM(1),
sd.sd_mcmem1);
bus_space_write_4(sc->sc_iot, pxa2x0_memctl_ioh, MEMCTL_MCATT(0),
sd.sd_mcatt0);
bus_space_write_4(sc->sc_iot, pxa2x0_memctl_ioh, MEMCTL_MCATT(1),
sd.sd_mcatt1);
bus_space_write_4(sc->sc_iot, pxa2x0_memctl_ioh, MEMCTL_MCIO(0),
sd.sd_mcio0);
bus_space_write_4(sc->sc_iot, pxa2x0_memctl_ioh, MEMCTL_MCIO(1),
sd.sd_mcio1);
bus_space_write_4(sc->sc_iot, pxa2x0_clkman_ioh, CLKMAN_CKEN,
sd.sd_cken);
write_icu(INTCTL_ICLR, sd.sd_iclr);
write_icu(INTCTL_ICCR, sd.sd_iccr);
write_icu(INTCTL_ICMR, sd.sd_icmr);
if ((read_icu(INTCTL_ICIP) & 0x1) != 0)
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PEDR, 0x1);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OSMR0, sd.sd_osmr0);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OSMR1, sd.sd_osmr1);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OSMR2, sd.sd_osmr2);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OSMR3, sd.sd_osmr3);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OSMR4, sd.sd_osmr4);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OSMR5, sd.sd_osmr5);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OMCR4, sd.sd_omcr4);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OMCR5, sd.sd_omcr5);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OSCR0, sd.sd_oscr0);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OSCR4, sd.sd_oscr4);
bus_space_write_4(sc->sc_iot, ost_ioh, OST_OIER, sd.sd_oier);
pxa2x0_pi2c_setvoltage(sc->sc_iot, sc->sc_pm_ioh, PI2C_VOLTAGE_HIGH);
/* Change to 208MHz run mode with fast-bus still disabled. */
pxa27x_frequency_change(CCCR_A | CCCR_TURBO_X2 | CCCR_RUN_X16,
CLKCFG_F, &pxa2x0_memcfg);
delay(1); /* XXX is the delay long enough, and necessary at all? */
pxa27x_fastbus_run_mode(1, pxa2x0_memcfg.mdrefr_high);
/* Change to 416MHz turbo mode with fast-bus enabled. */
pxa27x_frequency_change(CCCR_A | CCCR_TURBO_X2 | CCCR_RUN_X16,
CLKCFG_B | CLKCFG_F | CLKCFG_T, &pxa2x0_memcfg);
if (sc->sc_resume != NULL) {
if (!sc->sc_resume(sc))
goto suspend_again;
}
/*
* Allow immediate entry into deep-sleep mode if power fails.
* Resume from immediate deep-sleep is not implemented yet.
*/
bus_space_write_4(sc->sc_iot, sc->sc_pm_ioh, POWMAN_PMCR, 0);
restore_interrupts(save);
pxa2x0_setperf(perflevel);
out:
if (ost_ioh != (bus_space_handle_t)0)
bus_space_unmap(sc->sc_iot, ost_ioh, PXA2X0_OST_SIZE);
}
void pxa2x0_i2s_close(struct pxa2x0_i2s_softc *sc)
{
pxa2x0_clkman_config(CKEN_I2S, 0);
sc->sc_open--;
}
void pxa2x0_i2s_open(struct pxa2x0_i2s_softc *sc)
{
sc->sc_open++;
pxa2x0_clkman_config(CKEN_I2S, 1);
}
static void
obioohci_attach(struct device *parent, struct device *self, void *aux)
{
struct obioohci_softc *sc = (struct obioohci_softc *)self;
struct obio_attach_args *obio = aux;
usbd_status r;
sc->sc.sc_size = 0;
sc->sc_ih = NULL;
sc->sc.sc_bus.dmatag = 0;
/* Map I/O space */
if (bus_space_map(obio->obio_iot, obio->obio_addr, obio->obio_size, 0,
&sc->sc.ioh)) {
aprint_error(": couldn't map memory space\n");
return;
}
sc->sc.iot = obio->obio_iot;
sc->sc_addr = obio->obio_addr;
sc->sc.sc_size = obio->obio_size;
sc->sc.sc_bus.dmatag = obio->obio_dmac;
/* XXX copied from ohci_pci.c. needed? */
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
/* start the usb clock */
#ifdef NOTYET
pxa2x0_clkman_config(CKEN_USBHC, 1);
#endif
obioohci_enable(sc);
/* Disable interrupts, so we don't get any spurious ones. */
bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
OHCI_MIE);
#ifdef NOTYET
sc->sc_ih = obio_intr_establish(obio->obio_intr, IPL_USB,
sc->sc.sc_bus.bdev.dv_xname, ohci_intr, &sc->sc);
if (sc->sc_ih == NULL) {
aprint_error(": unable to establish interrupt\n");
goto free_map;
}
#else
sc->sc_ih = obioohci_fake_intr_establish(ohci_intr, &sc->sc);
#endif
strlcpy(sc->sc.sc_vendor, "OMAP2", sizeof(sc->sc.sc_vendor));
r = ohci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) {
aprint_error("%s: init failed, error=%d\n",
sc->sc.sc_bus.bdev.dv_xname, r);
goto free_intr;
}
sc->sc.sc_powerhook = powerhook_establish(sc->sc.sc_bus.bdev.dv_xname,
obioohci_power, sc);
if (sc->sc.sc_powerhook == NULL) {
aprint_error("%s: cannot establish powerhook\n",
sc->sc.sc_bus.bdev.dv_xname);
}
sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus, usbctlprint);
return;
free_intr:
#ifdef NOTYET
obio_gpio_intr_disestablish(sc->sc_ih);
#endif
sc->sc_ih = NULL;
#ifdef NOTYET
free_map:
#endif
obioohci_disable(sc);
#ifdef NOTYET
pxa2x0_clkman_config(CKEN_USBHC, 0);
#endif
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc->sc.sc_size = 0;
}
