Exemple #1
0
static void cg3_realizefn(DeviceState *dev, Error **errp)
{
    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
    CG3State *s = CG3(dev);
    int ret;
    char *fcode_filename;

    /* FCode ROM */
    vmstate_register_ram_global(&s->rom);
    fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE);
    if (fcode_filename) {
        ret = load_image_targphys(fcode_filename, s->prom_addr,
                                  FCODE_MAX_ROM_SIZE);
        if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {
            error_report("cg3: could not load prom '%s'", CG3_ROM_FILE);
        }
    }

    memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size,
                           &error_abort);
    vmstate_register_ram_global(&s->vram_mem);
    sysbus_init_mmio(sbd, &s->vram_mem);

    sysbus_init_irq(sbd, &s->irq);

    s->con = graphic_console_init(DEVICE(dev), 0, &cg3_ops, s);
    qemu_console_resize(s->con, s->width, s->height);
}
Exemple #2
0
Fichier : tcx.c Projet : asias/qemu
static void tcx_invalidate_display(void *opaque)
{
    TCXState *s = opaque;

    tcx_set_dirty(s);
    qemu_console_resize(s->ds, s->width, s->height);
}
Exemple #3
0
static int tcx_init1(SysBusDevice *dev)
{
    TCXState *s = FROM_SYSBUS(TCXState, dev);
    int io_memory, dummy_memory;
    ram_addr_t vram_offset;
    int size;
    uint8_t *vram_base;

    vram_offset = qemu_ram_alloc(s->vram_size * (1 + 4 + 4));
    vram_base = qemu_get_ram_ptr(vram_offset);
    s->vram_offset = vram_offset;

    /* 8-bit plane */
    s->vram = vram_base;
    size = s->vram_size;
    sysbus_init_mmio(dev, size, s->vram_offset);
    vram_offset += size;
    vram_base += size;

    /* DAC */
    io_memory = cpu_register_io_memory(tcx_dac_read, tcx_dac_write, s);
    sysbus_init_mmio(dev, TCX_DAC_NREGS, io_memory);

    /* TEC (dummy) */
    dummy_memory = cpu_register_io_memory(tcx_dummy_read, tcx_dummy_write,
                                          s);
    sysbus_init_mmio(dev, TCX_TEC_NREGS, dummy_memory);
    /* THC: NetBSD writes here even with 8-bit display: dummy */
    sysbus_init_mmio(dev, TCX_THC_NREGS_24, dummy_memory);

    if (s->depth == 24) {
        /* 24-bit plane */
        size = s->vram_size * 4;
        s->vram24 = (uint32_t *)vram_base;
        s->vram24_offset = vram_offset;
        sysbus_init_mmio(dev, size, vram_offset);
        vram_offset += size;
        vram_base += size;

        /* Control plane */
        size = s->vram_size * 4;
        s->cplane = (uint32_t *)vram_base;
        s->cplane_offset = vram_offset;
        sysbus_init_mmio(dev, size, vram_offset);

        s->ds = graphic_console_init(tcx24_update_display,
                                     tcx24_invalidate_display,
                                     tcx24_screen_dump, NULL, s);
    } else {
        /* THC 8 bit (dummy) */
        sysbus_init_mmio(dev, TCX_THC_NREGS_8, dummy_memory);

        s->ds = graphic_console_init(tcx_update_display,
                                     tcx_invalidate_display,
                                     tcx_screen_dump, NULL, s);
    }

    qemu_console_resize(s->ds, s->width, s->height);
    return 0;
}
Exemple #4
0
static int sm_lcd_init(SSISlave *dev)
{
    lcd_state *s = FROM_SSI_SLAVE(lcd_state, dev);

    s->brightness = 0.0;

    s->con = graphic_console_init(DEVICE(dev), 0, &sm_lcd_ops, s);
    qemu_console_resize(s->con, NUM_COLS, NUM_ROWS);

    /* This callback informs us that brightness control is enabled */
    qdev_init_gpio_in_named(DEVICE(dev), sm_lcd_backlight_enable_cb,
                            "backlight_enable", 1);

    /* This callback informs us of the brightness level (from 0 to 255) */
    qdev_init_gpio_in_named(DEVICE(dev), sm_lcd_set_backlight_level_cb,
                            "backlight_level", 1);

    /* This callback informs us that the vibrate is on/orr */
    qdev_init_gpio_in_named(DEVICE(dev), sm_lcd_vibe_ctl,
                            "vibe_ctl", 1);

    /* This callback informs us that power is on/off */
    qdev_init_gpio_in_named(DEVICE(dev), sm_lcd_power_ctl,
                            "power_ctl", 1);

    return 0;
}
Exemple #5
0
static void pl110_invalidate_display(void * opaque)
{
    pl110_state *s = (pl110_state *)opaque;
    s->invalidate = 1;
    if (pl110_enabled(s)) {
        qemu_console_resize(s->ds, s->cols, s->rows);
    }
}
Exemple #6
0
static void vgafb_resize(MilkymistVgafbState *s)
{
    if (!vgafb_enabled(s)) {
        return;
    }

    qemu_console_resize(s->ds, s->regs[R_HRES], s->regs[R_VRES]);
    s->invalidate = 1;
}
Exemple #7
0
static void pl110_resize(pl110_state *s, int width, int height)
{
    if (width != s->cols || height != s->rows) {
        if (pl110_enabled(s)) {
            qemu_console_resize(s->ds, width, height);
        }
    }
    s->cols = width;
    s->rows = height;
}
Exemple #8
0
static void pxa2xx_lcdc_resize(PXA2xxLCDState *s)
{
    int width, height;
    if (!(s->control[0] & LCCR0_ENB))
        return;

    width = LCCR1_PPL(s->control[1]) + 1;
    height = LCCR2_LPP(s->control[2]) + 1;

    if (width != s->xres || height != s->yres) {
        if (s->orientation)
            qemu_console_resize(s->ds, height, width);
        else
            qemu_console_resize(s->ds, width, height);
        s->invalidated = 1;
        s->xres = width;
        s->yres = height;
    }
}
Exemple #9
0
static void vigs_dpy_resize(void *user_data,
                            uint32_t width,
                            uint32_t height)
{
    VIGSState *s = user_data;
    DisplaySurface *ds = qemu_console_surface(s->con);

    if ((width != surface_width(ds)) ||
        (height != surface_height(ds))) {
        qemu_console_resize(s->con, width, height);
    }
}
/* Console hooks */
void goldfish_fb_set_rotation(int rotation)
{
    DeviceState *dev = qdev_find_recursive(sysbus_get_default(), TYPE_GOLDFISH_FB);
    if (dev) {
        struct goldfish_fb_state *s = GOLDFISH_FB(dev);
        DisplaySurface *ds = qemu_console_surface(s->con);
        s->rotation = rotation;
        s->need_update = 1;
        qemu_console_resize(s->con, surface_height(ds), surface_width(ds));
    } else {
        fprintf(stderr,"%s: unable to find FB dev\n", __func__);
    }
}
Exemple #11
0
static void bcm2708_vc_fb(struct bcm2708_vc *_vc,
		int _chan, uint32_t _msg)
{
	target_phys_addr_t dma = _msg &~ (0xc << 28);
	cpu_physical_memory_read(dma, &_vc->fb, sizeof(_vc->fb));

	// TODO: much better calculations.

	int pitch;
	switch(_vc->fb.bpp)
	{
	case 8:
		pitch = _vc->fb.xres;
		_vc->fb_bpp = BPP_8;
		break;
	
	case 16:
		pitch = _vc->fb.xres << 1;
		_vc->fb_bpp = BPP_16_565;
		break;

	case 32:
		pitch = _vc->fb.xres << 2;
		_vc->fb_bpp = BPP_32;
		break;

	default:
		pitch = _vc->fb.xres << 1;
		_vc->fb_bpp = BPP_16_565;
		break;
	}

	target_phys_addr_t fbsz = pitch*_vc->fb.yres;
	target_phys_addr_t addr = 128*1024*1024; // Currently hard-coded in kernel?

	_vc->fb_invalidate = 1;
	_vc->fb.pitch = pitch;
	_vc->fb.base = addr;
	_vc->fb.screen_size = fbsz;

	qemu_console_resize(_vc->disp, _vc->fb.xres, _vc->fb.yres);

#ifdef DEBUG_FB
	printf("fb mapped to 0x%08x (%p).\n", addr, _vc->disp);
#endif
	
	cpu_physical_memory_write(dma, &_vc->fb, sizeof(_vc->fb));
	bcm2708_vc_send(_vc, _chan, 0);
}
Exemple #12
0
static void tc6393xb_update_display(void *opaque)
{
    TC6393xbState *s = opaque;
    DisplaySurface *surface = qemu_console_surface(s->con);
    int full_update;

    if (s->scr_width == 0 || s->scr_height == 0)
        return;

    full_update = 0;
    if (s->blanked != s->blank) {
        s->blanked = s->blank;
        full_update = 1;
    }
    if (s->scr_width != surface_width(surface) ||
        s->scr_height != surface_height(surface)) {
        qemu_console_resize(s->con, s->scr_width, s->scr_height);
        full_update = 1;
    }
    if (s->blanked)
        tc6393xb_draw_blank(s, full_update);
    else
        tc6393xb_draw_graphic(s, full_update);
}
Exemple #13
0
Fichier : tcx.c Projet : asias/qemu
static int tcx_init1(SysBusDevice *dev)
{
    TCXState *s = FROM_SYSBUS(TCXState, dev);
    ram_addr_t vram_offset = 0;
    int size;
    uint8_t *vram_base;

    memory_region_init_ram(&s->vram_mem, "tcx.vram",
                           s->vram_size * (1 + 4 + 4));
    vmstate_register_ram_global(&s->vram_mem);
    vram_base = memory_region_get_ram_ptr(&s->vram_mem);

    /* 8-bit plane */
    s->vram = vram_base;
    size = s->vram_size;
    memory_region_init_alias(&s->vram_8bit, "tcx.vram.8bit",
                             &s->vram_mem, vram_offset, size);
    sysbus_init_mmio(dev, &s->vram_8bit);
    vram_offset += size;
    vram_base += size;

    /* DAC */
    memory_region_init_io(&s->dac, &tcx_dac_ops, s, "tcx.dac", TCX_DAC_NREGS);
    sysbus_init_mmio(dev, &s->dac);

    /* TEC (dummy) */
    memory_region_init_io(&s->tec, &dummy_ops, s, "tcx.tec", TCX_TEC_NREGS);
    sysbus_init_mmio(dev, &s->tec);
    /* THC: NetBSD writes here even with 8-bit display: dummy */
    memory_region_init_io(&s->thc24, &dummy_ops, s, "tcx.thc24",
                          TCX_THC_NREGS_24);
    sysbus_init_mmio(dev, &s->thc24);

    if (s->depth == 24) {
        /* 24-bit plane */
        size = s->vram_size * 4;
        s->vram24 = (uint32_t *)vram_base;
        s->vram24_offset = vram_offset;
        memory_region_init_alias(&s->vram_24bit, "tcx.vram.24bit",
                                 &s->vram_mem, vram_offset, size);
        sysbus_init_mmio(dev, &s->vram_24bit);
        vram_offset += size;
        vram_base += size;

        /* Control plane */
        size = s->vram_size * 4;
        s->cplane = (uint32_t *)vram_base;
        s->cplane_offset = vram_offset;
        memory_region_init_alias(&s->vram_cplane, "tcx.vram.cplane",
                                 &s->vram_mem, vram_offset, size);
        sysbus_init_mmio(dev, &s->vram_cplane);

        s->ds = graphic_console_init(tcx24_update_display,
                                     tcx24_invalidate_display,
                                     tcx24_screen_dump, NULL, s);
    } else {
        /* THC 8 bit (dummy) */
        memory_region_init_io(&s->thc8, &dummy_ops, s, "tcx.thc8",
                              TCX_THC_NREGS_8);
        sysbus_init_mmio(dev, &s->thc8);

        s->ds = graphic_console_init(tcx_update_display,
                                     tcx_invalidate_display,
                                     tcx_screen_dump, NULL, s);
    }

    qemu_console_resize(s->ds, s->width, s->height);
    return 0;
}
void tcx_init(target_phys_addr_t addr, int vram_size, int width, int height,
              int depth)
{
    TCXState *s;
    int io_memory, dummy_memory;
    ram_addr_t vram_offset;
    int size;
    uint8_t *vram_base;

    vram_offset = qemu_ram_alloc(vram_size * (1 + 4 + 4));
    vram_base = qemu_get_ram_ptr(vram_offset);

    s = qemu_mallocz(sizeof(TCXState));
    s->addr = addr;
    s->vram_offset = vram_offset;
    s->width = width;
    s->height = height;
    s->depth = depth;

    // 8-bit plane
    s->vram = vram_base;
    size = vram_size;
    cpu_register_physical_memory(addr + 0x00800000ULL, size, vram_offset);
    vram_offset += size;
    vram_base += size;

    io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
    cpu_register_physical_memory(addr + 0x00200000ULL, TCX_DAC_NREGS,
                                 io_memory);

    dummy_memory = cpu_register_io_memory(0, tcx_dummy_read, tcx_dummy_write,
                                          s);
    cpu_register_physical_memory(addr + 0x00700000ULL, TCX_TEC_NREGS,
                                 dummy_memory);
    if (depth == 24) {
        // 24-bit plane
        size = vram_size * 4;
        s->vram24 = (uint32_t *)vram_base;
        s->vram24_offset = vram_offset;
        cpu_register_physical_memory(addr + 0x02000000ULL, size, vram_offset);
        vram_offset += size;
        vram_base += size;

        // Control plane
        size = vram_size * 4;
        s->cplane = (uint32_t *)vram_base;
        s->cplane_offset = vram_offset;
        cpu_register_physical_memory(addr + 0x0a000000ULL, size, vram_offset);
        s->ds = graphic_console_init(tcx24_update_display,
                                     tcx24_invalidate_display,
                                     tcx24_screen_dump, NULL, s);
    } else {
        cpu_register_physical_memory(addr + 0x00300000ULL, TCX_THC_NREGS_8,
                                     dummy_memory);
        s->ds = graphic_console_init(tcx_update_display,
                                     tcx_invalidate_display,
                                     tcx_screen_dump, NULL, s);
    }
    // NetBSD writes here even with 8-bit display
    cpu_register_physical_memory(addr + 0x00301000ULL, TCX_THC_NREGS_24,
                                 dummy_memory);

    register_savevm("tcx", addr, 4, tcx_save, tcx_load, s);
    qemu_register_reset(tcx_reset, s);
    tcx_reset(s);
    qemu_console_resize(s->ds, width, height);
}
Exemple #15
0
static void bcm2708_fb_invalidate(void *_opaque)
{
	struct bcm2708_vc *vc = _opaque;
	vc->fb_invalidate = 1;
	qemu_console_resize(vc->disp, vc->fb.xres, vc->fb.yres);
}
Exemple #16
0
static void tcx_realizefn(DeviceState *dev, Error **errp)
{
    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
    TCXState *s = TCX(dev);
    ram_addr_t vram_offset = 0;
    int size, ret;
    uint8_t *vram_base;
    char *fcode_filename;

    memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram",
                           s->vram_size * (1 + 4 + 4), &error_abort);
    vmstate_register_ram_global(&s->vram_mem);
    vram_base = memory_region_get_ram_ptr(&s->vram_mem);

    /* FCode ROM */
    vmstate_register_ram_global(&s->rom);
    fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE);
    if (fcode_filename) {
        ret = load_image_targphys(fcode_filename, s->prom_addr,
                                  FCODE_MAX_ROM_SIZE);
        if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {
            error_report("tcx: could not load prom '%s'", TCX_ROM_FILE);
        }
    }

    /* 8-bit plane */
    s->vram = vram_base;
    size = s->vram_size;
    memory_region_init_alias(&s->vram_8bit, OBJECT(s), "tcx.vram.8bit",
                             &s->vram_mem, vram_offset, size);
    sysbus_init_mmio(sbd, &s->vram_8bit);
    vram_offset += size;
    vram_base += size;

    if (s->depth == 24) {
        /* 24-bit plane */
        size = s->vram_size * 4;
        s->vram24 = (uint32_t *)vram_base;
        s->vram24_offset = vram_offset;
        memory_region_init_alias(&s->vram_24bit, OBJECT(s), "tcx.vram.24bit",
                                 &s->vram_mem, vram_offset, size);
        sysbus_init_mmio(sbd, &s->vram_24bit);
        vram_offset += size;
        vram_base += size;

        /* Control plane */
        size = s->vram_size * 4;
        s->cplane = (uint32_t *)vram_base;
        s->cplane_offset = vram_offset;
        memory_region_init_alias(&s->vram_cplane, OBJECT(s), "tcx.vram.cplane",
                                 &s->vram_mem, vram_offset, size);
        sysbus_init_mmio(sbd, &s->vram_cplane);

        s->con = graphic_console_init(DEVICE(dev), 0, &tcx24_ops, s);
    } else {
        /* THC 8 bit (dummy) */
        memory_region_init_io(&s->thc8, OBJECT(s), &dummy_ops, s, "tcx.thc8",
                              TCX_THC_NREGS_8);
        sysbus_init_mmio(sbd, &s->thc8);

        s->con = graphic_console_init(DEVICE(dev), 0, &tcx_ops, s);
    }

    qemu_console_resize(s->con, s->width, s->height);
}