Exemple #1
0
static int get_tlb(QEMUFile *f, void *pv, size_t size)
{
    r4k_tlb_t *v = pv;
    uint16_t flags;

    qemu_get_betls(f, &v->VPN);
    qemu_get_be32s(f, &v->PageMask);
    qemu_get_8s(f, &v->ASID);
    qemu_get_be16s(f, &flags);
    v->G = (flags >> 10) & 1;
    v->C0 = (flags >> 7) & 3;
    v->C1 = (flags >> 4) & 3;
    v->V0 = (flags >> 3) & 1;
    v->V1 = (flags >> 2) & 1;
    v->D0 = (flags >> 1) & 1;
    v->D1 = (flags >> 0) & 1;
    v->EHINV = (flags >> 15) & 1;
    v->RI1 = (flags >> 14) & 1;
    v->RI0 = (flags >> 13) & 1;
    v->XI1 = (flags >> 12) & 1;
    v->XI0 = (flags >> 11) & 1;
    qemu_get_be64s(f, &v->PFN[0]);
    qemu_get_be64s(f, &v->PFN[1]);

    return 0;
}
Exemple #2
0
void cpu_get_timer(QEMUFile *f, CPUTimer *s)
{
    qemu_get_be32s(f, &s->frequency);
    qemu_get_be32s(f, &s->disabled);
    qemu_get_be64s(f, &s->disabled_mask);
    qemu_get_be32s(f, &s->npt);
    qemu_get_be64s(f, &s->npt_mask);
    qemu_get_sbe64s(f, &s->clock_offset);

    timer_get(f, s->qtimer);
}
Exemple #3
0
static int get_uint64_equal(QEMUFile *f, void *pv, size_t size)
{
    uint64_t *v = pv;
    uint64_t v2;
    qemu_get_be64s(f, &v2);

    if (*v == v2) {
        return 0;
    }
    return -EINVAL;
}
static void load_fpu(QEMUFile *f, CPUMIPSFPUContext *fpu)
{
    int i;

    for(i = 0; i < 32; i++)
        qemu_get_be64s(f, &fpu->fpr[i].d);
    qemu_get_s8s(f, &fpu->fp_status.float_detect_tininess);
    qemu_get_s8s(f, &fpu->fp_status.float_rounding_mode);
    qemu_get_s8s(f, &fpu->fp_status.float_exception_flags);
    qemu_get_be32s(f, &fpu->fcr0);
    qemu_get_be32s(f, &fpu->fcr31);
}
Exemple #5
0
static int get_uint64_equal(QEMUFile *f, void *pv, size_t size,
                            VMStateField *field)
{
    uint64_t *v = pv;
    uint64_t v2;
    qemu_get_be64s(f, &v2);

    if (*v == v2) {
        return 0;
    }
    error_report("%" PRIx64 " != %" PRIx64, *v, v2);
    return -EINVAL;
}
Exemple #6
0
static int pxa2xx_timer_load(QEMUFile *f, void *opaque, int version_id)
{
    pxa2xx_timer_info *s = (pxa2xx_timer_info *) opaque;
    int64_t now;
    int i;

    qemu_get_be32s(f, &s->clock);
    qemu_get_be32s(f, &s->oldclock);
    qemu_get_be64s(f, &s->lastload);

    now = qemu_get_clock(vm_clock);
    for (i = 0; i < 4; i ++) {
        qemu_get_be32s(f, &s->timer[i].value);
        s->timer[i].level = qemu_get_be32(f);
    }
    pxa2xx_timer_update(s, now);

    if (s->tm4)
        for (i = 0; i < 8; i ++) {
            qemu_get_be32s(f, &s->tm4[i].tm.value);
            s->tm4[i].tm.level = qemu_get_be32(f);
            qemu_get_be32s(f, &s->tm4[i].oldclock);
            qemu_get_be32s(f, &s->tm4[i].clock);
            qemu_get_be64s(f, &s->tm4[i].lastload);
            qemu_get_be32s(f, &s->tm4[i].freq);
            qemu_get_be32s(f, &s->tm4[i].control);
            pxa2xx_timer_update4(s, now, i);
        }

    qemu_get_be32s(f, &s->events);
    qemu_get_be32s(f, &s->irq_enabled);
    qemu_get_be32s(f, &s->reset3);
    qemu_get_be32s(f, &s->snapshot);

    return 0;
}
static int s3c_rtc_load(QEMUFile *f, void *opaque, int version_id)
{
    struct s3c_rtc_state_s *s = (struct s3c_rtc_state_s *) opaque;
    qemu_get_be64s(f, &s->next);
    qemu_get_8s(f, &s->control);
    qemu_get_8s(f, &s->tick);
    qemu_get_8s(f, &s->alarm);
    qemu_get_8s(f, &s->almsec);
    qemu_get_8s(f, &s->almmin);
    qemu_get_8s(f, &s->almday);
    qemu_get_8s(f, &s->almhour);
    qemu_get_8s(f, &s->almmon);
    qemu_get_8s(f, &s->almyear);
    qemu_get_8s(f, &s->reset);
    qemu_get_be32s(f, &s->sec);

    s->enable = (s->control == 0x1);
    s3c_rtc_tick_mod(s);

    return 0;
}
Exemple #8
0
static int cpu_load_old(QEMUFile *f, void *opaque, int version_id)
{
    PowerPCCPU *cpu = opaque;
    CPUPPCState *env = &cpu->env;
    unsigned int i, j;
    target_ulong sdr1;
    uint32_t fpscr;
    target_ulong xer;

    for (i = 0; i < 32; i++)
        qemu_get_betls(f, &env->gpr[i]);
#if !defined(TARGET_PPC64)
    for (i = 0; i < 32; i++)
        qemu_get_betls(f, &env->gprh[i]);
#endif
    qemu_get_betls(f, &env->lr);
    qemu_get_betls(f, &env->ctr);
    for (i = 0; i < 8; i++)
        qemu_get_be32s(f, &env->crf[i]);
    qemu_get_betls(f, &xer);
    cpu_write_xer(env, xer);
    qemu_get_betls(f, &env->reserve_addr);
    qemu_get_betls(f, &env->msr);
    for (i = 0; i < 4; i++)
        qemu_get_betls(f, &env->tgpr[i]);
    for (i = 0; i < 32; i++) {
        union {
            float64 d;
            uint64_t l;
        } u;
        u.l = qemu_get_be64(f);
        env->fpr[i] = u.d;
    }
    qemu_get_be32s(f, &fpscr);
    env->fpscr = fpscr;
    qemu_get_sbe32s(f, &env->access_type);
#if defined(TARGET_PPC64)
    qemu_get_betls(f, &env->spr[SPR_ASR]);
    qemu_get_sbe32s(f, &env->slb_nr);
#endif
    qemu_get_betls(f, &sdr1);
    for (i = 0; i < 32; i++)
        qemu_get_betls(f, &env->sr[i]);
    for (i = 0; i < 2; i++)
        for (j = 0; j < 8; j++)
            qemu_get_betls(f, &env->DBAT[i][j]);
    for (i = 0; i < 2; i++)
        for (j = 0; j < 8; j++)
            qemu_get_betls(f, &env->IBAT[i][j]);
    qemu_get_sbe32s(f, &env->nb_tlb);
    qemu_get_sbe32s(f, &env->tlb_per_way);
    qemu_get_sbe32s(f, &env->nb_ways);
    qemu_get_sbe32s(f, &env->last_way);
    qemu_get_sbe32s(f, &env->id_tlbs);
    qemu_get_sbe32s(f, &env->nb_pids);
    if (env->tlb.tlb6) {
        // XXX assumes 6xx
        for (i = 0; i < env->nb_tlb; i++) {
            qemu_get_betls(f, &env->tlb.tlb6[i].pte0);
            qemu_get_betls(f, &env->tlb.tlb6[i].pte1);
            qemu_get_betls(f, &env->tlb.tlb6[i].EPN);
        }
    }
    for (i = 0; i < 4; i++)
        qemu_get_betls(f, &env->pb[i]);
    for (i = 0; i < 1024; i++)
        qemu_get_betls(f, &env->spr[i]);
    if (!env->external_htab) {
        ppc_store_sdr1(env, sdr1);
    }
    qemu_get_be32s(f, &env->vscr);
    qemu_get_be64s(f, &env->spe_acc);
    qemu_get_be32s(f, &env->spe_fscr);
    qemu_get_betls(f, &env->msr_mask);
    qemu_get_be32s(f, &env->flags);
    qemu_get_sbe32s(f, &env->error_code);
    qemu_get_be32s(f, &env->pending_interrupts);
    qemu_get_be32s(f, &env->irq_input_state);
    for (i = 0; i < POWERPC_EXCP_NB; i++)
        qemu_get_betls(f, &env->excp_vectors[i]);
    qemu_get_betls(f, &env->excp_prefix);
    qemu_get_betls(f, &env->ivor_mask);
    qemu_get_betls(f, &env->ivpr_mask);
    qemu_get_betls(f, &env->hreset_vector);
    qemu_get_betls(f, &env->nip);
    qemu_get_betls(f, &env->hflags);
    qemu_get_betls(f, &env->hflags_nmsr);
    qemu_get_sbe32s(f, &env->mmu_idx);
    qemu_get_sbe32(f); /* Discard unused power_mode */

    return 0;
}
Exemple #9
0
int cpu_load(QEMUFile *f, void *opaque, int version_id)
{
    CPUSPARCState *env = opaque;
    SPARCCPU *cpu = sparc_env_get_cpu(env);
    int i;
    uint32_t tmp;

    if (version_id < 6)
        return -EINVAL;
    for(i = 0; i < 8; i++)
        qemu_get_betls(f, &env->gregs[i]);
    qemu_get_be32s(f, &env->nwindows);
    for(i = 0; i < env->nwindows * 16; i++)
        qemu_get_betls(f, &env->regbase[i]);

    /* FPU */
    for (i = 0; i < TARGET_DPREGS; i++) {
        env->fpr[i].l.upper = qemu_get_be32(f);
        env->fpr[i].l.lower = qemu_get_be32(f);
    }

    qemu_get_betls(f, &env->pc);
    qemu_get_betls(f, &env->npc);
    qemu_get_betls(f, &env->y);
    tmp = qemu_get_be32(f);
    env->cwp = 0; /* needed to ensure that the wrapping registers are
                     correctly updated */
    cpu_put_psr(env, tmp);
    qemu_get_betls(f, &env->fsr);
    qemu_get_betls(f, &env->tbr);
    tmp = qemu_get_be32(f);
    env->interrupt_index = tmp;
    qemu_get_be32s(f, &env->pil_in);
#ifndef TARGET_SPARC64
    qemu_get_be32s(f, &env->wim);
    /* MMU */
    for (i = 0; i < 32; i++)
        qemu_get_be32s(f, &env->mmuregs[i]);
    for (i = 0; i < 4; i++) {
        qemu_get_be64s(f, &env->mxccdata[i]);
    }
    for (i = 0; i < 8; i++) {
        qemu_get_be64s(f, &env->mxccregs[i]);
    }
    qemu_get_be32s(f, &env->mmubpctrv);
    qemu_get_be32s(f, &env->mmubpctrc);
    qemu_get_be32s(f, &env->mmubpctrs);
    qemu_get_be64s(f, &env->mmubpaction);
    for (i = 0; i < 4; i++) {
        qemu_get_be64s(f, &env->mmubpregs[i]);
    }
#else
    qemu_get_be64s(f, &env->lsu);
    for (i = 0; i < 16; i++) {
        qemu_get_be64s(f, &env->immuregs[i]);
        qemu_get_be64s(f, &env->dmmuregs[i]);
    }
    for (i = 0; i < 64; i++) {
        qemu_get_be64s(f, &env->itlb[i].tag);
        qemu_get_be64s(f, &env->itlb[i].tte);
        qemu_get_be64s(f, &env->dtlb[i].tag);
        qemu_get_be64s(f, &env->dtlb[i].tte);
    }
    qemu_get_be32s(f, &env->mmu_version);
    for (i = 0; i < MAXTL_MAX; i++) {
        qemu_get_be64s(f, &env->ts[i].tpc);
        qemu_get_be64s(f, &env->ts[i].tnpc);
        qemu_get_be64s(f, &env->ts[i].tstate);
        qemu_get_be32s(f, &env->ts[i].tt);
    }
    qemu_get_be32s(f, &env->xcc);
    qemu_get_be32s(f, &env->asi);
    qemu_get_be32s(f, &env->pstate);
    qemu_get_be32s(f, &env->tl);
    qemu_get_be32s(f, &env->cansave);
    qemu_get_be32s(f, &env->canrestore);
    qemu_get_be32s(f, &env->otherwin);
    qemu_get_be32s(f, &env->wstate);
    qemu_get_be32s(f, &env->cleanwin);
    for (i = 0; i < 8; i++)
        qemu_get_be64s(f, &env->agregs[i]);
    for (i = 0; i < 8; i++)
        qemu_get_be64s(f, &env->bgregs[i]);
    for (i = 0; i < 8; i++)
        qemu_get_be64s(f, &env->igregs[i]);
    for (i = 0; i < 8; i++)
        qemu_get_be64s(f, &env->mgregs[i]);
    qemu_get_be64s(f, &env->fprs);
    qemu_get_be64s(f, &env->tick_cmpr);
    qemu_get_be64s(f, &env->stick_cmpr);
    cpu_get_timer(f, env->tick);
    cpu_get_timer(f, env->stick);
    qemu_get_be64s(f, &env->gsr);
    qemu_get_be32s(f, &env->gl);
    qemu_get_be64s(f, &env->hpstate);
    for (i = 0; i < MAXTL_MAX; i++)
        qemu_get_be64s(f, &env->htstate[i]);
    qemu_get_be64s(f, &env->hintp);
    qemu_get_be64s(f, &env->htba);
    qemu_get_be64s(f, &env->hver);
    qemu_get_be64s(f, &env->hstick_cmpr);
    qemu_get_be64s(f, &env->ssr);
    cpu_get_timer(f, env->hstick);
#endif
    tlb_flush(CPU(cpu), 1);
    return 0;
}
Exemple #10
0
static int get_uint64(QEMUFile *f, void *pv, size_t size)
{
    uint64_t *v = pv;
    qemu_get_be64s(f, v);
    return 0;
}