/* * Actually update the eeprom, first doing write enable if * needed, then restoring write enable state. * Must be called with eep_lock held */ static int eeprom_write_with_enable(struct qib_devdata *dd, u8 offset, const void *buf, int len) { int ret, pwen; pwen = dd->f_eeprom_wen(dd, 1); ret = qib_twsi_reset(dd); if (ret) qib_dev_err(dd, "EEPROM Reset for write failed\n"); else ret = qib_twsi_blk_wr(dd, dd->twsi_eeprom_dev, offset, buf, len); dd->f_eeprom_wen(dd, pwen); return ret; }
/** * qib_eeprom_read - receives bytes from the eeprom via I2C * @dd: the qlogic_ib device * @eeprom_offset: address to read from * @buffer: where to store result * @len: number of bytes to receive */ int qib_eeprom_read(struct qib_devdata *dd, u8 eeprom_offset, void *buff, int len) { int ret; ret = mutex_lock_interruptible(&dd->eep_lock); if (!ret) { ret = qib_twsi_reset(dd); if (ret) qib_dev_err(dd, "EEPROM Reset for read failed\n"); else ret = qib_twsi_blk_rd(dd, dd->twsi_eeprom_dev, eeprom_offset, buff, len); mutex_unlock(&dd->eep_lock); } return ret; }
static int qsfp_read(struct qib_pportdata *ppd, int addr, void *bp, int len) { struct qib_devdata *dd = ppd->dd; u32 out, mask; int ret, cnt, pass = 0; int stuck = 0; u8 *buff = bp; qib_cdbg(VERBOSE, "Grabbing Mutex for QSFP in %d:%d\n", dd->unit, ppd->port); ret = mutex_lock_interruptible(&dd->eep_lock); if (ret) goto no_unlock; if (dd->twsi_eeprom_dev == QIB_TWSI_NO_DEV) { qib_dbg("QSFP read on board without QSFP\n"); ret = -ENXIO; goto bail; } /* * We presume, if we are called at all, that this board has * QSFP. This is on the same i2c chain as the legacy parts, * but only responds if the module is selected via GPIO pins. * Further, there are very long setup and hold requirements * on MODSEL. */ mask = QSFP_GPIO_MOD_SEL_N | QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE; out = QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE; if (ppd->hw_pidx) { mask <<= QSFP_GPIO_PORT2_SHIFT; out <<= QSFP_GPIO_PORT2_SHIFT; } dd->f_gpio_mod(dd, out, mask, mask); /* * Module could take up to 2 Msec to respond to MOD_SEL, and there * is no way to tell if it is ready, so we must wait. */ msleep(2); /* Make sure TWSI bus is in sane state. */ ret = qib_twsi_reset(dd); if (ret) { qib_dev_porterr(dd, ppd->port, "QSFP interface Reset for read failed\n"); ret = -EIO; stuck = 1; goto deselect; } /* All QSFP modules are at A0 */ cnt = 0; while (cnt < len) { unsigned in_page; int wlen = len - cnt; in_page = addr % QSFP_PAGESIZE; if ((in_page + wlen) > QSFP_PAGESIZE) wlen = QSFP_PAGESIZE - in_page; ret = qib_twsi_blk_rd(dd, QSFP_DEV, addr, buff + cnt, wlen); /* Some QSFP's fail first try. Retry as experiment */ if (ret && cnt == 0 && ++pass < QSFP_MAX_RETRY) continue; if (ret) { /* qib_twsi_blk_rd() 1 for error, else 0 */ ret = -EIO; goto deselect; } addr += wlen; cnt += wlen; } ret = cnt; deselect: /* * Module could take up to 10 uSec after transfer before * ready to respond to MOD_SEL negation, and there is no way * to tell if it is ready, so we must wait. */ udelay(10); /* set QSFP MODSEL, RST. LP all high */ dd->f_gpio_mod(dd, mask, mask, mask); /* * Module could take up to 2 Msec to respond to MOD_SEL * going away, and there is no way to tell if it is ready. * so we must wait. */ if (stuck) qib_dev_err(dd, "QSFP interface bus stuck non-idle\n"); if (pass >= QSFP_MAX_RETRY && ret) qib_dev_porterr(dd, ppd->port, "QSFP failed even retrying\n"); else if (pass) qib_dev_porterr(dd, ppd->port, "QSFP retries: %d\n", pass); msleep(2); bail: mutex_unlock(&dd->eep_lock); qib_cdbg(VERBOSE, "Released Mutex for QSFP %d:%d, ret %d\n", dd->unit, ppd->port, ret); no_unlock: return ret; }
/* * qsfp_write * We do not ordinarily write the QSFP, but this is needed to select * the page on non-flat QSFPs, and possibly later unusual cases */ static int qib_qsfp_write(struct qib_pportdata *ppd, int addr, void *bp, int len) { struct qib_devdata *dd = ppd->dd; u32 out, mask; int ret, cnt; u8 *buff = bp; ret = mutex_lock_interruptible(&dd->eep_lock); if (ret) goto no_unlock; if (dd->twsi_eeprom_dev == QIB_TWSI_NO_DEV) { ret = -ENXIO; goto bail; } /* * We presume, if we are called at all, that this board has * QSFP. This is on the same i2c chain as the legacy parts, * but only responds if the module is selected via GPIO pins. * Further, there are very long setup and hold requirements * on MODSEL. */ mask = QSFP_GPIO_MOD_SEL_N | QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE; out = QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE; if (ppd->hw_pidx) { mask <<= QSFP_GPIO_PORT2_SHIFT; out <<= QSFP_GPIO_PORT2_SHIFT; } dd->f_gpio_mod(dd, out, mask, mask); /* * Module could take up to 2 Msec to respond to MOD_SEL, * and there is no way to tell if it is ready, so we must wait. */ msleep(2); /* Make sure TWSI bus is in sane state. */ ret = qib_twsi_reset(dd); if (ret) { qib_dev_porterr(dd, ppd->port, "QSFP interface Reset for write failed\n"); ret = -EIO; goto deselect; } /* All QSFP modules are at A0 */ cnt = 0; while (cnt < len) { unsigned in_page; int wlen = len - cnt; in_page = addr % QSFP_PAGESIZE; if ((in_page + wlen) > QSFP_PAGESIZE) wlen = QSFP_PAGESIZE - in_page; ret = qib_twsi_blk_wr(dd, QSFP_DEV, addr, buff + cnt, wlen); if (ret) { /* qib_twsi_blk_wr() 1 for error, else 0 */ ret = -EIO; goto deselect; } addr += wlen; cnt += wlen; } ret = cnt; deselect: /* * Module could take up to 10 uSec after transfer before * ready to respond to MOD_SEL negation, and there is no way * to tell if it is ready, so we must wait. */ udelay(10); /* set QSFP MODSEL, RST, LP high */ dd->f_gpio_mod(dd, mask, mask, mask); /* * Module could take up to 2 Msec to respond to MOD_SEL * going away, and there is no way to tell if it is ready. * so we must wait. */ msleep(2); bail: mutex_unlock(&dd->eep_lock); no_unlock: return ret; }