static void test_init(TestData *d) { QTestState *qs; qs = qtest_startf("-machine q35 %s %s", d->noreboot ? "" : "-global ICH9-LPC.noreboot=false", !d->args ? "" : d->args); global_qtest = qs; qtest_irq_intercept_in(qs, "ioapic"); d->bus = qpci_init_pc(qs, NULL); d->dev = qpci_device_find(d->bus, QPCI_DEVFN(0x1f, 0x00)); g_assert(d->dev != NULL); qpci_device_enable(d->dev); /* set ACPI PM I/O space base address */ qpci_config_writel(d->dev, ICH9_LPC_PMBASE, PM_IO_BASE_ADDR | 0x1); /* enable ACPI I/O */ qpci_config_writeb(d->dev, ICH9_LPC_ACPI_CTRL, 0x80); /* set Root Complex BAR */ qpci_config_writel(d->dev, ICH9_LPC_RCBA, RCBA_BASE_ADDR | 0x1); d->tco_io_bar = qpci_legacy_iomap(d->dev, PM_IO_BASE_ADDR + 0x60); }
static QPCIDevice *get_pci_device(uint16_t *bmdma_base) { QPCIDevice *dev; uint16_t vendor_id, device_id; if (!pcibus) { pcibus = qpci_init_pc(); } /* Find PCI device and verify it's the right one */ dev = qpci_device_find(pcibus, QPCI_DEVFN(IDE_PCI_DEV, IDE_PCI_FUNC)); g_assert(dev != NULL); vendor_id = qpci_config_readw(dev, PCI_VENDOR_ID); device_id = qpci_config_readw(dev, PCI_DEVICE_ID); g_assert(vendor_id == PCI_VENDOR_ID_INTEL); g_assert(device_id == PCI_DEVICE_ID_INTEL_82371SB_1); /* Map bmdma BAR */ *bmdma_base = (uint16_t)(uintptr_t) qpci_iomap(dev, 4); qpci_device_enable(dev); return dev; }
static void setup_vm_cmd(IVState *s, const char *cmd, bool msix) { uint64_t barsize; const char *arch = qtest_get_arch(); if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) { s->qs = qtest_pc_boot(cmd); } else if (strcmp(arch, "ppc64") == 0) { s->qs = qtest_spapr_boot(cmd); } else { g_printerr("ivshmem-test tests are only available on x86 or ppc64\n"); exit(EXIT_FAILURE); } s->dev = get_device(s->qs->pcibus); s->reg_bar = qpci_iomap(s->dev, 0, &barsize); g_assert_cmpuint(barsize, ==, 256); if (msix) { qpci_msix_enable(s->dev); } s->mem_bar = qpci_iomap(s->dev, 2, &barsize); g_assert_cmpuint(barsize, ==, TMPSHMSIZE); qpci_device_enable(s->dev); }
/* This used to cause a NULL pointer dereference. */ static void megasas_pd_get_info_fuzz(void *obj, void *data, QGuestAllocator *alloc) { QMegasas *megasas = obj; QPCIDevice *dev = &megasas->dev; QPCIBar bar; uint32_t context[256]; uint64_t context_pa; int i; qpci_device_enable(dev); bar = qpci_iomap(dev, 0, NULL); memset(context, 0, sizeof(context)); context[0] = cpu_to_le32(0x05050505); context[1] = cpu_to_le32(0x01010101); for (i = 2; i < ARRAY_SIZE(context); i++) { context[i] = cpu_to_le32(0x41414141); } context[6] = cpu_to_le32(0x02020000); context[7] = cpu_to_le32(0); context_pa = guest_alloc(alloc, sizeof(context)); memwrite(context_pa, context, sizeof(context)); qpci_io_writel(dev, bar, 0x40, context_pa); }
void qusb_pci_init_one(QPCIBus *pcibus, struct qhc *hc, uint32_t devfn, int bar) { hc->dev = qpci_device_find(pcibus, devfn); g_assert(hc->dev != NULL); qpci_device_enable(hc->dev); hc->base = qpci_iomap(hc->dev, bar, NULL); g_assert(hc->base != NULL); }
static void test_init(void) { uint64_t barsize; dev = get_device(); dev_bar = qpci_iomap(dev, 0, &barsize); qpci_device_enable(dev); test_timer(); }