/* SW TCL elements, using Draw. */
static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
const struct pipe_draw_info *info)
{
struct r300_context* r300 = r300_context(pipe);
struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
struct pipe_transfer *ib_transfer = NULL;
int i;
void *indices = NULL;
boolean indexed = info->indexed && r300->vbuf_mgr->index_buffer.buffer;
if (r300->skip_rendering) {
return;
}
r300_update_derived_state(r300);
r300_reserve_cs_dwords(r300,
PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL |
(indexed ? PREP_INDEXED : 0),
indexed ? 256 : 6);
for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
void *buf = pipe_buffer_map(pipe,
r300->vbuf_mgr->vertex_buffer[i].buffer,
PIPE_TRANSFER_READ |
PIPE_TRANSFER_UNSYNCHRONIZED,
&vb_transfer[i]);
draw_set_mapped_vertex_buffer(r300->draw, i, buf);
}
}
if (indexed) {
indices = pipe_buffer_map(pipe, r300->vbuf_mgr->index_buffer.buffer,
PIPE_TRANSFER_READ |
PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer);
}
draw_set_mapped_index_buffer(r300->draw, indices);
r300->draw_vbo_locked = TRUE;
r300->draw_first_emitted = FALSE;
draw_vbo(r300->draw, info);
draw_flush(r300->draw);
r300->draw_vbo_locked = FALSE;
for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
pipe_buffer_unmap(pipe, vb_transfer[i]);
draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
}
}
if (indexed) {
pipe_buffer_unmap(pipe, ib_transfer);
draw_set_mapped_index_buffer(r300->draw, NULL);
}
}
/**
* Check if the requested number of dwords is available in the CS and
* if not, flush. Then validate buffers and emit dirty state.
* \param r300 The context.
* \param flags See r300_prepare_flags.
* \param index_buffer The index buffer to validate. The parameter may be NULL.
* \param cs_dwords The number of dwords to reserve in CS.
* \param aos_offset The offset passed to emit_aos.
* \param index_bias The index bias to emit.
* \return TRUE if rendering should be skipped
*/
static boolean r300_prepare_for_rendering(struct r300_context *r300,
enum r300_prepare_flags flags,
struct pipe_resource *index_buffer,
unsigned cs_dwords,
int aos_offset,
int index_bias)
{
if (r300_reserve_cs_dwords(r300, flags, cs_dwords))
flags |= PREP_FIRST_DRAW;
return r300_emit_states(r300, flags, index_buffer, aos_offset, index_bias);
}
/**
* Check if the requested number of dwords is available in the CS and
* if not, flush. Then validate buffers and emit dirty state.
* \param r300 The context.
* \param flags See r300_prepare_flags.
* \param index_buffer The index buffer to validate. The parameter may be NULL.
* \param cs_dwords The number of dwords to reserve in CS.
* \param buffer_offset The offset passed to emit_vertex_arrays.
* \param index_bias The index bias to emit.
* \param instance_id The instance to render.
* \return TRUE if rendering should be skipped
*/
static boolean r300_prepare_for_rendering(struct r300_context *r300,
enum r300_prepare_flags flags,
struct pipe_resource *index_buffer,
unsigned cs_dwords,
int buffer_offset,
int index_bias,
int instance_id)
{
/* Make sure there is enough space in the command stream and emit states. */
if (r300_reserve_cs_dwords(r300, flags, cs_dwords))
flags |= PREP_EMIT_STATES;
return r300_emit_states(r300, flags, index_buffer, buffer_offset,
index_bias, instance_id);
}
/* SW TCL elements, using Draw. */
static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
const struct pipe_draw_info *info)
{
struct r300_context* r300 = r300_context(pipe);
struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
struct pipe_transfer *ib_transfer = NULL;
unsigned count = info->count;
int i;
void *indices = NULL;
boolean indexed = info->indexed && r300->index_buffer.buffer;
if (r300->skip_rendering) {
return;
}
if (!u_trim_pipe_prim(info->mode, &count)) {
return;
}
r300_update_derived_state(r300);
r300_reserve_cs_dwords(r300,
PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL |
(indexed ? PREP_INDEXED : 0),
indexed ? 256 : 6);
for (i = 0; i < r300->vertex_buffer_count; i++) {
if (r300->vertex_buffer[i].buffer) {
void *buf = pipe_buffer_map(pipe,
r300->vertex_buffer[i].buffer,
PIPE_TRANSFER_READ,
&vb_transfer[i]);
draw_set_mapped_vertex_buffer(r300->draw, i, buf);
}
}
if (indexed) {
indices = pipe_buffer_map(pipe, r300->index_buffer.buffer,
PIPE_TRANSFER_READ, &ib_transfer);
}
draw_set_mapped_index_buffer(r300->draw, indices);
r300->draw_vbo_locked = TRUE;
r300->draw_first_emitted = FALSE;
draw_vbo(r300->draw, info);
draw_flush(r300->draw);
r300->draw_vbo_locked = FALSE;
for (i = 0; i < r300->vertex_buffer_count; i++) {
if (r300->vertex_buffer[i].buffer) {
pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
vb_transfer[i]);
draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
}
}
if (indexed) {
pipe_buffer_unmap(pipe, r300->index_buffer.buffer, ib_transfer);
draw_set_mapped_index_buffer(r300->draw, NULL);
}
}
