void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 64K*16way */ l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff); #endif r8a7779_pm_init(); r8a7779_init_pm_domain(&r8a7779_sh4a); r8a7779_init_pm_domain(&r8a7779_sgx); r8a7779_init_pm_domain(&r8a7779_vdp1); r8a7779_init_pm_domain(&r8a7779_impx3); platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); platform_add_devices(r8a7779_late_devices, ARRAY_SIZE(r8a7779_late_devices)); r8a7779_add_device_to_domain(&r8a7779_sgx, &sgx_device); pm_clk_add(&sgx_device.dev, "sgx"); #ifdef CONFIG_RENESAS_RCAR_PCI rcar_pcie_init(&pcie_device); #endif }
void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 /* */ l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff); #endif r8a7779_pm_init(); r8a7779_init_pm_domain(&r8a7779_sh4a); r8a7779_init_pm_domain(&r8a7779_sgx); r8a7779_init_pm_domain(&r8a7779_vdp1); r8a7779_init_pm_domain(&r8a7779_impx3); platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); platform_add_devices(r8a7779_late_devices, ARRAY_SIZE(r8a7779_late_devices)); }