void receiver_set_compression( const rx_ID_t ID, const unsigned int cfg_ID, const mipi_compressor_t comp, const mipi_predictor_t pred) { const unsigned int field_id = cfg_ID % N_MIPI_FORMAT_CUSTOM; const unsigned int ch_id = cfg_ID / N_MIPI_FORMAT_CUSTOM; hrt_data val; hrt_address addr; hrt_data reg; assert(ID < N_RX_ID); assert(cfg_ID < N_MIPI_COMPRESSOR_CONTEXT); assert(field_id < N_MIPI_FORMAT_CUSTOM); assert(ch_id < N_RX_CHANNEL_ID); assert(comp < N_MIPI_COMPRESSOR_METHODS); assert(pred < N_MIPI_PREDICTOR_TYPES); val = (((uint8_t)pred) << 3) | comp; switch (ch_id) { case 0: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); break; case 1: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); break; case 2: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); break; case 3: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); break; default: return; } reg = ((field_id < 6)?(val << (field_id * 5)):(val << ((field_id - 6) * 5))); receiver_reg_store(ID, addr, reg); return; }
void sh_css_rx_configure( const rx_cfg_t *config, const enum ia_css_input_mode input_mode) { #if defined(HAS_RX_VERSION_2) bool port_enabled[N_MIPI_PORT_ID]; bool any_port_enabled = false; mipi_port_ID_t port; assert(config != NULL); for (port = (mipi_port_ID_t)0; port < N_MIPI_PORT_ID; port++) { if (is_receiver_port_enabled(RX0_ID, port)) any_port_enabled = true; } /* AM: Check whether this is a problem with multiple streams. MS: This is the case.*/ /* Must turn off all ports because of the 2ppc setting */ #ifdef THIS_CODE_IS_NO_LONGER_NEEDED_FOR_DUAL_STREAM for (port = (mipi_port_ID_t)0; port < N_MIPI_PORT_ID; port++) { port_enabled[port] = is_receiver_port_enabled(RX0_ID, port); receiver_port_enable(RX0_ID, port, false); } #else port = config->port; receiver_port_enable(RX0_ID, port, false); #endif port = config->port; /* AM: Check whether this is a problem with multiple streams. */ if (MIPI_PORT_LANES[config->mode][port] != MIPI_0LANE_CFG) { receiver_port_reg_store(RX0_ID, port, _HRT_CSS_RECEIVER_FUNC_PROG_REG_IDX, config->timeout); receiver_port_reg_store(RX0_ID, port, _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX, config->initcount); receiver_port_reg_store(RX0_ID, port, _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX, config->synccount); receiver_port_reg_store(RX0_ID, port, _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX, config->rxcount); port_enabled[port] = true; if (input_mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { /* MW: A bit of a hack, straight wiring of the capture units,assuming they are linearly enumerated. */ input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, GPREGS_UNIT0_ID, HIVE_ISYS_GPREG_MULTICAST_A_IDX + (unsigned int)port, INPUT_SYSTEM_CSI_BACKEND); /* MW: Like the integration test example we overwite, the GPREG_MUX register */ input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, GPREGS_UNIT0_ID, HIVE_ISYS_GPREG_MUX_IDX, (input_system_multiplex_t)port); } else { /* * AM: A bit of a hack, wiring the input system. */ input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, GPREGS_UNIT0_ID, HIVE_ISYS_GPREG_MULTICAST_A_IDX + (unsigned int)port, INPUT_SYSTEM_INPUT_BUFFER); input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, GPREGS_UNIT0_ID, HIVE_ISYS_GPREG_MUX_IDX, INPUT_SYSTEM_ACQUISITION_UNIT); } } /* * The 2ppc is shared for all ports, so we cannot disable->configure->enable individual ports */ /* AM: Check whether this is a problem with multiple streams. */ /* MS: 2ppc should be a property per binary and should be enabled/disabled per binary. Currently it is implemented as a system wide setting due to effort and risks. */ if (!any_port_enabled) { receiver_reg_store(RX0_ID, _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX, config->is_two_ppc); receiver_reg_store(RX0_ID, _HRT_CSS_RECEIVER_BE_TWO_PPC_REG_IDX, config->is_two_ppc); } #ifdef THIS_CODE_IS_NO_LONGER_NEEDED_FOR_DUAL_STREAM /* enable the selected port(s) */ for (port = (mipi_port_ID_t)0; port < N_MIPI_PORT_ID; port++) { receiver_port_enable(RX0_ID, port, port_enabled[port]); } #else receiver_port_enable(RX0_ID, port, true); #endif // TODO: JB: need to add the beneath used define to mizuchi // sh_css_sw_hive_isp_css_2400A0_system_20121224_0125\css\hrt\input_system_defs.h // #define INPUT_SYSTEM_CSI_RECEIVER_SELECT_BACKENG 0X207 // TODO: need better name for define //input_system_reg_store(INPUT_SYSTEM0_ID, INPUT_SYSTEM_CSI_RECEIVER_SELECT_BACKENG, 1); input_system_reg_store(INPUT_SYSTEM0_ID, 0x207, 1); #elif defined(HAS_RX_VERSION_1) mipi_port_ID_t port = config->port; (void) input_mode; //AM: just to satisfy the compiler. /* turn off all ports just in case */ sh_css_rx_disable(); /* All settings are per port */ sh_css_rx_set_timeout(port, config->timeout); /* configure the selected port */ sh_css_rx_set_num_lanes(port, config->num_lanes); sh_css_rx_set_compression(port, config->comp); sh_css_rx_set_uncomp_size(port, config->uncomp_bpp); sh_css_rx_set_comp_size(port, config->comp_bpp); receiver_port_reg_store(RX0_ID, port, _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX, config->is_two_ppc); /* enable the selected port */ receiver_port_reg_store(RX0_ID, port, _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX, true); #else #error "sh_css_rx.c: RX version must be one of {RX_VERSION_1, RX_VERSION_2}" #endif return; }