void setup_sched()
{
register_irq(0, &handle_timer);
jiffies = 0;
tasking_ready = 1;
printk("Initialized scheduler.\n");
enable_interrupts();
}
int request_threaded_irq(unsigned int irq, irq_handler_t handler,
irq_handler_t thread_fn, unsigned long irqflags,
const char *devname, void *dev_id) {
kprintf("irq %d devname %s dev_id %x\n", irq, devname, dev_id);
register_irq(IRQ_OFFSET+irq, e1000_irq_handler, NULL);
ioapicenable(irq, 0);
return 0;
}
void clock_init_arm(uint32_t base, int irq)
{
//TODO
timer_base = base;
outw(timer_base + TIMER_LOAD, LOAD_VALUE);
outw(timer_base + TIMER_CONTROL, TIMER_CONTROL_VAL);
register_irq(irq, clock_int_handler, 0);
pic_enable(irq);
}
/* irq */
int request_irq(unsigned int irq, irq_handler_t handler,
unsigned long irqflags, const char *devname, void *dev_id)
{
if (irq > 31)
return -EINVAL;
printk(KERN_DEBUG "request_irq %d\n", irq);
register_irq(irq, handler, dev_id);
pic_enable(irq);
return 0;
}
keyboard::keyboard()
{
vid->write("Setting up Keyboard");
register_irq(1, &keyboard_irq_callback);
print_chars = false;
vid->write("\t\t\t[OK]\n", 2);
}
void
timer_init()
{
intr_handler_s th;
th.callback = timer_cb;
register_irq(TIMER_IRQ, &th);
hz = get_hz();
tw_printf("hz is 0x%x\n", hz);
// timer use ivt 0x20
lapic_write_reg(_LAPIC_TIMER_OFFSET, TIMER_IRQ);
}
void clock_init_arm(uint32_t base, int irq)
{
// ARM_TIMER_DIV: pre-divider: clock = apb_clock / (x+1), 1MHz
outw(ARM_TIMER_DIV,0x000000F9);
// ARM_TIMER_CTL: control:
// 1: 23-bit counter, 5: interrupt on, 7: timer on
// 3..2: prescale off, 23..16: prescale, freq = clock / (x+1)
outw(ARM_TIMER_CTL,0x003E00A2);
clock_clear();
reload_timer();
register_irq(TIMER0_IRQ, clock_int_handler, 0);
pic_enable(TIMER0_IRQ);
}
/* *
* clock_init - initialize 8253 clock to interrupt 100 times per second,
* and then enable IRQ_TIMER.
* */
void clock_init(void)
{
// set 8253 timer-chip
outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
outb(IO_TIMER1, TIMER_DIV(100) % 256);
outb(IO_TIMER1, TIMER_DIV(100) / 256);
// initialize time counter 'ticks' to zero
ticks = 0;
kprintf("++ setup timer interrupts\n");
pic_enable(IRQ_TIMER);
register_irq(I_TIMER, timer_handler, NULL);
}
void
serial_init(uint32_t base, uint32_t irq) {
if(serial_exists)
return ;
serial_exists = 1;
uart_base = base;
/* buffer size = 1 */
outw(uart_base+TTY_DATA_LEN, 1);
outw(uart_base+TTY_DATA_PTR, (uint32_t)tty_buffer);
/* turn on recv interrput */
outw(uart_base+TTY_CMD, TTY_CMD_INT_ENABLE);
//serial_clear();
register_irq(irq, serial_int_handler, NULL);
pic_enable(irq);
}
/**
* Initialize the clock and sleep queue. This function is called at startup.
*/
void clkinit(void)
{
sleepq = queinit(); /* initialize sleep queue */
clkticks = 0;
msclkticks = 0;
rescheduleMSLeft = RRQUANTUM;
#ifdef DETAIL
kprintf("Time base %dHz, Clock ticks at %dHz\r\n",
platform.clkfreq, CLKTICKS_PER_SEC);
#endif
/* register clock interrupt */
//timer_init();
register_irq(IRQ_TIMER, clkhandler);
enable_irq(IRQ_TIMER);
clkupdate(platform.clkfreq / CLKTICKS_PER_SEC);
}
void init_timer(void)
{
int major;
timer_dev.name = timer_device_name;
timer_dev.fops = &timer_ops;
major = register_chrdev(timer_device_name, &timer_dev);
if (major < 0)
return;
timer_dev.major = major;
timer_ops.read = NULL;
timer_ops.write = NULL;
timer_ops.open = timer_open;
timer_ops.close = NULL;
timer_ops.ioctl = timer_ioctl;
caos_printf("Initialize timer..");
/*
* Timer hardware initializing must be added here
*/
timer_interval = 0xffff; // maximum interval
outb(0x43, 0x34);
outb(0x40, (unsigned char)(timer_interval & 0xff));
outb(0x40, (unsigned char)((timer_interval>>8) & 0xff));
register_irq(0, timer_isr);
enable_irq(0);
timer_count = 0;
clear_screen(0, SCREEN_COL);
caos_printf("OK\n");
}
static int __devinit rt5033_regulator_probe(struct platform_device *pdev)
{
struct rt5033_mfd_chip *chip = dev_get_drvdata(pdev->dev.parent);
struct rt5033_mfd_platform_data *mfd_pdata = chip->dev->platform_data;
const struct rt5033_regulator_platform_data* pdata;
const struct rt5033_pmic_irq_handler *irq_handler = NULL;
int irq_handler_size = 0;
struct rt5033_regulator_info *ri;
struct regulator_dev *rdev;
struct regulator_init_data* init_data;
int ret;
pr_info("Richtek RT5033 regulator driver probing...\n");
BUG_ON(mfd_pdata == NULL);
if (mfd_pdata->regulator_platform_data == NULL)
mfd_pdata->regulator_platform_data = &default_rv_pdata;
pdata = mfd_pdata->regulator_platform_data;
ri = find_regulator_info(pdev->id);
if (ri == NULL) {
dev_err(&pdev->dev, "invalid regulator ID specified\n");
return -EINVAL;
}
init_data = pdata->regulator[pdev->id];
if (init_data == NULL) {
dev_err(&pdev->dev, "no initializing data\n");
return -EINVAL;
}
ri->i2c = chip->i2c_client;
ri->chip = chip;
chip->regulator_info[pdev->id] = ri;
rdev = rt5033_regulator_register(&ri->desc, &pdev->dev,
init_data, ri);
if (IS_ERR(rdev)) {
dev_err(&pdev->dev, "failed to register regulator %s\n",
ri->desc.name);
return PTR_ERR(rdev);
}
platform_set_drvdata(pdev, rdev);
ret = rt5033_regulator_init_regs(rdev);
if (ret<0)
goto err_init_device;
switch (pdev->id)
{
case RT5033_ID_LDO_SAFE:
irq_handler = rt5033_pmic_safeldo_irq_handlers;
irq_handler_size = ARRAY_SIZE(rt5033_pmic_safeldo_irq_handlers);
break;
case RT5033_ID_LDO1:
irq_handler = rt5033_pmic_ldo_irq_handlers;
irq_handler_size = ARRAY_SIZE(rt5033_pmic_ldo_irq_handlers);
break;
case RT5033_ID_DCDC1:
irq_handler = rt5033_pmic_buck_irq_handlers;
irq_handler_size = ARRAY_SIZE(rt5033_pmic_buck_irq_handlers);
break;
default:
pr_err("Error : invalid ID\n");
}
ret = register_irq(pdev, rdev, irq_handler, irq_handler_size);
if (ret < 0) {
pr_err("Error : can't register irq\n");
goto err_register_irq;
}
return 0;
err_register_irq:
err_init_device:
regulator_unregister(rdev);
return ret;
}
static int rt5033_fled_probe(struct platform_device *pdev)
{
int ret;
struct rt5033_mfd_chip *chip = dev_get_drvdata(pdev->dev.parent);
struct rt5033_mfd_platform_data *mfd_pdata = chip->dev->platform_data;
struct rt5033_fled_platform_data *pdata;
rt5033_fled_info_t *fled_info;
RT5033_FLED_INFO("Richtek RT5033 FlashLED driver probing...\n");
#ifdef CONFIG_OF
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
if (pdev->dev.parent->of_node) {
pdev->dev.of_node = of_find_compatible_node(
of_node_get(pdev->dev.parent->of_node), NULL,
rt5033_fled_match_table[0].compatible);
}
#endif
#endif
if (pdev->dev.of_node) {
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata) {
dev_err(&pdev->dev, "Failed to allocate memory\n");
ret = -ENOMEM;
goto err_parse_dt_nomem;
}
ret = rt5033_fled_parse_dt(&pdev->dev, pdata);
if (ret < 0)
goto err_parse_dt;
} else {
BUG_ON(mfd_pdata == NULL);
if (mfd_pdata->fled_platform_data)
pdata = mfd_pdata->fled_platform_data;
else
pdata = &rt5033_default_fled_pdata;
}
fled_info = kzalloc(sizeof(*fled_info), GFP_KERNEL);
if (!fled_info) {
ret = -ENOMEM;
goto err_fled_nomem;
}
mutex_init(&fled_info->led_lock);
fled_info->i2c_client = chip->i2c_client;
fled_info->base.init_props = &rt5033_fled_props;
fled_info->base.hal = &rt5033_fled_hal;
fled_info->pdata = pdata;
fled_info->chip = chip;
chip->fled_info = fled_info;
platform_set_drvdata(pdev, fled_info);
rt_fled_pdev.dev.parent = &(pdev->dev);
ret = platform_device_register(&rt_fled_pdev);
if (ret < 0)
goto err_register_pdev;
ret = register_irq(pdev, fled_info);
if (ret < 0) {
RT5033_FLED_ERR("Error : can't register irq\n");
goto err_register_irq;
}
#ifdef CONFIG_VIDEO_EXYNOS_FIMC_IS
/* Create Samsung Flash Sysfs */
create_flash_sysfs(fled_info);
#endif
return 0;
err_register_irq:
err_register_pdev:
kfree(fled_info);
err_fled_nomem:
err_parse_dt:
err_parse_dt_nomem:
return ret;
}
DDE_WEAK int request_threaded_irq(unsigned int irq, irq_handler_t handler,
irq_handler_t thread_fn, unsigned long flags, const char * name, void * dev) {
register_irq(irq, handler, NULL);
//dde_printf("request_threaded_irq not implemented\n");
return 0;
}
static int rt5033_regulator_probe(struct platform_device *pdev)
{
struct rt5033_mfd_chip *chip = dev_get_drvdata(pdev->dev.parent);
struct rt5033_mfd_platform_data *mfd_pdata = chip->dev->platform_data;
const struct rt5033_regulator_platform_data* pdata;
const struct rt5033_pmic_irq_handler *irq_handler = NULL;
int irq_handler_size = 0;
struct rt5033_regulator_info *ri;
struct regulator_dev *rdev;
struct regulator_init_data* init_data;
int ret;
dev_info(&pdev->dev, "Richtek RT5033 regulator driver probing (id = %d)...\n", pdev->id);
chip_rev = chip->rev_id;
#ifdef CONFIG_OF
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
if (pdev->dev.parent->of_node) {
pdev->dev.of_node = of_find_compatible_node(
of_node_get(pdev->dev.parent->of_node), NULL,
rt5033_regulator_match_table[pdev->id].compatible);
}
#endif
#endif
if (pdev->dev.of_node) {
dev_info(&pdev->dev, "Use DT...\n");
#if (LINUX_VERSION_CODE>=KERNEL_VERSION(3,1,0))
init_data = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node);
#else
init_data = of_get_regulator_init_data(&pdev->dev);
#endif
if (init_data == NULL) {
dev_info(&pdev->dev, "Cannot find DTS data...\n");
init_data = default_rv_pdata.regulator[pdev->id];
}
}
else {
BUG_ON(mfd_pdata == NULL);
if (mfd_pdata->regulator_platform_data == NULL)
mfd_pdata->regulator_platform_data = &default_rv_pdata;
pdata = mfd_pdata->regulator_platform_data;
init_data = pdata->regulator[pdev->id];
}
ri = find_regulator_info(pdev->id);
if (ri == NULL) {
dev_err(&pdev->dev, "invalid regulator ID specified\n");
return -EINVAL;
}
if (init_data == NULL) {
dev_err(&pdev->dev, "no initializing data\n");
return -EINVAL;
}
ri->i2c = chip->i2c_client;
ri->chip = chip;
chip->regulator_info[pdev->id] = ri;
rdev = rt5033_regulator_register(&ri->desc, &pdev->dev,
init_data, ri);
if (IS_ERR(rdev)) {
dev_err(&pdev->dev, "failed to register regulator %s\n",
ri->desc.name);
return PTR_ERR(rdev);
}
platform_set_drvdata(pdev, rdev);
ret = rt5033_regulator_init_regs(rdev);
if (ret<0)
goto err_init_device;
dev_info(&pdev->dev, "RT5033 Regulator %s driver loaded successfully...\n",
rdev->desc->name);
switch (pdev->id)
{
case RT5033_ID_LDO_SAFE:
irq_handler = rt5033_pmic_safeldo_irq_handlers;
irq_handler_size = ARRAY_SIZE(rt5033_pmic_safeldo_irq_handlers);
break;
case RT5033_ID_LDO1:
irq_handler = rt5033_pmic_ldo_irq_handlers;
irq_handler_size = ARRAY_SIZE(rt5033_pmic_ldo_irq_handlers);
break;
case RT5033_ID_DCDC1:
irq_handler = rt5033_pmic_buck_irq_handlers;
irq_handler_size = ARRAY_SIZE(rt5033_pmic_buck_irq_handlers);
break;
default:
pr_err("Error : invalid ID\n");
}
ret = register_irq(pdev, rdev, irq_handler, irq_handler_size);
if (ret < 0) {
pr_err("Error : can't register irq\n");
goto err_register_irq;
}
return 0;
err_register_irq:
err_init_device:
dev_info(&pdev->dev, "RT5033 Regulator %s unregistered...\n",
rdev->desc->name);
regulator_unregister(rdev);
return ret;
}
/**
* Initialize ethernet device structures.
* @param devptr ETH device table entry
* @return OK if device is intialized successfully, otherwise SYSERR
*/
devcall etherInit(device *devptr)
{
struct ether *ethptr;
struct ag71xx *nicptr;
uint *rstptr;
uint rstbit;
/* Initialize structure pointers */
ethptr = ðertab[devptr->minor];
bzero(ethptr, sizeof(struct ether));
ethptr->dev = devptr;
ethptr->csr = devptr->csr;
nicptr = (struct ag71xx *)devptr->csr;
rstptr = (uint *)RESET_CORE;
if (0 == devptr->minor)
{
rstbit = RESET_E0_MAC;
}
else
{
rstbit = RESET_E1_MAC;
}
ethptr->state = ETH_STATE_DOWN;
ethptr->rxRingSize = ETH_RX_RING_ENTRIES;
ethptr->txRingSize = ETH_TX_RING_ENTRIES;
ethptr->mtu = ETH_MTU;
ethptr->interruptMask = IRQ_TX_PKTSENT | IRQ_TX_BUSERR
| IRQ_RX_PKTRECV | IRQ_RX_OVERFLOW | IRQ_RX_BUSERR;
ethptr->errors = 0;
ethptr->isema = semcreate(0);
ethptr->istart = 0;
ethptr->icount = 0;
ethptr->ovrrun = 0;
ethptr->rxOffset = ETH_PKT_RESERVE;
// FIXME: Actual MAC lookup in nvram.
/* Lookup canonical MAC in NVRAM, and store in ether struct */
// colon2mac(nvramGet("et0macaddr"), ethptr->devAddress);
char mac[] = { 0x00, 0x01, 0x36, 0x22, 0x7e, 0xf1 };
memcpy(ethptr->devAddress, mac, ETH_ADDR_LEN);
ethptr->addressLength = ETH_ADDR_LEN;
// Reset the device.
nicptr->macConfig1 |= MAC_CFG1_SOFTRESET;
udelay(20);
*rstptr |= rstbit;
mdelay(100);
*rstptr &= ~rstbit;
mdelay(100);
// Enable Tx and Rx.
nicptr->macConfig1 = MAC_CFG1_TX | MAC_CFG1_SYNC_TX |
MAC_CFG1_RX | MAC_CFG1_SYNC_RX;
// Configure full duplex, auto padding CRC, and interface mode.
nicptr->macConfig2 |=
MAC_CFG2_FDX | MAC_CFG2_PAD | MAC_CFG2_LEN_CHECK |
MAC_CFG2_IMNIBBLE;
// Enable FIFO modules.
nicptr->fifoConfig0 = FIFO_CFG0_WTMENREQ | FIFO_CFG0_SRFENREQ |
FIFO_CFG0_FRFENREQ | FIFO_CFG0_STFENREQ | FIFO_CFG0_FTFENREQ;
// FIXME
// -> ag71xx_mii_ctrl_set_if(ag, pdata->mii_if);
// Stores a '1' in 0x18070000 (MII mode)
// Stores a '1' in 0x18070004 (RMII mode)
// FRRD may be asserted only after the completion of the input frame.
nicptr->fifoConfig1 = 0x0FFF0000;
// Max out number of words to store in Rx RAM;
nicptr->fifoConfig2 = 0x00001FFF;
// Drop anything with errors in the Rx stats vector.
nicptr->fifoConfig4 = 0x0003FFFF;
// Drop short packets, set "don't care" on Rx stats vector bits.
nicptr->fifoConfig5 = 0x0003FFFF;
/* NOTE: because device initialization runs early in the system, */
/* we are assured that this stkget() call will return */
/* page-aligned (and cache-aligned) boundaries. */
ethptr->rxBufs = stkget(PAGE_SIZE);
ethptr->txBufs = stkget(PAGE_SIZE);
ethptr->rxRing = stkget(PAGE_SIZE);
ethptr->txRing = stkget(PAGE_SIZE);
if ((SYSERR == (int)ethptr->rxBufs)
|| (SYSERR == (int)ethptr->txBufs)
|| (SYSERR == (int)ethptr->rxRing)
|| (SYSERR == (int)ethptr->txRing))
{
#ifdef DETAIL
kprintf("eth%d ring buffer allocation error.\r\n", devptr->minor);
#endif /* DETAIL */
return SYSERR;
}
/* bump buffer pointers/rings to KSEG1 */
ethptr->rxBufs =
(struct ethPktBuffer
**)(((ulong)ethptr->rxBufs - PAGE_SIZE +
sizeof(int)) | KSEG1_BASE);
ethptr->txBufs =
(struct ethPktBuffer
**)(((ulong)ethptr->txBufs - PAGE_SIZE +
sizeof(int)) | KSEG1_BASE);
ethptr->rxRing =
(struct dmaDescriptor
*)(((ulong)ethptr->rxRing - PAGE_SIZE +
sizeof(int)) | KSEG1_BASE);
ethptr->txRing =
(struct dmaDescriptor
*)(((ulong)ethptr->txRing - PAGE_SIZE +
sizeof(int)) | KSEG1_BASE);
/* Zero out the buffer pointers and rings */
bzero(ethptr->rxBufs, PAGE_SIZE);
bzero(ethptr->txBufs, PAGE_SIZE);
bzero(ethptr->rxRing, PAGE_SIZE);
bzero(ethptr->txRing, PAGE_SIZE);
register_irq(devptr->irq, devptr->intr);
enable_irq(devptr->irq);
return OK;
}
static void
pciproxy_init_irq(pciproxy_device_t *pdev)
{
mol_device_node_t *pci_node;
unsigned char ipin;
u32 dummy = 0;
u32 *irqmap, *newirqmap, *p, *irqmapmask;
u32 default_mask[4] = { 0x0000f800, 0x00000000, 0x00000000, 0x00000000 };
int len, mlen;
int parent;
/* check wether the device needs an interrupt */
pciproxy_do_read_config(pdev->fd_config, PCI_INTERRUPT_PIN, &ipin, 1);
if (ipin == 0)
/* no interrupt needed */
return;
/* our device always uses pin 1 */
dummy = 1;
prom_add_property(pdev->dev_node, "interrupts", (char *) &dummy, sizeof(u32));
/* read the property mol-interrupt. it is not a standard property but we allow the user to
* set it in order to to specify the interrupt line to use.
*/
if (prom_get_int_property(pdev->dev_node, "mol-interrupt", &(pdev->irq))) {
/* not specified, assign an interrupt */
if (pciproxy_next_irq > PCIPROXY_ASSIGN_IRQ_HIGH) {
/* out of interrupts */
PPLOG("out of assignable interrupts, some proxied devices won't work");
PPLOG("you can workaround this problem by assigning interrupts by hand");
return;
}
pdev->irq = pciproxy_next_irq++;
}
/* tell the pic about the irq */
register_irq(&pdev->irq);
/* now we need to install an interrupt mapping in the pci bridge device tree node */
pci_node = prom_find_dev_by_path("/pci");
if (pci_node == NULL) {
/* should never happen */
PPLOG("pci bridge disappeared in device tree, cannot map interrupt");
return;
}
irqmap = (u32 *) prom_get_property(pci_node, "interrupt-map", &len);
if (irqmap == NULL) {
PPLOG("warning: pci bridge is missing interrupt-map property!");
len = 0;
}
irqmapmask = (u32 *) prom_get_property(pci_node, "interrupt-map-mask", &mlen);
if (irqmapmask == NULL) {
PPLOG("warning: pci bridge is missing interrupt-map-mask property!");
irqmapmask = default_mask;
} else if (mlen < 4 * sizeof(u32)) {
PPLOG("warning: invalid interrupt-map-mask property at pci bridge!");
irqmapmask = default_mask;
}
/* XXX: the following code is very PIC-implementation-dependent, because we do not care
* about lengths... */
if (prom_get_int_property(pci_node, "interrupt-parent", &parent)) {
PPLOG("warning: pci bridge is missing interrupt-parent property!");
/* what do do? */
parent = 0;
}
newirqmap = (u32 *) alloca(len + 6 * sizeof(u32));
memcpy(newirqmap, irqmap, len);
p = (u32 *) ((char *) newirqmap + len);
/* add our entry */
p[0] = ((pdev->addr & 0xffff) << 8) & irqmapmask[0];
p[1] = p[2] = 0;
/* MOLs interrupt mask doesn't even care about the interrupt pin */
p[3] = 1 & irqmapmask[3];
p[4] = parent;
p[5] = pdev->irq;
/* write the patched interrupt mapping */
prom_add_property(pci_node, "interrupt-map", (char *) newirqmap,
len + sizeof(u32) * 6);
/* grab the irq of the physical device */
pciproxy_grab_physical_irq(pdev);
}
