c64::c64() :
c64env(&m_scheduler),
m_cpuFreq(getCpuFreq(PAL_B)),
cpu(this),
cia1(this),
cia2(this),
vic(this),
mmu(&m_scheduler, &ioBank)
{
resetIoBank();
}
void c64::clearSids()
{
sidBank.setSID(0);
resetIoBank();
for(sidBankMap_t::const_iterator it = extraSidBanks.begin(); it != extraSidBanks.end(); ++it)
{
delete it->second;
}
extraSidBanks.clear();
}
void c64::setSecondSIDAddress(int sidChipBase2)
{
resetIoBank();
// Check for valid address in the IO area range ($dxxx)
if (sidChipBase2 == 0 || ((sidChipBase2 & 0xf000) != 0xd000))
return;
const int idx = (sidChipBase2 >> 8) & 0xf;
/*
* Only allow second SID chip in SID area ($d400-$d7ff)
* or IO Area ($de00-$dfff)
*/
if (idx < 0x4 || (idx > 0x7 && idx < 0xe))
return;
extraSidBank.resetSIDMapper(ioBank.getBank(idx));
ioBank.setBank(idx, &extraSidBank);
extraSidBank.setSIDMapping(sidChipBase2);
}
