blargg_err_t SNES_SPC::load_spc( void const* data, long size ) { spc_file_t const* const spc = (spc_file_t const*) data; // be sure compiler didn't insert any padding into fle_t assert( sizeof (spc_file_t) == spc_min_file_size + 0x80 ); // Check signature and file size if ( size < signature_size || memcmp( spc, signature, 27 ) ) return "Not an SPC file"; if ( size < spc_min_file_size ) return "Corrupt SPC file"; // CPU registers m.cpu_regs.pc = spc->pch * 0x100 + spc->pcl; m.cpu_regs.a = spc->a; m.cpu_regs.x = spc->x; m.cpu_regs.y = spc->y; m.cpu_regs.psw = spc->psw; m.cpu_regs.sp = spc->sp; // RAM and registers memcpy( RAM, spc->ram, 0x10000 ); ram_loaded(); // DSP registers dsp.load( spc->dsp ); reset_time_regs(); return 0; }
blargg_err_t SNES_SPC::load_spc( void const* data, long size ) { spc_file_t const* const spc = (spc_file_t const*) data; // be sure compiler didn't insert any padding into fle_t assert( sizeof (spc_file_t) == spc_min_file_size + 0x80 ); // Check signature and file size if ( size < signature_size || memcmp( spc, signature, 27 ) ) return "Not an SPC file"; if ( size < spc_min_file_size ) return "Corrupt SPC file"; // CPU registers smp->SetRegPc(spc->pch * 0x100 + spc->pcl); smp->SetRegA(spc->a); smp->SetRegX(spc->x); smp->SetRegY(spc->y); smp->SetPsw(spc->psw); smp->SetRegSp(spc->sp); // RAM and registers memcpy( ram, spc->ram, 0x10000 ); ram_loaded(); // DSP registers dsp->load( spc->dsp ); reset_time_regs(); return 0; }
void SNES_SPC::reset_common( int timer_counter_init ) { int i; for ( i = 0; i < timer_count; i++ ) REGS_IN [r_t0out + i] = timer_counter_init; smp->Reset(); REGS [r_test ] = 0x0A; REGS [r_control] = 0xB0; // ROM enabled, clear ports for ( i = 0; i < port_count; i++ ) REGS_IN [r_cpuio0 + i] = 0; reset_time_regs(); }
void SNES_SPC::reset_common( int timer_counter_init ) { int i; for ( i = 0; i < timer_count; i++ ) REGS_IN [r_t0out + i] = timer_counter_init; // Run IPL ROM memset( &m.cpu_regs, 0, sizeof m.cpu_regs ); m.cpu_regs.pc = rom_addr; REGS [r_test ] = 0x0A; REGS [r_control] = 0xB0; // ROM enabled, clear ports for ( i = 0; i < port_count; i++ ) REGS_IN [r_cpuio0 + i] = 0; reset_time_regs(); }