void rk610_codec_reg_set(void)
{
struct snd_soc_codec *codec = rk610_codec_codec;
struct rk610_codec_priv *rk610_codec =snd_soc_codec_get_drvdata(codec);
struct rk610_codec_platform_data *pdata= rk610_codec->pdata;
unsigned int digital_gain;
unsigned int mic_vol = Volume_Input;
rk610_codec_write(codec,ACCELCODEC_R1D, 0x30);
rk610_codec_write(codec,ACCELCODEC_R1E, 0x40);
#ifdef USE_LPF
// Route R-LPF->R-Mixer, L-LPF->L-Mixer
rk610_codec_write(codec,ACCELCODEC_R15, 0xC1);
#else
// Route RDAC->R-Mixer, LDAC->L->Mixer
rk610_codec_write(codec,ACCELCODEC_R15, 0x0C);
#endif
// With Cap Output, VMID ramp up slow
rk610_codec_write(codec,ACCELCODEC_R1A, 0x14);
mdelay(10);
rk610_codec_write(codec,ACCELCODEC_R0C, 0x10|ASC_INPUT_VOL_0DB); //LIL
rk610_codec_write(codec,ACCELCODEC_R0D, 0x10|ASC_INPUT_VOL_0DB); //LIR
#ifdef USE_MIC_IN
if(mic_vol > 0x07)
{
rk610_codec_write(codec,ACCELCODEC_R12, 0x4c|ASC_MIC_INPUT|ASC_MIC_BOOST_20DB); //Select MIC input
mic_vol -= 0x07;
}
else
rk610_codec_write(codec,ACCELCODEC_R12, 0x4c|ASC_MIC_INPUT); //Select MIC input
rk610_codec_write(codec,ACCELCODEC_R1C, ASC_DEM_ENABLE); //0x00); //use default value
#else
rk610_codec_write(codec,ACCELCODEC_R12, 0x4c); //Select Line input
#endif
rk610_codec_write(codec,ACCELCODEC_R0E, 0x10|mic_vol); //MIC
// Diable route PGA->R/L Mixer, PGA gain 0db.
rk610_codec_write(codec,ACCELCODEC_R13, 0x05 | 0 << 3);
rk610_codec_write(codec,ACCELCODEC_R14, 0x05 | 0 << 3);
//2soft mute
rk610_codec_write(codec,ACCELCODEC_R04, ASC_INT_MUTE_L|ASC_INT_MUTE_R|ASC_SIDETONE_L_OFF|ASC_SIDETONE_R_OFF); //soft mute
//2set default SR and clk
rk610_codec_write(codec,ACCELCODEC_R0A, ASC_NORMAL_MODE|(0x10 << 1)|ASC_CLKNODIV|ASC_CLK_DISABLE);
gR0AReg = ASC_NORMAL_MODE|(0x10 << 1)|ASC_CLKNODIV|ASC_CLK_DISABLE;
//2Config audio interface
rk610_codec_write(codec,ACCELCODEC_R09, ASC_I2S_MODE|ASC_16BIT_MODE|ASC_NORMAL_LRCLK|ASC_LRSWAP_DISABLE|ASC_SLAVE_MODE|ASC_NORMAL_BCLK);
rk610_codec_write(codec,ACCELCODEC_R00, ASC_HPF_ENABLE|ASC_DSM_MODE_ENABLE|ASC_SCRAMBLE_ENABLE|ASC_DITHER_ENABLE|ASC_BCLKDIV_4);
//2volume,input,output
digital_gain = Volume_Output;
if(rk610_codec_read(codec,ACCELCODEC_R05)!=0x0f) {
rk610_codec_write(codec,ACCELCODEC_R05, (digital_gain >> 8) & 0xFF);
rk610_codec_write(codec,ACCELCODEC_R06, digital_gain & 0xFF);
}
void rk610_codec_reg_read(void)
{
struct snd_soc_codec *codec = rk610_codec_codec;
int i;
unsigned int data;
for (i=0; i<=0x1f; i++){
data = rk610_codec_read(codec, i);
printk("reg[0x%x]=0x%x\n",i,data);
}
}
static ssize_t RK610_PROC_write(struct file *file, const char __user *buffer,
unsigned long len, void *data)
{
char *cookie_pot;
char *p;
int reg;
int value;
cookie_pot = (char *)vmalloc( len );
if (!cookie_pot)
{
return -ENOMEM;
}
else
{
if (copy_from_user( cookie_pot, buffer, len ))
return -EFAULT;
}
switch(cookie_pot[0])
{
case 'p':
spk_ctrl_fun(GPIO_HIGH);
break;
case 'o':
spk_ctrl_fun(GPIO_LOW);
break;
case 'r':
case 'R':
printk("Read reg debug\n");
if(cookie_pot[1] ==':')
{
strsep(&cookie_pot,":");
while((p=strsep(&cookie_pot,",")))
{
reg = simple_strtol(p,NULL,16);
value = rk610_codec_read(rk610_codec_codec,reg);
printk("wm8994_read:0x%04x = 0x%04x\n",reg,value);
}
printk("\n");
}
else
{
printk("Error Read reg debug.\n");
printk("For example: echo 'r:22,23,24,25'>wm8994_ts\n");
}
break;
case 'w':
case 'W':
printk("Write reg debug\n");
if(cookie_pot[1] ==':')
{
strsep(&cookie_pot,":");
while((p=strsep(&cookie_pot,"=")))
{
reg = simple_strtol(p,NULL,16);
p=strsep(&cookie_pot,",");
value = simple_strtol(p,NULL,16);
rk610_codec_write(rk610_codec_codec,reg,value);
printk("wm8994_write:0x%04x = 0x%04x\n",reg,value);
}
printk("\n");
}
else
{
printk("Error Write reg debug.\n");
printk("For example: w:22=0,23=0,24=0,25=0\n");
}
break;
case 'D' :
printk("Dump reg\n");
rk610_codec_reg_read();
break;
}
return len;
}
