Exemple #1
0
/*
 * Probe for the device
 */
static int __init rk28_sdmmc0_probe(struct platform_device *pdev)
{
    struct mmc_host *mmc;
    struct rk28mci_host *host;
    struct resource *res;
    int ret;


    res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
    if (!res)
        return -ENXIO;

    if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
        return -EBUSY;

    mmc = mmc_alloc_host(sizeof(struct rk28mci_host), &pdev->dev);
    if (!mmc)
    {
        ret = -ENOMEM;
        dev_dbg(&pdev->dev, "couldn't allocate mmc host\n");
        goto fail6;


    }

    mmc->ops = &rk28_sdmmc0_ops;
    mmc->f_min = FOD_FREQ * 1000;
    mmc->f_max = SDHC_FPP_FREQ;
    mmc->ocr_avail = MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31
                     | MMC_VDD_31_32|MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_34_35| MMC_VDD_35_36;    ///set valid volage 2.7---3.6
                     
    //printk("%s..%s..%d ********host availd ocr=0x%x====xbw===*******************\n",__FUNCTION__,__FILE__,__LINE__, mmc->ocr_avail);

    mmc->max_blk_size = 4095;
    mmc->max_blk_count = 1024; 
    mmc->max_req_size = mmc->max_blk_count*512; // 512K
    mmc->max_seg_size = mmc->max_req_size;
    
    host = mmc_priv(mmc);
    host->mmc = mmc;
    host->buffer = NULL;
    host->bus_mode = 0;
    host->board = pdev->dev.platform_data;

    host->res = res;
    
    testhost = host; 

    sd_cdt_resume = 0;
    sd_is_suspend_mmc = 0;
    sd_is_suspend_block = 0;
    do_Resume = 0;
    
    host->cmdr = 0;
    host->lockscu = 0; //no lock SCU
    host->cmderror = 0;


    host->complete_dma = 0; //DMA channel has not request.
    host->requestDmaError = 0;//

    setup_timer(&host->switch_timer, rk28_sdmmc0_switch_timer, (unsigned long) host);

    spin_lock_init(&host->complete_lock);
/*
android_suspend_lock_t sdmmc0_request_lock;     //used to the phase of request.
android_suspend_lock_t sdmmc0_full_wake_lock;   //used to the phase of removal/insertion,
android_suspend_lock_t sdmmc0_rescan_lock;      //used to the phase of rescaning the card.
android_suspend_lock_t sdmmc0_initSd_lock;      //used to the phase of initialization. 
android_suspend_lock_t sdmmc0_rw_prcess_lock;   //used to the phase of Read/Write.
*/

#ifdef CONFIG_ANDROID_POWER
	sdmmc0_request_lock.name = "sdmmc-Req";
	android_init_suspend_lock(&sdmmc0_request_lock);
	
	sdmmc0_full_wake_lock.name = "sdmmc-full-Req";
	android_init_suspend_lock(&sdmmc0_full_wake_lock);

	sdmmc0_rescan_lock.name = "sdmmc-rescan";
	android_init_suspend_lock(&sdmmc0_rescan_lock);
	
	sdmmc0_initSd_lock.name = "sdmmc-initsd";
	android_init_suspend_lock(&sdmmc0_initSd_lock);
	
	sdmmc0_rw_prcess_lock.name = "sdmmc-rw";
	android_init_suspend_lock(&sdmmc0_rw_prcess_lock);	
#endif

    sdmmc0_disable_Irq_ForRemoval = 0;
    spin_lock_init( &sdmmc0_spinlock);

    mmc->caps |=  ( MMC_CAP_MULTIWRITE | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED);
    
    if (1)//if (host->board->wire4)
    {
        mmc->caps |= MMC_CAP_4_BIT_DATA;
    }

    /*
     * Map I/O region
     */
    host->baseaddr = (void * __iomem)SDMMC0_BASE_ADDR_VA; //
    if (!host->baseaddr)
    {
        ret = -ENOMEM;
        goto fail1;
    }

   
    //register SCU
    rockchip_scu_register( SCU_IPID_SDMMC0, SCU_MODE_FREQ, 50, NULL); 


    /*
     * Allocate the MCI interrupt
     */
    host->irq = platform_get_irq(pdev, 0);
    ret = request_irq(host->irq, rk28_sdmmc_irq, IRQF_SHARED, mmc_hostname(mmc), host);
    if (ret)
    {
        printk("%s..%s..%d **********request irq failue====xbw===*******************\n",__FUNCTION__,__FILE__,__LINE__);
        goto fail0;
    }

    platform_set_drvdata(pdev, mmc);
    
    //printk("%s..%s..%d **********SD probe Over. now it begin to mmc_add_host====xbw===*******************\n",__FUNCTION__,__FILE__,__LINE__);

    mmc_add_host(mmc);
    rk28_sdmmc0_add_attr(pdev);
    return 0;

fail0:
    iounmap(host->baseaddr);
    
fail1:
    mmc_free_host(mmc);
fail6:
    release_mem_region(res->start, res->end - res->start + 1);
    dev_err(&pdev->dev, "probe failed, err %d\n", ret);

    return ret;
}
Exemple #2
0
static int __init rk28_sdio_probe(struct platform_device *pdev)
{
	int ret = 0;
	struct resource *res;
	struct mmc_host *mci_host;
	struct rk28_sdio_priv *host_priv;
	
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENXIO;
	
	if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
		return -EBUSY;
	
	mci_host = mmc_alloc_host(sizeof(struct rk28_sdio_priv), &pdev->dev);
	if (mci_host == NULL)
	{
		printk("Allocate MCI host fail.\n");
		ret = -ENOMEM;
		goto release_region;
	}
	
	/* Initiating mci_host */
	mci_host->ops = &rk28_sdio_host_ops;
	mci_host->f_min = 370000;		//370kHz~25MHz
	mci_host->f_max = 25000000;
	
	mci_host->ocr_avail = MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
									 			MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33 | MMC_VDD_33_34;
	mci_host->max_blk_size = 4095;
	mci_host->max_blk_count = mci_host->max_req_size;
	mci_host->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;

#if (SDIO_DATA_WIDTH == SDIO_DATA_WIDTH_4)
	mci_host->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
#endif

	host_priv = mmc_priv(mci_host);
	memset(host_priv, 0, sizeof(struct rk28_sdio_priv));
	host_priv->mmc = mci_host;
	host_priv->iomem_base = (void * __iomem)SDMMC1_BASE_ADDR_VA;
	host_priv->lock = SPIN_LOCK_UNLOCKED;
	host_priv->dma_chan = -1;

	ret = rk28_dma_request(RK28_DMA_SD_MMC1, rk28_sdio_dma_done, host_priv);
	if (ret != 0)
  {
    printk("Request DMA channel for SDMMC1 failed.\n");
  	goto free_host;
  }

  host_priv->dma_chan = RK28_DMA_SD_MMC1;
	rk28_sdio_dma_switch(host_priv, DO_ENABLE, DO_LOCK);
	
	if (rk28_sdio_hw_init(host_priv) != 0)
	{
		ret = -ENXIO;
		goto free_host;
	}
	
	host_priv->irq = platform_get_irq(pdev, 0);
	ret = request_irq(host_priv->irq, rk28_sdio_mci_irq, IRQF_SHARED, 
										mmc_hostname(mci_host), host_priv);
	if (ret != 0) 
	{
    printk("Request IRQ for RK28 Host fail.\n");
		ret = -ENOMEM;
		goto free_host;
	}

	platform_set_drvdata(pdev, mci_host);

	/*
	 * Max frequency of AHB is  166, for guarantee divider=6,
	 * we set the max frequency for SDMMC1 as 26.
	 */
	rockchip_scu_register( SCU_IPID_SDMMC1, SCU_MODE_FREQ, 26, NULL);
	
	mmc_add_host(mci_host);
	
	wifi_mmc_host = mci_host;
	
	rk28_sdio_host_irq_switch(host_priv, DO_ENABLE);

	return 0;
	
free_host:
	mmc_free_host(mci_host);
	
release_region:
	release_mem_region(res->start, res->end - res->start + 1);
	
	return ret;
}