sys_prot_t sys_arch_protect(void)
{
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
return level;
}
SECTION("itcm") status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address)
{
status_t status;
flexspi_transfer_t flashXfer;
rt_uint32_t level;
level = rt_hw_interrupt_disable();
FLEXSPI_Enable(FLEXSPI, false);
CLOCK_DisableClock(FLEXSPI_CLOCK);
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3); /* flexspi clock 332M, DDR mode, internal clock 166M. */
CLOCK_EnableClock(FLEXSPI_CLOCK);
FLEXSPI_Enable(FLEXSPI, true);
/* Write enable */
status = flexspi_nor_write_enable(base, address);
if (status != kStatus_Success)
{
FLEXSPI_Enable(FLEXSPI, false);
CLOCK_DisableClock(FLEXSPI_CLOCK);
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0); /* flexspi clock 332M, DDR mode, internal clock 166M. */
CLOCK_EnableClock(FLEXSPI_CLOCK);
FLEXSPI_Enable(FLEXSPI, true);
FLEXSPI_SoftwareReset(FLEXSPI);
rt_hw_interrupt_enable(level);
return status;
}
flashXfer.deviceAddress = address;
flashXfer.port = kFLEXSPI_PortA1;
flashXfer.cmdType = kFLEXSPI_Command;
flashXfer.SeqNumber = 4;
flashXfer.seqIndex = HYPERFLASH_CMD_LUT_SEQ_IDX_ERASESECTOR;
status = FLEXSPI_TransferBlocking(base, &flashXfer);
if (status != kStatus_Success)
{
FLEXSPI_Enable(FLEXSPI, false);
CLOCK_DisableClock(FLEXSPI_CLOCK);
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0); /* flexspi clock 332M, DDR mode, internal clock 166M. */
CLOCK_EnableClock(FLEXSPI_CLOCK);
FLEXSPI_Enable(FLEXSPI, true);
FLEXSPI_SoftwareReset(FLEXSPI);
rt_hw_interrupt_enable(level);
return status;
}
status = flexspi_nor_wait_bus_busy(base);
rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE,(void *)(FLEXSPI_AMBA_BASE+address),FLEXSPI_NOR_SECTOR_SIZE);
rt_hw_cpu_icache_ops(RT_HW_CACHE_INVALIDATE,(void *)(FLEXSPI_AMBA_BASE+address),FLEXSPI_NOR_SECTOR_SIZE);
FLEXSPI_Enable(FLEXSPI, false);
CLOCK_DisableClock(FLEXSPI_CLOCK);
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0); /* flexspi clock 332M, DDR mode, internal clock 166M. */
CLOCK_EnableClock(FLEXSPI_CLOCK);
FLEXSPI_Enable(FLEXSPI, true);
FLEXSPI_SoftwareReset(FLEXSPI);
rt_hw_interrupt_enable(level);
return status;
}
int rt_thread_kill(rt_thread_t tid, int sig)
{
siginfo_t si;
rt_base_t level;
struct siginfo_node *si_node;
RT_ASSERT(tid != RT_NULL);
if (!sig_valid(sig)) return -RT_EINVAL;
dbg_log(DBG_INFO, "send signal: %d\n", sig);
si.si_errno = RT_EINTR;
si.si_signo = sig;
si.si_code = SI_USER;
si.si_value.sival_ptr = RT_NULL;
level = rt_hw_interrupt_disable();
if (tid->sig_pending & sig_mask(sig))
{
/* whether already emits this signal? */
struct rt_slist_node *node;
struct siginfo_node *entry;
node = (struct rt_slist_node *)tid->si_list;
rt_hw_interrupt_enable(level);
/* update sig infor */
rt_enter_critical();
for (; (node) != RT_NULL; node = node->next)
{
entry = rt_slist_entry(node, struct siginfo_node, list);
if (entry->si.si_signo == sig)
{
memcpy(&(entry->si), &si, sizeof(siginfo_t));
rt_exit_critical();
return 0;
}
}
rt_exit_critical();
/* disable interrupt to protect tcb */
level = rt_hw_interrupt_disable();
}
else
{
static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_uint8_t* ptr;
struct rt_ppc405_serial* device;
device = (struct rt_ppc405_serial*) dev;
RT_ASSERT(device != RT_NULL);
/* point to buffer */
ptr = (rt_uint8_t*) buffer;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
while (size)
{
/* interrupt receive */
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
if (device->read_index != device->save_index)
{
*ptr = device->rx_buffer[device->read_index];
device->read_index ++;
if (device->read_index >= RT_UART_RX_BUFFER_SIZE)
device->read_index = 0;
}
else
{
/* no data in rx buffer */
/* enable interrupt */
rt_hw_interrupt_enable(level);
break;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
ptr ++; size --;
}
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
{
/* not support right now */
RT_ASSERT(0);
}
/* polling mode */
RT_ASSERT(0);
return (rt_size_t)ptr - (rt_size_t)buffer;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
void rt_thread_handle_sig(rt_bool_t clean_state)
{
rt_base_t level;
rt_thread_t tid = rt_thread_self();
struct siginfo_node *si_node;
level = rt_hw_interrupt_disable();
while (tid->sig_pending & tid->sig_mask)
{
int signo, error;
rt_sighandler_t handler;
si_node = (struct siginfo_node *)tid->si_list;
if (!si_node) break;
/* remove this sig info node from list */
if (si_node->list.next == RT_NULL)
tid->si_list = RT_NULL;
else
tid->si_list = (void*)rt_slist_entry(si_node->list.next, struct siginfo_node, list);
signo = si_node->si.si_signo;
handler = tid->sig_vectors[signo];
rt_hw_interrupt_enable(level);
dbg_log(DBG_LOG, "handle signal: %d, handler 0x%08x\n", signo, handler);
if (handler) handler(signo);
level = rt_hw_interrupt_disable();
tid->sig_pending &= ~sig_mask(signo);
error = si_node->si.si_errno;
rt_mp_free(si_node); /* release this siginfo node */
/* set errno in thread tcb */
tid->error = error;
}
/* whether clean signal status */
if (clean_state == RT_TRUE) tid->stat &= ~RT_THREAD_STAT_SIGNAL;
rt_hw_interrupt_enable(level);
}
static void _vcom_reset_state(void)
{
int lvl = rt_hw_interrupt_disable();
tx_ringbuffer.read_mirror = tx_ringbuffer.read_index = 0;
tx_ringbuffer.write_mirror = tx_ringbuffer.write_index = 0;
vcom_connected = RT_FALSE;
vcom_in_sending = RT_FALSE;
/*rt_kprintf("reset USB serial\n", cnt);*/
rt_hw_interrupt_enable(lvl);
}
/**
* This function will be invoked by BSP, when enter interrupt service routine
*
* @note please don't invoke this routine in application
*
* @see rt_interrupt_leave
*/
void rt_interrupt_enter()
{
rt_base_t level;
RT_DEBUG_LOG(RT_DEBUG_IRQ,("irq comming..., irq nest:%d\n", rt_interrupt_nest));
level = rt_hw_interrupt_disable();
rt_interrupt_nest ++;
rt_hw_interrupt_enable(level);
}
/**
* This function will be invoked by BSP, when leave interrupt service routine
*
* @note please don't invoke this routine in application
*
* @see rt_interrupt_enter
*/
void rt_interrupt_leave()
{
rt_base_t level;
RT_DEBUG_LOG(RT_DEBUG_IRQ,("irq leave, irq nest:%d\n", rt_interrupt_nest));
level = rt_hw_interrupt_disable();
rt_interrupt_nest --;
rt_hw_interrupt_enable(level);
}
int main(void)
{
rt_uint32_t level UNUSED;
/* disable interrupt first */
level = rt_hw_interrupt_disable();
rtthread_startup();
return 0;
}
void rt_completion_init(struct rt_completion *completion)
{
rt_base_t level;
RT_ASSERT(completion != RT_NULL);
level = rt_hw_interrupt_disable();
completion->flag = RT_UNCOMPLETED;
rt_list_init(&completion->suspended_list);
rt_hw_interrupt_enable(level);
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* invoke rtthread_startup */
rtthread_startup();
return 0;
}
/** shutdown CPU */
void rt_hw_cpu_shutdown()
{
rt_uint32_t level;
rt_kprintf("shutdown...\n");
level = rt_hw_interrupt_disable();
while (level)
{
RT_ASSERT(0);
}
}
void rt_signal_mask(int signo)
{
rt_base_t level;
rt_thread_t tid = rt_thread_self();
level = rt_hw_interrupt_disable();
tid->sig_mask &= ~sig_mask(signo);
rt_hw_interrupt_enable(level);
}
rt_inline rt_uint32_t serial_ringbuffer_size(struct serial_ringbuffer *rbuffer)
{
rt_uint32_t size;
rt_base_t level;
level = rt_hw_interrupt_disable();
size = (rbuffer->put_index - rbuffer->get_index) & (RT_SERIAL_RB_BUFSZ - 1);
rt_hw_interrupt_enable(level);
return size;
}
/*
* Setup system tick for OS required.
*/
void bsp_init(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
// drv_uart_init();
rt_hw_usart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
/* System tick init */
BSP_Tmr_TickInit(0x1, (MB_PCLK / RT_TICK_PER_SECOND), IRQ_SYS_TICK_VECTOR, SysTick_Handler);
}
int main(void)
{
rt_uint32_t UNUSED level;
/* disable interrupt first */
level = rt_hw_interrupt_disable();
/* invoke rtthread_startup */
rtthread_startup();
return 0;
}
static rt_size_t codec_write(rt_device_t dev, rt_off_t pos,
const void* buffer, rt_size_t size)
{
struct codec_device* device;
struct codec_data_node* node;
rt_uint32_t level;
rt_uint16_t next_index;
device = (struct codec_device*) dev;
RT_ASSERT(device != RT_NULL);
next_index = device->put_index + 1;
if (next_index >= DATA_NODE_MAX)
next_index = 0;
/* check data_list full */
if (next_index == device->read_index)
{
rt_set_errno(-RT_EFULL);
return 0;
}
level = rt_hw_interrupt_disable();
node = &device->data_list[device->put_index];
device->put_index = next_index;
/* set node attribute */
node->data_ptr = (rt_uint16_t*) buffer;
node->data_size = size >> 1; /* size is byte unit, convert to half word unit */
next_index = device->read_index + 1;
if (next_index >= DATA_NODE_MAX)
next_index = 0;
/* check data list whether is empty */
if (next_index == device->put_index)
{
DMA_Configuration((rt_uint32_t) node->data_ptr, node->data_size);
#if CODEC_MASTER_MODE
if ((r06 & MS) == 0)
{
CODEC_I2S_PORT->I2SCFGR |= SPI_I2SCFGR_I2SE;
r06 |= MS;
codec_send(r06);
}
#endif
}
rt_hw_interrupt_enable(level);
return size;
}
void rt_hw_uart_isr(struct rt_lm3s_serial* serial)
{
rt_device_t device;
rt_uint32_t status;
device = (struct rt_device*)serial;
status = MAP_UARTIntStatus(serial->hw_base, true);
/* clear interrupt status */
MAP_UARTIntClear(serial->hw_base, status);
if (device->flag & RT_DEVICE_FLAG_INT_RX)
{
char ch;
rt_base_t level;
while (MAP_UARTCharsAvail(serial->hw_base))
{
ch = MAP_UARTCharGetNonBlocking(serial->hw_base);
/* disable interrupt */
level = rt_hw_interrupt_disable();
/* read character */
serial->rx_buffer[serial->save_index] = ch;
serial->save_index ++;
if (serial->save_index >= RT_UART_RX_BUFFER_SIZE)
serial->save_index = 0;
/* if the next position is read index, discard this 'read char' */
if (serial->save_index == serial->read_index)
{
serial->read_index ++;
if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
serial->read_index = 0;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
/* invoke callback */
if(device->rx_indicate != RT_NULL)
{
rt_int32_t length;
length = serial->save_index - serial->read_index;
if (length < 0) length += RT_UART_RX_BUFFER_SIZE;
device->rx_indicate(device, length);
}
}
}
/**
* set a new password for finsh
*
* @param password new password
*
* @return result, RT_EOK on OK, -RT_ERROR on the new password length is less than
* FINSH_PASSWORD_MIN or greater than FINSH_PASSWORD_MAX
*/
rt_err_t finsh_set_password(const char *password) {
rt_ubase_t level;
rt_size_t pw_len = rt_strlen(password);
if (pw_len < FINSH_PASSWORD_MIN || pw_len > FINSH_PASSWORD_MAX)
return -RT_ERROR;
level = rt_hw_interrupt_disable();
rt_strncpy(shell->password, password, FINSH_PASSWORD_MAX);
rt_hw_interrupt_enable(level);
return RT_EOK;
}
/***************************************************************************//**
* @brief
* Program entry point
*
* @details
*
* @note
*
******************************************************************************/
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* init system setting */
SystemInit();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
/* decrease ipc suspended thread number when thread can not take resource successfully */
rt_inline void rt_ipc_object_decrease(struct rt_ipc_object* ipc)
{
register rt_ubase_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
/* decrease suspended thread count */
ipc->suspend_thread_count --;
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
int main(void)
{
/* C++ global class init */
cplusplus_system_init();
/* disable interrupt first */
rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
static void _signal_deliver(rt_thread_t tid)
{
rt_ubase_t level;
/* thread is not interested in pended signals */
if (!(tid->sig_pending & tid->sig_mask)) return;
level = rt_hw_interrupt_disable();
if (tid->stat == RT_THREAD_SUSPEND)
{
/* resume thread to handle signal */
rt_thread_resume(tid);
/* add signal state */
tid->stat |= RT_THREAD_STAT_SIGNAL;
rt_hw_interrupt_enable(level);
/* re-schedule */
rt_schedule();
}
else
{
if (tid == rt_thread_self())
{
/* add signal state */
tid->stat |= RT_THREAD_STAT_SIGNAL;
rt_hw_interrupt_enable(level);
/* do signal action in self thread context */
rt_thread_handle_sig(RT_TRUE);
}
else if (!(tid->stat & RT_THREAD_STAT_SIGNAL))
{
tid->stat |= RT_THREAD_STAT_SIGNAL;
/* point to the signal handle entry */
tid->sig_ret = tid->sp;
tid->sp = rt_hw_stack_init((void*)_signal_entry, RT_NULL,
(void *)((char *)tid->sig_ret - 32), RT_NULL);
rt_hw_interrupt_enable(level);
dbg_log(DBG_LOG, "signal stack pointer @ 0x%08x\n", tid->sp);
/* re-schedule */
rt_schedule();
}
else
{
rt_hw_interrupt_enable(level);
}
}
}
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* initialize hardware interrupt */
rt_hw_interrupt_init();
/* initialize mmu */
rt_hw_mmu_init(fh_mem_desc, sizeof(fh_mem_desc)/sizeof(fh_mem_desc[0]));
rt_system_heap_init((void*)&__bss_end, (void*)FH_RTT_OS_MEM_END);
#ifdef RT_USING_DMA_MEM
//just use the last 100KB
fh_dma_mem_init((rt_uint32_t *)FH_RTT_OS_MEM_END, FH_DMA_MEM_SIZE);
#endif
/* initialize board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* initialize tick */
rt_system_tick_init();
/* initialize kernel object */
rt_system_object_init();
/* initialize timer system */
rt_system_timer_init();
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize application */
rt_application_init();
/* initialize system timer thread */
rt_system_timer_thread_init();
/* initialize idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
/* Ethernet Rx Thread */
static void eth_rx_thread_entry(void* parameter)
{
struct eth_device* device;
while (1)
{
if (rt_mb_recv(ð_rx_thread_mb, (UInt32*)&device, RT_WAITING_FOREVER) == RT_EOK)
{
struct pbuf *p;
/* check link status */
if (device->link_changed)
{
int status;
UInt32 level;
level = rt_hw_interrupt_disable();
status = device->link_status;
device->link_changed = 0x00;
rt_hw_interrupt_enable(level);
if (status)
netifapi_netif_set_link_up(device->netif);
else
netifapi_netif_set_link_down(device->netif);
}
/* receive all of buffer */
while (1)
{
p = device->eth_rx(&(device->parent));
if (p != NULL)
{
/* notify to upper layer */
if( device->netif->input(p, device->netif) != ERR_OK )
{
LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: Input error\n"));
pbuf_free(p);
p = NULL;
}
}
else break;
}
}
else
{
LWIP_ASSERT("Should not happen!\n",0);
}
}
}
static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
rt_uint8_t *ptr;
rt_err_t err_code;
struct serial_device * serial = SERIAL_DEVICE(dev);
ptr = buffer;
err_code = RT_EOK;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
/* interrupt mode Rx */
while (size)
{
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
if (serial->serial_rx.read_index != serial->serial_rx.save_index)
{
/* read a character */
*ptr++ = serial->serial_rx.rx_buffer[serial->serial_rx.read_index];
size--;
/* move to next position */
serial->serial_rx.read_index ++;
if (serial->serial_rx.read_index >= SERIAL_RX_BUFFER_SIZE)
serial->serial_rx.read_index = 0;
}
else
{
/* set error code */
err_code = -RT_EEMPTY;
/* enable interrupt */
rt_hw_interrupt_enable(level);
break;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
}
/* set error code */
rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
/*******************************************************************************
* Function Name : EP1_IN_Callback
* Description :
* Input : None.
* Output : None.
* Return : None.
*******************************************************************************/
void EP1_IN_Callback (void)
{
rt_uint32_t level;
rt_uint32_t remain;
if (USB_Tx_State == 1)
{
level = rt_hw_interrupt_disable();
remain = RT_RINGBUFFER_SIZE(&tx_ringbuffer);
if (remain == 0)
{
USB_Tx_State = 0;
rt_hw_interrupt_enable(level);
return;
}
else
{
if (remain > VIRTUAL_COM_PORT_DATA_SIZE)
{
remain = VIRTUAL_COM_PORT_DATA_SIZE;
}
/* although vcom_in_sending is set in SOF handler in the very
* beginning, we have to guarantee the state is right when start
* sending. There is at least one extreme case where we have finished the
* last IN transaction but the vcom_in_sending is RT_FALSE.
*
* Ok, what the extreme case is: pour data into vcom in loop. Open
* terminal on the PC, you will see the data. Then close it. So the
* data will be sent to the PC in the back. When the buffer of the PC
* driver is full. It will not send IN packet to the board and you will
* have no chance to clear vcom_in_sending in this function. The data
* will fill into the ringbuffer until it is full, and we will reset
* the state machine and clear vcom_in_sending. When you open the
* terminal on the PC again. The IN packet will appear on the line and
* we will, eventually, reach here with vcom_in_sending is clear.
*/
vcom_in_sending = RT_TRUE;
rt_ringbuffer_get(&tx_ringbuffer, tx_buf, remain);
rt_hw_interrupt_enable(level);
/* send data to host */
UserToPMABufferCopy(tx_buf, ENDP1_TXADDR, remain);
SetEPTxCount(ENDP1, remain);
SetEPTxValid(ENDP1);
//return RT_EOK;
}
}
}
/**
* This function will delete a memory pool and release the object memory.
*
* @param mp the memory pool object
*
* @return RT_EOK
*/
rt_err_t rt_mp_delete(rt_mp_t mp)
{
struct rt_thread *thread;
register rt_ubase_t temp;
RT_DEBUG_NOT_IN_INTERRUPT;
/* parameter check */
RT_ASSERT(mp != RT_NULL);
/* wake up all suspended threads */
while (!rt_list_isempty(&(mp->suspend_thread)))
{
/* disable interrupt */
temp = rt_hw_interrupt_disable();
/* get next suspend thread */
thread = rt_list_entry(mp->suspend_thread.next, struct rt_thread, tlist);
/* set error code to RT_ERROR */
thread->error = -RT_ERROR;
/*
* resume thread
* In rt_thread_resume function, it will remove current thread from suspend
* list
*/
rt_thread_resume(thread);
/* decrease suspended thread count */
mp->suspend_thread_count --;
/* enable interrupt */
rt_hw_interrupt_enable(temp);
}
#if defined(RT_USING_MODULE) && defined(RT_USING_SLAB)
/* the mp object belongs to an application module */
if (mp->parent.flag & RT_OBJECT_FLAG_MODULE)
rt_module_free(mp->parent.module_id, mp->start_address);
else
#endif
/* release allocated room */
rt_free(mp->start_address);
/* detach object */
rt_object_delete(&(mp->parent));
return RT_EOK;
}
SECTION("itcm") status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t address, const uint32_t *src)
{
status_t status;
flexspi_transfer_t flashXfer;
rt_uint32_t level;
level = rt_hw_interrupt_disable();
FLEXSPI_Enable(FLEXSPI, false);
CLOCK_DisableClock(FLEXSPI_CLOCK);
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3); /* flexspi clock 332M, DDR mode, internal clock 166M. */
CLOCK_EnableClock(FLEXSPI_CLOCK);
FLEXSPI_Enable(FLEXSPI, true);
/* Write neable */
status = flexspi_nor_write_enable(base, address);
if (status != kStatus_Success)
{
rt_hw_interrupt_enable(level);
return status;
}
/* Prepare page program command */
flashXfer.deviceAddress = address;
flashXfer.port = kFLEXSPI_PortA1;
flashXfer.cmdType = kFLEXSPI_Write;
flashXfer.SeqNumber = 2;
flashXfer.seqIndex = HYPERFLASH_CMD_LUT_SEQ_IDX_PAGEPROGRAM;
flashXfer.data = (uint32_t *)src;
flashXfer.dataSize = FLASH_PAGE_SIZE;
status = FLEXSPI_TransferBlocking(base, &flashXfer);
if (status != kStatus_Success)
{
rt_hw_interrupt_enable(level);
return status;
}
status = flexspi_nor_wait_bus_busy(base);
rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE,(void *)(FLEXSPI_AMBA_BASE+address),FLASH_PAGE_SIZE);
rt_hw_cpu_icache_ops(RT_HW_CACHE_INVALIDATE,(void *)(FLEXSPI_AMBA_BASE+address),FLASH_PAGE_SIZE);
FLEXSPI_Enable(FLEXSPI, false);
CLOCK_DisableClock(FLEXSPI_CLOCK);
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0); /* flexspi clock 332M, DDR mode, internal clock 166M. */
CLOCK_EnableClock(FLEXSPI_CLOCK);
FLEXSPI_Enable(FLEXSPI, true);
FLEXSPI_SoftwareReset(FLEXSPI);
rt_hw_interrupt_enable(level);
return status;
}
