int init_module(void)
{
rt_sem_init(¬Empty, 0);
rt_sem_init(¬Full, 1);
Clockstatus = stopped;
return 0;
}
int init_cmdclk(void)
{
notEmpty = rt_sem_init(nam2num("NOTECL"), 0);
notFull = rt_sem_init(nam2num("NOTFCL"), 1);
Clockstatus = stopped;
return 0;
}
int demo_init(void)
{
int i;
rt_thread_t tid;
rt_err_t result;
/* 初始化信号量 */
result = rt_sem_init(&sem_lock , "lock", 1, RT_IPC_FLAG_FIFO);
if (result != RT_EOK)
goto _error;
for (i=0; i<5; i++)
{
result = rt_sem_init(&sem[i] , "sem", 0, RT_IPC_FLAG_FIFO);
if (result != RT_EOK)
goto _error;
}
for (i=0; i<5; i++)
{
tid = rt_thread_create(
"phd",
phd_thread_entry,
(void *)i,
THREAD_STACK_SIZE, 10, RT_TICK_PER_SECOND*3);
if(tid != RT_NULL)
rt_thread_startup(tid);
}
return 0;
_error:
rt_kprintf("init semaphore failed.\n");
return -1;
}
int init_cmdcrn(void)
{
notEmpty = rt_sem_init(nam2num("NOTECR"), 0);
notFull = rt_sem_init(nam2num("NOTFCR"), 1);
Chronostatus = stoppedInitial;
buffered = FALSE;
fiveSeconds = nano2count(FIVE_SECONDS);
return 0;
}
int init_module(void)
{
rt_sem_init(¬Empty, 0);
rt_sem_init(¬Full, 1);
Chronostatus = stoppedInitial;
buffered = FALSE;
fiveSeconds = nano2count(FIVE_SECONDS);
return 0;
}
////////////////////////////////////////////////////////////////////////
// Init all ipc objects.
static void ipcs_init(void)
{
unsigned short dummy,max_interval;
getFrameSplit(&max_interval,&dummy);
rt_mutex_init(&setup_data_buf_mutex,"musb",RT_IPC_FLAG_FIFO);
rt_sem_init(&rx_sem,"semrx",0,RT_IPC_FLAG_FIFO);
rt_sem_init(&tx1_sem,"semtx0",1,RT_IPC_FLAG_FIFO);
rt_sem_init(&tx2_sem,"semtx1",1,RT_IPC_FLAG_FIFO);
rt_timer_init(&max_interval_timer,"rx_tmr",rx_interval_timeout,
RT_NULL,max_interval/1000*RT_TICK_PER_SECOND,RT_TIMER_FLAG_ONE_SHOT);
}
/*
* initialization task
*/
static void start_task_code(int notused)
{
int i;
char buf[9];
buf[8] = 0;
/* create the sync semaphore */
rt_sem_init(&sync_sem, 0);
/* create the priority-test semaphore */
rt_sem_init(&prio_sem, 0);
/* pass the semaphore to the first task */
rt_sem_signal(&sems[0]);
/* wait for each task to send the sync semaphore */
for (i = 0; i < NUM_TASKS; ++i) {
rt_sem_wait(&sync_sem);
}
rt_printk(sync_str);
/* post the priority-test semaphore -- the tasks should then run */
/* in priority order */
for (i = 0; i < NUM_TASKS; ++i) {
rt_sem_signal(&prio_sem);
}
rt_printk("\n");
for (i = 0; i < NUM_TASKS; ++i) {
rt_sem_wait(&sync_sem);
}
rt_printk(sync_str);
/* now, test message queues */
TAKE_PRINT;
rt_printk("testing message queues\n");
GIVE_PRINT;
for (i = 0; i < NUM_TASKS; ++i) {
if (rt_mbx_send(&mbx_in, strs[i], 8)) {
rt_printk("rt_mbx_send() failed\n");
}
}
for (i = 0; i < NUM_TASKS; ++i) {
rt_mbx_receive(&mbx_out, buf, 8);
TAKE_PRINT;
rt_printk("\nreceived from mbx_out: %s", buf);
GIVE_PRINT;
}
rt_printk("\n");
for (i = 0; i < NUM_TASKS; ++i) {
rt_sem_signal(&sync_sem);
}
TAKE_PRINT;
rt_printk("\ninit task complete\n");
GIVE_PRINT;
/* nothing more for this task to do */
}
int rt_application_init()
{
rt_thread_t thread_h;
rt_err_t result;
/* init system data cfg table */
init_syscfgdata_tbl();
rt_sem_init(&print_sem, "prtsem", 1, RT_IPC_FLAG_PRIO);
#if RT_USING_FILESYSTEM
rt_sem_init(&spiflash_sem, "sfsem", 1, RT_IPC_FLAG_PRIO);
#endif
#if (ADE7880_SPIFLASH_SHARE_SPI || ADE7880_SI4432_SHARE_SPI)
rt_sem_init(&spi_sem_share_by_ade7880, "spi3sem", 1, RT_IPC_FLAG_PRIO);
#endif
#if RT_USING_ADE7880 || RT_USING_SI4432_MAC
rt_event_init(& isr_event_set, "isr_eve", RT_IPC_FLAG_PRIO);
#endif
#if (RT_USING_RS485_BUS && !TEST_485)
init_sys_485();
#endif
RT_APPS_INIT_DEBUG(("func:%s(), will init rt_sys_misc_entry\n", __FUNCTION__));
/* init led thread */
result = rt_thread_init(&misc_thread, "misc", rt_sys_misc_entry,
RT_NULL, (rt_uint8_t*)&misc_stack[0], sizeof(misc_stack), 0x19, 5);
if (result == RT_EOK)
rt_thread_startup(&misc_thread);
#if RT_USING_ADE7880 || RT_USING_SI4432_MAC
thread_h = rt_thread_create("isr_e", rt_isr_event_entry, RT_NULL, 512, ISR_EVENT_THREAD_PRIORITY, 10);
if (thread_h != RT_NULL)
rt_thread_startup(thread_h);
#endif
#if (RT_THREAD_PRIORITY_MAX == 32)
thread_h = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 2048, 8, 20);
#else
thread_h = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 2048, 80, 20);
#endif
if (thread_h != RT_NULL)
rt_thread_startup(thread_h);
RT_APPS_INIT_DEBUG(("func:%s(), base thread initial over\n", __FUNCTION__));
return 0;
}
int rt_application_init()
{
int i;
rt_thread_t tid;
rt_thread_t init_thread;
rt_err_t result;
/* 初始化信号量 */
result = rt_sem_init(&sem_lock , "lock", 1, RT_IPC_FLAG_FIFO);
if (result != RT_EOK)
goto _error;
for (i=0; i<5; i++)
{
result = rt_sem_init(&sem[i] , "sem", 0, RT_IPC_FLAG_FIFO);
if (result != RT_EOK)
goto _error;
}
#if (RT_THREAD_PRIORITY_MAX == 32)
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 8, 20);
#else
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 80, 20);
#endif
if (init_thread != RT_NULL)
rt_thread_startup(init_thread);
for (i=0; i<5; i++)
{
tid = rt_thread_create(
"phd",
phd_thread_entry,
(void *)i,
THREAD_STACK_SIZE, 10, RT_TICK_PER_SECOND*3);
if(tid != RT_NULL)
rt_thread_startup(tid);
}
return 0;
_error:
rt_kprintf("init semaphore failed.\n");
return -1;
}
int lpc_emac_hw_init(void)
{
rt_event_init(&tx_event, "tx_event", RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
/* set autonegotiation mode */
lpc_emac_device.phy_mode = EMAC_PHY_AUTO;
// OUI 00-60-37 NXP Semiconductors
lpc_emac_device.dev_addr[0] = 0x00;
lpc_emac_device.dev_addr[1] = 0x60;
lpc_emac_device.dev_addr[2] = 0x37;
/* set mac address: (only for test) */
lpc_emac_device.dev_addr[3] = 0x12;
lpc_emac_device.dev_addr[4] = 0x34;
lpc_emac_device.dev_addr[5] = 0x56;
lpc_emac_device.parent.parent.init = lpc_emac_init;
lpc_emac_device.parent.parent.open = lpc_emac_open;
lpc_emac_device.parent.parent.close = lpc_emac_close;
lpc_emac_device.parent.parent.read = lpc_emac_read;
lpc_emac_device.parent.parent.write = lpc_emac_write;
lpc_emac_device.parent.parent.control = lpc_emac_control;
lpc_emac_device.parent.parent.user_data = RT_NULL;
lpc_emac_device.parent.eth_rx = lpc_emac_rx;
lpc_emac_device.parent.eth_tx = lpc_emac_tx;
eth_device_init(&(lpc_emac_device.parent), "e0");
return 0;
}
int pthread_cond_init(pthread_cond_t *cond, const pthread_condattr_t *attr)
{
rt_err_t result;
char cond_name[RT_NAME_MAX];
static rt_uint16_t cond_num = 0;
/* parameter check */
if (cond == RT_NULL)
return EINVAL;
if ((attr != RT_NULL) && (*attr != PTHREAD_PROCESS_PRIVATE))
return EINVAL;
rt_snprintf(cond_name, sizeof(cond_name), "cond%02d", cond_num++);
if (attr == RT_NULL) /* use default value */
cond->attr = PTHREAD_PROCESS_PRIVATE;
else
cond->attr = *attr;
result = rt_sem_init(&cond->sem, cond_name, 0, RT_IPC_FLAG_FIFO);
if (result != RT_EOK)
return EINVAL;
/* detach the object from system object container */
rt_object_detach(&(cond->sem.parent.parent));
return 0;
}
int main(void)
{
RT_TASK *task;
RTIME now;
int cnt=0;
// make main thread LXRT soft realtime
task = rt_task_init_schmod(nam2num("MYTASK"), 9, 0, 0, SCHED_FIFO, 0xF);
mlockall(MCL_CURRENT | MCL_FUTURE);
// start realtime timer and scheduler
//rt_set_oneshot_mode();
rt_set_periodic_mode();
start_rt_timer(0);
now = rt_get_time() + 10*PERIOD;
rt_task_make_periodic(task, now, PERIOD);
printf("Init mutex and cond.\n");
mutex = rt_sem_init(nam2num("MUTEX"), 1);
if (mutex==0)
printf("Error init mutex\n");
cond = rt_cond_init(nam2num("CONDITION"));
if (cond==0)
printf("Error init cond\n");
thread0 = rt_thread_create(fun0, NULL, 10000);
//thread1 = rt_thread_create(fun1, NULL, 20000);
//rt_sleep(PERIOD);
while (cnt < THRESHOLD) {
rt_task_wait_period();
rt_printk("main: Hello World %d!\n",cnt);
rt_sem_wait(mutex); //now the mutex should have value 0
if (instance_cnt==0) {
rt_sem_signal(mutex); //now the mutex should have vaule 1
rt_printk("worker thread busy!\n");
} else {
instance_cnt++;
rt_cond_signal(cond);
rt_sem_signal(mutex); //now the mutex should have vaule 1
rt_printk("signaling worker thread to start!\n");
}
cnt++;
}
// wait for end of program
printf("TYPE <ENTER> TO TERMINATE\n");
getchar();
// cleanup
stop_rt_timer();
return 0;
}
void pcap_netif_hw_init(void)
{
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
pcap_netif_device.dev_addr[0] = 0x00;
pcap_netif_device.dev_addr[1] = 0x60;
pcap_netif_device.dev_addr[2] = 0x37;
/* set mac address: (only for test) */
pcap_netif_device.dev_addr[3] = 0x12;
pcap_netif_device.dev_addr[4] = 0x34;
pcap_netif_device.dev_addr[5] = 0x56;
pcap_netif_device.parent.parent.init = pcap_netif_init;
pcap_netif_device.parent.parent.open = pcap_netif_open;
pcap_netif_device.parent.parent.close = pcap_netif_close;
pcap_netif_device.parent.parent.read = pcap_netif_read;
pcap_netif_device.parent.parent.write = pcap_netif_write;
pcap_netif_device.parent.parent.control = pcap_netif_control;
pcap_netif_device.parent.parent.user_data = RT_NULL;
pcap_netif_device.parent.eth_rx = pcap_netif_rx;
pcap_netif_device.parent.eth_tx = pcap_netif_tx;
eth_device_init(&(pcap_netif_device.parent), "e0");
}
int rtos_sem_init(rt_sem_t* m, int value )
{
CHK_LXRT_CALL();
// store the pointer in m->opaque...
m->sem = rt_sem_init( rt_get_name(0) , value);
return m->sem == 0 ? -1 : 0;
}
void finsh_lua(struct para *parameters)
{
rt_err_t (*rx_indicate)(rt_device_t dev, rt_size_t size);
rt_sem_init(&(dev4lua.sem), "luasem", 0, 0);
/* save old rx_indicate */
rx_indicate = dev4lua.device->rx_indicate;
/* set new rx_indicate */
rt_device_set_rx_indicate(dev4lua.device, lua_rx_ind);
{
int argc = parameters->argc;
char **argv = parameters->argv;
/*
rt_kprintf("argc =%d, argv[1] =%d\n", argc, argv[1]);
while(1);
*/
/* run lua interpreter */
lua_main(argc, argv);
}
if (parameters->argc > 1)
rt_free(parameters->argv[1]);
rt_free(parameters);
/* recover old rx_indicate */
rt_device_set_rx_indicate(dev4lua.device, rx_indicate);
}
int davinci_i2c_init(char *bus_name)
{
struct rt_i2c_bus_device *bus;
struct davinci_i2c_dev *dev;
int r;
bus = rt_malloc(sizeof(struct rt_i2c_bus_device));
if (bus == RT_NULL)
{
rt_kprintf("rt_malloc failed\n");
return -RT_ENOMEM;
}
rt_memset((void *)bus, 0, sizeof(struct rt_i2c_bus_device));
bus->ops = &bus_ops;
bus->timeout = DAVINCI_I2C_TIMEOUT;
dev = rt_malloc(sizeof(struct davinci_i2c_dev));
if (!dev)
{
r = -RT_ENOMEM;
goto err;
}
rt_memset((void *)dev, 0, sizeof(struct davinci_i2c_dev));
rt_sem_init(&dev->completion, "i2c_ack", 0, RT_IPC_FLAG_FIFO);
dev->irq = IRQ_I2C;
dev->clk = clk_get("I2CCLK");
if (dev->clk == RT_NULL) {
r = -RT_ERROR;
goto err1;
}
psc_change_state(DAVINCI_DM365_LPSC_I2C, 3);
dev->base = DAVINCI_I2C_BASE;
dev->bus_freq = 100;
dev->bus_delay = 0;
bus->priv = dev;
i2c_davinci_init(dev);
rt_hw_interrupt_install(dev->irq, i2c_davinci_isr, (void *)dev, "I2C");
rt_hw_interrupt_umask(dev->irq);
return rt_i2c_bus_device_register(bus, bus_name);
err1:
rt_free(dev);
err:
rt_free(bus);
return r;
}
int init_module(void)
{
int i;
rt_sem_init(&barrier, NTASKS + 1);
smbx = rt_msgget(nam2num("SMSG"), 0x666 | IPC_CREAT);
for (i = 0; i < NTASKS; i++) {
char mname[6] = "RMBX";
mname[4] = i + '0';
mname[5] = 0;
rmbx[i] = rt_msgget(nam2num(mname), 0x666 | IPC_CREAT);
}
rt_set_oneshot_mode();
start_rt_timer(0);
rt_kthread_init(&bthread, bfun, 0, 0x8000, 1, 1, 0);
rt_task_resume(&bthread);
for (i = 0; i < NTASKS; i++) {
rt_kthread_init(&mthread[i], mfun, i, 0x8000, i + 2, 1, 0);
rt_task_resume(&mthread[i]);
}
return 0;
}
int main(void)
{
RT_TASK *Main_Task;
long msg;
if (!(Main_Task = rt_thread_init(nam2num("MNTSK"), 10, 0, SCHED_FIFO, 0xF))) {
printf("CANNOT INIT MAIN TASK\n");
exit(1);
}
if (!(hard_timer_running = rt_is_hard_timer_running())) {
start_rt_timer(0);
}
barrier = rt_sem_init(nam2num("PREMS"), 4);
latency_thread = rt_thread_create(latency_fun, NULL, 0);
fast_thread = rt_thread_create(fast_fun, NULL, 0);
slow_thread = rt_thread_create(slow_fun, NULL, 0);
start = rt_get_time() + nano2count(200000000);
rt_sem_wait_barrier(barrier);
rt_receive(0, &msg);
end = 1;
rt_sem_wait_barrier(barrier);
rt_thread_join(latency_thread);
rt_thread_join(fast_thread);
rt_thread_join(slow_thread);
if (!hard_timer_running) {
stop_rt_timer();
}
rt_sem_delete(barrier);
rt_thread_delete(Main_Task);
return 0;
}
int rs485_system_init(void)
{
rt_err_t result;
rt_thread_t init_thread;
rs485_send_mut = rt_mutex_create("rs485mut",RT_IPC_FLAG_FIFO);
rs485_data_init();
uart1_dev_my = (struct _uart_dev_my*)rt_malloc(sizeof(struct _uart_dev_my));
if (uart1_dev_my == RT_NULL)
{
rt_kprintf("no memory for shell\n");
return -1;
}
memset(uart1_dev_my, 0, sizeof(struct _uart_dev_my));
rt_sem_init(&(uart1_dev_my->rx_sem), "rs485rx", 0, 0);
uart1_dev_my->device = RT_NULL;
uart1_rs485_set_device();
uart1_sem = rt_sem_create("uart1_sem",0, RT_IPC_FLAG_FIFO);
init_thread = rt_thread_create("rs485",rt_rs485_thread_entry, RT_NULL,
4092, 8, 21);
if (init_thread != RT_NULL)
rt_thread_startup(init_thread);
return 0;
}
/**
* This function will initialize susb host controller device.
*
* @param dev the host controller device to be initalize.
*
* @return the error code, RT_EOK on successfully.
*/
static rt_err_t susb_init(rt_device_t dev)
{
rt_sem_init(&sem_lock, "s_lock", 1, RT_IPC_FLAG_FIFO);
/* roothub initilizition */
root_hub.num_ports = 1;
root_hub.is_roothub = RT_TRUE;
root_hub.self = RT_NULL;
root_hub.hcd = &susb_hcd;
/* Hardware Init */
USB_OTG_BSP_Init(&USB_OTG_Core);
/* configure GPIO pin used for switching VBUS power */
USB_OTG_BSP_ConfigVBUS(0);
/* Host de-initializations */
USBH_DeInit(&USB_OTG_Core, &USB_Host);
/* Start the USB OTG core */
HCD_Init(&USB_OTG_Core , USB_OTG_FS_CORE_ID);
USBH_DeAllocate_AllChannel(&USB_OTG_Core);
/* Enable Interrupts */
USB_OTG_BSP_EnableInterrupt(&USB_OTG_Core);
return RT_EOK;
}
int init_module(void)
{
int i;
DBG_PRINT_INIT;
if (rt_task_init(&start_task, start_task_code, 0, 10000, 10, 0, 0) != 0) {
printk("Could not start init task\n");
}
if (rt_mbx_init(&mbx_in, NUM_TASKS*8) || rt_mbx_init(&mbx_out, NUM_TASKS*8)) {
printk("could not create message queue\n");
return 1;
}
for (i = 0; i < NUM_TASKS; ++i) {
rt_sem_init(&sems[i], 0);
if (rt_task_init(&tasks[i], task_code, i, 3000, NUM_TASKS - i, 0, 0) != 0) {
printk("rt_task_ipc_init failed\n");
return 1;
}
}
#ifdef ONE_SHOT
rt_set_oneshot_mode();
#endif
start_rt_timer_ns(10000000);
checkt = rdtsc();
checkj = jiffies;
rt_task_resume(&start_task);
for (i = 0; i < NUM_TASKS; ++i) {
rt_task_resume(&tasks[i]);
}
return 0;
}
int __init hello_init(void)
{
RTIME sampling;
rt_printk(KERN_INFO "TESTE - *************************** INICIO *******************************\n");
rt_task_init(&Task_1, signalIchi, 0, 3000, 0, 0, NULL);
rt_task_init(&Task_2, signalNi, 0, 3000, 0, 0, NULL);
rt_task_init(&Task_3, signalSan, 0, 3000, 0, 0, NULL);
sampling = start_rt_timer(nano2count(TICK));
rt_sem_init(&rMutex, 1);
rt_task_make_periodic(&Task_1, rt_get_time() + sampling * 16, sampling * 16);
rt_task_make_periodic(&Task_2, rt_get_time() + sampling * 18, sampling * 18);
rt_task_make_periodic(&Task_3, rt_get_time() + sampling * 30, sampling * 30);
rt_change_prio(&Task_1, 2);
rt_change_prio(&Task_2, 1);
rt_change_prio(&Task_3, 3);
rt_printk(KERN_INFO "Init module function\n");
return 0;
}
//串口接收数据线程
void uart_thread_entry(void* parameter)
{
char ch;
device = rt_device_find("uart3");
if(device != RT_NULL)
{
rt_device_open(device, RT_DEVICE_OFLAG_RDWR);
rt_kprintf("open device uart3 succeed!\r\n");
rt_sem_init(&rx_sem, "uartrx", 0, 0);
rt_device_set_rx_indicate(device, uart_rx_ind);
while(1)
{
if (rt_sem_take(&rx_sem, RT_WAITING_FOREVER) != RT_EOK) //默认情况线程挂起，有数据时，系统会调用uart_rx_ind函数，释放信号量，线程得以执行
continue;
while(rt_device_read(device, 0, &ch, 1) == 1)
{
uartRecvProc(ch);
}
}
}
}
//----------------------------------------------------------------------------//
// CpFifoSetup() //
// Setup FIFO size //
//----------------------------------------------------------------------------//
_U08 Cp_PREFIX CpFifoSetup(_U08 channel, _U08 buffer, _U16 size)
{
#if CP_SMALL_CODE == 0
//--- test the channel number --------------------------
if( (channel + 1) > CP_CHANNEL_MAX) return (CpErr_CHANNEL);
#endif
//--- allocate memory for Receive FIFO -----------------
if(buffer == CP_FIFO_RCV)
{
CpVar_FifoRcv[channel] = malloc(CP_CAN_MESSAGE_SIZE * size);
if(CpVar_FifoRcv[channel] == 0L) return (CpErr_FIFO_SIZE);
/*----------------------------------
** store FIFO size and make it
** empty (head = tail = 0)
*/
CpVar_FifoRcvSize[channel] = size;
CpVar_FifoRcvHead[channel] = 0;
CpVar_FifoRcvTail[channel] = 0;
}
//--- allocate memory for Transmit FIFO ----------------
if(buffer == CP_FIFO_TRM)
{
CpVar_FifoTrm[channel] = malloc(CP_CAN_MESSAGE_SIZE * size);
if(CpVar_FifoTrm[channel] == 0L) return (CpErr_FIFO_SIZE);
/*----------------------------------
** store FIFO size and make it
** empty (head = tail = 0)
*/
CpVar_FifoTrmSize[channel] = size;
CpVar_FifoTrmHead[channel] = 0;
CpVar_FifoTrmTail[channel] = 0;
}
//--- FIFOs are not full -----------------------------------------
CpVar_FifoStatus[channel] = 0;
#if defined(OROPKG_OS_LXRT) || defined(OROPKG_OS_RTAI)
rt_sem_init(&cp_tx_fifo_sem, 1);
rt_sem_init(&cp_rx_fifo_sem, 1);
#endif
return (CpErr_OK);
}
/* Keep old drivers compatible in RT-Thread */
Int32 eth_device_init_with_flag(struct eth_device *dev, char *name, UInt8 flags)
{
struct netif* netif;
netif = (struct netif*) malloc (sizeof(struct netif));
if (netif == NULL)
{
printf("malloc netif failed\n");
return -RT_ERROR;
}
memset(netif, 0, sizeof(struct netif));
/* set netif */
dev->netif = netif;
/* device flags, which will be set to netif flags when initializing */
dev->flags = flags;
/* link changed status of device */
dev->link_changed = 0x00;
dev->parent.type = RT_Device_Class_NetIf;
/* register to RT-Thread device manager */
rt_device_register(&(dev->parent), name, RT_DEVICE_FLAG_RDWR);
rt_sem_init(&(dev->tx_ack), name, 0, RT_IPC_FLAG_FIFO);
/* set name */
netif->name[0] = name[0];
netif->name[1] = name[1];
/* set hw address to 6 */
netif->hwaddr_len = 6;
/* maximum transfer unit */
netif->mtu = ETHERNET_MTU;
/* get hardware MAC address */
rt_device_control(&(dev->parent), NIOCTL_GADDR, netif->hwaddr);
/* set output */
netif->output = etharp_output;
netif->linkoutput = ethernetif_linkoutput;
/* if tcp thread has been started up, we add this netif to the system */
if (rt_thread_find("tcpip") != NULL)
{
struct ip_addr ipaddr, netmask, gw;
#if !LWIP_DHCP
IP4_ADDR(&ipaddr, RT_LWIP_IPADDR0, RT_LWIP_IPADDR1, RT_LWIP_IPADDR2, RT_LWIP_IPADDR3);
IP4_ADDR(&gw, RT_LWIP_GWADDR0, RT_LWIP_GWADDR1, RT_LWIP_GWADDR2, RT_LWIP_GWADDR3);
IP4_ADDR(&netmask, RT_LWIP_MSKADDR0, RT_LWIP_MSKADDR1, RT_LWIP_MSKADDR2, RT_LWIP_MSKADDR3);
#else
IP4_ADDR(&ipaddr, 0, 0, 0, 0);
IP4_ADDR(&gw, 0, 0, 0, 0);
IP4_ADDR(&netmask, 0, 0, 0, 0);
#endif
netifapi_netif_add(netif, &ipaddr, &netmask, &gw, dev, eth_netif_device_init, tcpip_input);
}
return RT_EOK;
}
int rt_hw_luminaryif_init(void)
{
rt_err_t result;
unsigned long ulUser0, ulUser1;
/* Enable and Reset the Ethernet Controller. */
SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
/*
Enable Port F for Ethernet LEDs.
LED0 Bit 3 Output
LED1 Bit 2 Output
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
/* GPIODirModeSet and GPIOPadConfigSet */
GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3);
GPIOPinConfigure(GPIO_PF2_LED1);
GPIOPinConfigure(GPIO_PF3_LED0);
FlashUserSet(0x00371200, 0x00563412); /* OUI:00-12-37 (hex) Texas Instruments, only for test */
/* Configure the hardware MAC address */
FlashUserGet(&ulUser0, &ulUser1);
if((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
{
rt_kprintf("Fatal error in geting MAC address\n");
}
/* init rt-thread device interface */
luminaryif_dev_entry.parent.parent.init = luminaryif_init;
luminaryif_dev_entry.parent.parent.open = luminaryif_open;
luminaryif_dev_entry.parent.parent.close = luminaryif_close;
luminaryif_dev_entry.parent.parent.read = luminaryif_read;
luminaryif_dev_entry.parent.parent.write = luminaryif_write;
luminaryif_dev_entry.parent.parent.control = luminaryif_control;
luminaryif_dev_entry.parent.eth_rx = luminaryif_rx;
luminaryif_dev_entry.parent.eth_tx = luminaryif_tx;
/*
Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
address needed to program the hardware registers, then program the MAC
address into the Ethernet Controller registers.
*/
luminaryif_dev_entry.dev_addr[0] = ((ulUser0 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[1] = ((ulUser0 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[2] = ((ulUser0 >> 16) & 0xff);
luminaryif_dev_entry.dev_addr[3] = ((ulUser1 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[4] = ((ulUser1 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[5] = ((ulUser1 >> 16) & 0xff);
/* Program the hardware with it's MAC address (for filtering). */
EthernetMACAddrSet(ETH_BASE, luminaryif_dev_entry.dev_addr);
rt_sem_init(&tx_sem, "emac", 1, RT_IPC_FLAG_FIFO);
result = eth_device_init(&(luminaryif_dev->parent), "E0");
return result;
}
/**
* This function will initial STM32 Radio board.
*/
void rt_hw_board_init(void)
{
/* Configure the system clocks */
SystemInit();
all_device_reset();
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
/* Console Initialization*/
rt_hw_usart_init();
rt_console_set_device("uart1");
rt_kprintf("\r\n\r\nSystemInit......\r\n");
/* SPI1 config */
{
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
/* Enable SPI1 Periph clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA
| RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,
ENABLE);
/* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/*------------------------ SPI1 configuration ------------------------*/
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;/* 72M/64=1.125M */
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_I2S_DeInit(SPI1);
SPI_Init(SPI1, &SPI_InitStructure);
/* Enable SPI_MASTER */
SPI_Cmd(SPI1, ENABLE);
SPI_CalculateCRC(SPI1, DISABLE);
if (rt_sem_init(&spi1_lock, "spi1lock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
{
rt_kprintf("init spi1 lock semaphore failed\n");
}
}
}
int rcu_uart_init(void)
{
int ret=0;
rt_sem_init(&(rcuReadSem), "rcurx", 0, 0);
return ret;
}
int tdma_attach(struct rtnet_device *rtdev, void *priv)
{
struct rtmac_tdma *tdma = (struct rtmac_tdma *)priv;
rt_printk("RTmac: tdma1: init time devision multiple access (tdma) for realtime stations\n");
memset(tdma, 0, sizeof(struct rtmac_tdma));
spin_lock_init(&tdma->delta_t_lock);
tdma->rtdev = rtdev;
/*
* init semas, they implement a producer consumer between the
* sending realtime- and the driver-task
*
*/
rt_sem_init(&tdma->client_tx, 0);
/*
* init tx queue
*
*/
rtskb_prio_queue_init(&tdma->tx_queue);
/*
* init rt stuff
* - timer
* - list heads
*
*/
/* generic */
/* master */
init_timer(&tdma->rt_add_timer);
INIT_LIST_HEAD(&tdma->rt_add_list);
INIT_LIST_HEAD(&tdma->rt_list);
INIT_LIST_HEAD(&tdma->rt_list_rate);
init_timer(&tdma->task_change_timer);
init_timer(&tdma->master_wait_timer);
init_timer(&tdma->master_sent_conf_timer);
init_timer(&tdma->master_sent_test_timer);
rtskb_queue_init(&tdma->master_queue);
/* client */
init_timer(&tdma->client_sent_ack_timer);
/*
* start timer
*/
rt_set_oneshot_mode();
start_rt_timer(0);
return 0;
}
/*
* 该函数用于在没有系统数据表格时, 建立数据表格
*/
int init_syscfgdata_tbl(void)
{
int i;
struct syscfgdata_tbl *p;
rt_uint32_t ver_temp1, ver_temp2;
if (SYSCFGDATA_TBL_SIZE_OF_FLASH > (PAGE_NUM_USED_BY_SYSCFGDATA_TBL * SIZE_PER_FLASH_PAGE)) {
rt_kprintf("error:sys table(%u) too large(shoule small than %u)", SYSCFGDATA_TBL_SIZE_OF_FLASH,
PAGE_NUM_USED_BY_SYSCFGDATA_TBL * SIZE_PER_FLASH_PAGE);
while(1);
}
syscfgdata_tbl_cache = rt_calloc(sizeof(*syscfgdata_tbl_cache), 1);
if (NULL == syscfgdata_tbl_cache) {
rt_kprintf("func:%s, out of mem\n", __FUNCTION__);
while(1);
}
if (RT_EOK != rt_sem_init(&write_syscfgdata_sem, "sysdata", 1, RT_IPC_FLAG_PRIO)) {
rt_kprintf("func:%s, sem init fail\n", __FUNCTION__);
while(1);
}
p = &syscfgdata_tbl_cache->syscfg_data;
SYSCFG_DATA_LOG(("on-chip flash page num:%d, sys tbl flash-addr:0x:%x, cache-addr:0x%x, "
"db-tbl-size:%d, prev db-tbl-size:%d\n",
PAGE_NUM_OF_ONCHIP_FLASH, SYSCFGDATA_TBL_BASE_OF_FLASH, p,
SYSCFGDATA_TBL_SIZE_OF_FLASH, SYSCFGDATA_TBL_PREV_SIZE_OF_FLASH));
if (IS_SYSCFG_TBL_OF_FLASH_VALID) {
read_whole_syscfgdata_tbl(p, SYSCFGDATA_TBL_SIZE_OF_FLASH);
update_db_if_need(p);
ver_temp1 = (RT_APP_VERSION<<16) | (RT_APP_SUBVERSION<<8) | (RT_APP_REVISION);
ver_temp2 = (M3_DB_VERSION<<16) | (M3_DB_SUBVERSION<<8) | (M3_DB_REVISION);
if (ver_temp1!=p->m3_sys_info.sw_ver || ver_temp2!=p->m3_sys_info.db_ver) {
p->m3_sys_info.sw_ver = ver_temp1;
p->m3_sys_info.db_ver = ver_temp2;
set_syscfgdata_tbl_dirty(syscfgdata_tbl_cache->systbl_flag_set);
}
return RT_EOK;
}
/* 数据库为空, 需要创建数据库 */
/* systbl_head */
p->systbl_head.magic_num = SYSCFGDATA_TBL_MAGIC_NUM;
set_systbl_to_default_value(p);
i = write_whole_syscfgdata_tbl(p);
SYSCFG_DATA_PRINT(("sys tbl size:%d, offset:%d\n", SYSCFGDATA_TBL_SIZE_OF_FLASH,
offsetof(struct syscfgdata_tbl, misc_byteinfo)));
return i;
}