static int __init rp5c01_rtc_probe(struct platform_device *dev)
{
struct resource *res;
struct rp5c01_priv *priv;
struct rtc_device *rtc;
int error;
struct nvmem_config nvmem_cfg = {
.name = "rp5c01_nvram",
.word_size = 1,
.stride = 1,
.size = RP5C01_MODE,
.reg_read = rp5c01_nvram_read,
.reg_write = rp5c01_nvram_write,
};
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->regs = devm_ioremap(&dev->dev, res->start, resource_size(res));
if (!priv->regs)
return -ENOMEM;
spin_lock_init(&priv->lock);
platform_set_drvdata(dev, priv);
rtc = devm_rtc_allocate_device(&dev->dev);
if (IS_ERR(rtc))
return PTR_ERR(rtc);
rtc->ops = &rp5c01_rtc_ops;
rtc->nvram_old_abi = true;
priv->rtc = rtc;
nvmem_cfg.priv = priv;
error = rtc_nvmem_register(rtc, &nvmem_cfg);
if (error)
return error;
return rtc_register_device(rtc);
}
static struct platform_driver rp5c01_rtc_driver = {
.driver = {
.name = "rtc-rp5c01",
},
};
module_platform_driver_probe(rp5c01_rtc_driver, rp5c01_rtc_probe);
MODULE_AUTHOR("Geert Uytterhoeven <*****@*****.**>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Ricoh RP5C01 RTC driver");
MODULE_ALIAS("platform:rtc-rp5c01");
int pl031_setup()
{
irq_install_isr(RTC_IRQ_NUM, pl031_irq);
irq_enable_line(RTC_IRQ_NUM);
rtc_register_device(&pl031_device);
return -ERR_OK;
}
static int test_probe(struct platform_device *plat_dev)
{
struct rtc_test_data *rtd;
rtd = devm_kzalloc(&plat_dev->dev, sizeof(*rtd), GFP_KERNEL);
if (!rtd)
return -ENOMEM;
platform_set_drvdata(plat_dev, rtd);
rtd->rtc = devm_rtc_allocate_device(&plat_dev->dev);
if (IS_ERR(rtd->rtc))
return PTR_ERR(rtd->rtc);
switch (plat_dev->id) {
case 0:
rtd->rtc->ops = &test_rtc_ops_noalm;
break;
default:
rtd->rtc->ops = &test_rtc_ops;
}
timer_setup(&rtd->alarm, test_rtc_alarm_handler, 0);
rtd->alarm.expires = 0;
return rtc_register_device(rtd->rtc);
}
static int mtk_rtc_probe(struct platform_device *pdev)
{
struct resource *res;
struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
struct mt6397_rtc *rtc;
int ret;
rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
if (!rtc)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rtc->addr_base = res->start;
rtc->irq = platform_get_irq(pdev, 0);
if (rtc->irq < 0)
return rtc->irq;
rtc->regmap = mt6397_chip->regmap;
rtc->dev = &pdev->dev;
mutex_init(&rtc->lock);
platform_set_drvdata(pdev, rtc);
rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
if (IS_ERR(rtc->rtc_dev))
return PTR_ERR(rtc->rtc_dev);
ret = request_threaded_irq(rtc->irq, NULL,
mtk_rtc_irq_handler_thread,
IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
"mt6397-rtc", rtc);
if (ret) {
dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
rtc->irq, ret);
goto out_dispose_irq;
}
device_init_wakeup(&pdev->dev, 1);
rtc->rtc_dev->ops = &mtk_rtc_ops;
ret = rtc_register_device(rtc->rtc_dev);
if (ret) {
dev_err(&pdev->dev, "register rtc device failed\n");
goto out_free_irq;
}
return 0;
out_free_irq:
free_irq(rtc->irq, rtc->rtc_dev);
out_dispose_irq:
irq_dispose_mapping(rtc->irq);
return ret;
}
static int pl030_probe(struct amba_device *dev, const struct amba_id *id)
{
struct pl030_rtc *rtc;
int ret;
ret = amba_request_regions(dev, NULL);
if (ret)
goto err_req;
rtc = devm_kzalloc(&dev->dev, sizeof(*rtc), GFP_KERNEL);
if (!rtc) {
ret = -ENOMEM;
goto err_rtc;
}
rtc->rtc = devm_rtc_allocate_device(&dev->dev);
if (IS_ERR(rtc->rtc)) {
ret = PTR_ERR(rtc->rtc);
goto err_rtc;
}
rtc->rtc->ops = &pl030_ops;
rtc->base = ioremap(dev->res.start, resource_size(&dev->res));
if (!rtc->base) {
ret = -ENOMEM;
goto err_rtc;
}
__raw_writel(0, rtc->base + RTC_CR);
__raw_writel(0, rtc->base + RTC_EOI);
amba_set_drvdata(dev, rtc);
ret = request_irq(dev->irq[0], pl030_interrupt, 0,
"rtc-pl030", rtc);
if (ret)
goto err_irq;
ret = rtc_register_device(rtc->rtc);
if (ret)
goto err_reg;
return 0;
err_reg:
free_irq(dev->irq[0], rtc);
err_irq:
iounmap(rtc->base);
err_rtc:
amba_release_regions(dev);
err_req:
return ret;
}
static int dm355evm_rtc_probe(struct platform_device *pdev)
{
struct rtc_device *rtc;
rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(rtc))
return PTR_ERR(rtc);
platform_set_drvdata(pdev, rtc);
rtc->ops = &dm355evm_rtc_ops;
rtc->range_max = U32_MAX;
return rtc_register_device(rtc);
}
static int wm831x_rtc_probe(struct platform_device *pdev)
{
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
struct wm831x_rtc *wm831x_rtc;
int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM"));
int ret = 0;
wm831x_rtc = devm_kzalloc(&pdev->dev, sizeof(*wm831x_rtc), GFP_KERNEL);
if (wm831x_rtc == NULL)
return -ENOMEM;
platform_set_drvdata(pdev, wm831x_rtc);
wm831x_rtc->wm831x = wm831x;
ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
if (ret < 0) {
dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret);
return ret;
}
if (ret & WM831X_RTC_ALM_ENA)
wm831x_rtc->alarm_enabled = 1;
device_init_wakeup(&pdev->dev, 1);
wm831x_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(wm831x_rtc->rtc))
return PTR_ERR(wm831x_rtc->rtc);
wm831x_rtc->rtc->ops = &wm831x_rtc_ops;
wm831x_rtc->rtc->range_max = U32_MAX;
ret = rtc_register_device(wm831x_rtc->rtc);
if (ret)
return ret;
ret = devm_request_threaded_irq(&pdev->dev, alm_irq, NULL,
wm831x_alm_irq,
IRQF_TRIGGER_RISING, "RTC alarm",
wm831x_rtc);
if (ret != 0) {
dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
alm_irq, ret);
}
wm831x_rtc_add_randomness(wm831x);
return 0;
}
static int rtc_probe(struct platform_device *pdev)
{
struct ds2404_platform_data *pdata = dev_get_platdata(&pdev->dev);
struct ds2404 *chip;
int retval = -EBUSY;
chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
if (!chip)
return -ENOMEM;
chip->rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(chip->rtc))
return PTR_ERR(chip->rtc);
retval = ds2404_gpio_map(chip, pdev, pdata);
if (retval)
return retval;
retval = devm_add_action_or_reset(&pdev->dev, ds2404_gpio_unmap, chip);
if (retval)
return retval;
dev_info(&pdev->dev, "using GPIOs RST:%d, CLK:%d, DQ:%d\n",
chip->gpio[DS2404_RST].gpio, chip->gpio[DS2404_CLK].gpio,
chip->gpio[DS2404_DQ].gpio);
platform_set_drvdata(pdev, chip);
chip->rtc->ops = &ds2404_rtc_ops;
chip->rtc->range_max = U32_MAX;
retval = rtc_register_device(chip->rtc);
if (retval)
return retval;
ds2404_enable_osc(&pdev->dev);
return 0;
}
static int imx_sc_rtc_probe(struct platform_device *pdev)
{
int ret;
ret = imx_scu_get_handle(&rtc_ipc_handle);
if (ret)
return ret;
imx_sc_rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(imx_sc_rtc))
return PTR_ERR(imx_sc_rtc);
imx_sc_rtc->ops = &imx_sc_rtc_ops;
imx_sc_rtc->range_min = 0;
imx_sc_rtc->range_max = U32_MAX;
ret = rtc_register_device(imx_sc_rtc);
if (ret) {
dev_err(&pdev->dev, "failed to register rtc: %d\n", ret);
return ret;
}
return 0;
}
static int omap_rtc_probe(struct platform_device *pdev)
{
struct omap_rtc *rtc;
struct resource *res;
u8 reg, mask, new_ctrl;
const struct platform_device_id *id_entry;
const struct of_device_id *of_id;
int ret;
rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
if (!rtc)
return -ENOMEM;
of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
if (of_id) {
rtc->type = of_id->data;
rtc->is_pmic_controller = rtc->type->has_pmic_mode &&
of_property_read_bool(pdev->dev.of_node,
"system-power-controller");
} else {
id_entry = platform_get_device_id(pdev);
rtc->type = (void *)id_entry->driver_data;
}
rtc->irq_timer = platform_get_irq(pdev, 0);
if (rtc->irq_timer <= 0)
return -ENOENT;
rtc->irq_alarm = platform_get_irq(pdev, 1);
if (rtc->irq_alarm <= 0)
return -ENOENT;
rtc->clk = devm_clk_get(&pdev->dev, "ext-clk");
if (!IS_ERR(rtc->clk))
rtc->has_ext_clk = true;
else
rtc->clk = devm_clk_get(&pdev->dev, "int-clk");
if (!IS_ERR(rtc->clk))
clk_prepare_enable(rtc->clk);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rtc->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(rtc->base)) {
clk_disable_unprepare(rtc->clk);
return PTR_ERR(rtc->base);
}
platform_set_drvdata(pdev, rtc);
/* Enable the clock/module so that we can access the registers */
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
rtc->type->unlock(rtc);
/*
* disable interrupts
*
* NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
*/
rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
/* enable RTC functional clock */
if (rtc->type->has_32kclk_en) {
reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
rtc_writel(rtc, OMAP_RTC_OSC_REG,
reg | OMAP_RTC_OSC_32KCLK_EN);
}
/* clear old status */
reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
mask = OMAP_RTC_STATUS_ALARM;
if (rtc->type->has_pmic_mode)
mask |= OMAP_RTC_STATUS_ALARM2;
if (rtc->type->has_power_up_reset) {
mask |= OMAP_RTC_STATUS_POWER_UP;
if (reg & OMAP_RTC_STATUS_POWER_UP)
dev_info(&pdev->dev, "RTC power up reset detected\n");
}
if (reg & mask)
rtc_write(rtc, OMAP_RTC_STATUS_REG, reg & mask);
/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
if (reg & OMAP_RTC_CTRL_STOP)
dev_info(&pdev->dev, "already running\n");
/* force to 24 hour mode */
new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT | OMAP_RTC_CTRL_AUTO_COMP);
new_ctrl |= OMAP_RTC_CTRL_STOP;
/*
* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
*
* - Device wake-up capability setting should come through chip
* init logic. OMAP1 boards should initialize the "wakeup capable"
* flag in the platform device if the board is wired right for
* being woken up by RTC alarm. For OMAP-L138, this capability
* is built into the SoC by the "Deep Sleep" capability.
*
* - Boards wired so RTC_ON_nOFF is used as the reset signal,
* rather than nPWRON_RESET, should forcibly enable split
* power mode. (Some chip errata report that RTC_CTRL_SPLIT
* is write-only, and always reads as zero...)
*/
if (new_ctrl & OMAP_RTC_CTRL_SPLIT)
dev_info(&pdev->dev, "split power mode\n");
if (reg != new_ctrl)
rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
/*
* If we have the external clock then switch to it so we can keep
* ticking across suspend.
*/
if (rtc->has_ext_clk) {
reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
reg &= ~OMAP_RTC_OSC_OSC32K_GZ_DISABLE;
reg |= OMAP_RTC_OSC_32KCLK_EN | OMAP_RTC_OSC_SEL_32KCLK_SRC;
rtc_writel(rtc, OMAP_RTC_OSC_REG, reg);
}
rtc->type->lock(rtc);
device_init_wakeup(&pdev->dev, true);
rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(rtc->rtc)) {
ret = PTR_ERR(rtc->rtc);
goto err;
}
rtc->rtc->ops = &omap_rtc_ops;
omap_rtc_nvmem_config.priv = rtc;
/* handle periodic and alarm irqs */
ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
dev_name(&rtc->rtc->dev), rtc);
if (ret)
goto err;
if (rtc->irq_timer != rtc->irq_alarm) {
ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
dev_name(&rtc->rtc->dev), rtc);
if (ret)
goto err;
}
if (rtc->is_pmic_controller) {
if (!pm_power_off) {
omap_rtc_power_off_rtc = rtc;
pm_power_off = omap_rtc_power_off;
}
}
/* Support ext_wakeup pinconf */
rtc_pinctrl_desc.name = dev_name(&pdev->dev);
rtc->pctldev = pinctrl_register(&rtc_pinctrl_desc, &pdev->dev, rtc);
if (IS_ERR(rtc->pctldev)) {
dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
ret = PTR_ERR(rtc->pctldev);
goto err;
}
ret = rtc_register_device(rtc->rtc);
if (ret)
goto err;
rtc_nvmem_register(rtc->rtc, &omap_rtc_nvmem_config);
return 0;
err:
clk_disable_unprepare(rtc->clk);
device_init_wakeup(&pdev->dev, false);
rtc->type->lock(rtc);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
return ret;
}
static int stmp3xxx_rtc_probe(struct platform_device *pdev)
{
struct stmp3xxx_rtc_data *rtc_data;
struct resource *r;
u32 rtc_stat;
u32 pers0_set, pers0_clr;
u32 crystalfreq = 0;
int err;
rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);
if (!rtc_data)
return -ENOMEM;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!r) {
dev_err(&pdev->dev, "failed to get resource\n");
return -ENXIO;
}
rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r));
if (!rtc_data->io) {
dev_err(&pdev->dev, "ioremap failed\n");
return -EIO;
}
rtc_data->irq_alarm = platform_get_irq(pdev, 0);
rtc_stat = readl(rtc_data->io + STMP3XXX_RTC_STAT);
if (!(rtc_stat & STMP3XXX_RTC_STAT_RTC_PRESENT)) {
dev_err(&pdev->dev, "no device onboard\n");
return -ENODEV;
}
platform_set_drvdata(pdev, rtc_data);
/*
* Resetting the rtc stops the watchdog timer that is potentially
* running. So (assuming it is running on purpose) don't reset if the
* watchdog is enabled.
*/
if (readl(rtc_data->io + STMP3XXX_RTC_CTRL) &
STMP3XXX_RTC_CTRL_WATCHDOGEN) {
dev_info(&pdev->dev,
"Watchdog is running, skip resetting rtc\n");
} else {
err = stmp_reset_block(rtc_data->io);
if (err) {
dev_err(&pdev->dev, "stmp_reset_block failed: %d\n",
err);
return err;
}
}
/*
* Obviously the rtc needs a clock input to be able to run.
* This clock can be provided by an external 32k crystal. If that one is
* missing XTAL must not be disabled in suspend which consumes a
* lot of power. Normally the presence and exact frequency (supported
* are 32000 Hz and 32768 Hz) is detectable from fuses, but as reality
* proves these fuses are not blown correctly on all machines, so the
* frequency can be overridden in the device tree.
*/
if (rtc_stat & STMP3XXX_RTC_STAT_XTAL32000_PRESENT)
crystalfreq = 32000;
else if (rtc_stat & STMP3XXX_RTC_STAT_XTAL32768_PRESENT)
crystalfreq = 32768;
of_property_read_u32(pdev->dev.of_node, "stmp,crystal-freq",
&crystalfreq);
switch (crystalfreq) {
case 32000:
/* keep 32kHz crystal running in low-power mode */
pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL32_FREQ |
STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP;
break;
case 32768:
/* keep 32.768kHz crystal running in low-power mode */
pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP |
STMP3XXX_RTC_PERSISTENT0_XTAL32_FREQ;
break;
default:
dev_warn(&pdev->dev,
"invalid crystal-freq specified in device-tree. Assuming no crystal\n");
/* fall-through */
case 0:
/* keep XTAL on in low-power mode */
pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP;
pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
}
writel(pers0_set, rtc_data->io + STMP3XXX_RTC_PERSISTENT0 +
STMP_OFFSET_REG_SET);
writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE | pers0_clr,
rtc_data->io + STMP3XXX_RTC_PERSISTENT0 + STMP_OFFSET_REG_CLR);
writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN |
STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
rtc_data->rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(rtc_data->rtc))
return PTR_ERR(rtc_data->rtc);
err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm,
stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev);
if (err) {
dev_err(&pdev->dev, "Cannot claim IRQ%d\n",
rtc_data->irq_alarm);
return err;
}
rtc_data->rtc->ops = &stmp3xxx_rtc_ops;
rtc_data->rtc->range_max = U32_MAX;
err = rtc_register_device(rtc_data->rtc);
if (err)
return err;
stmp3xxx_wdt_register(pdev);
return 0;
}
static int abb5zes3_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct abb5zes3_rtc_data *data = NULL;
struct device *dev = &client->dev;
struct regmap *regmap;
int ret;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_I2C_BLOCK)) {
ret = -ENODEV;
goto err;
}
regmap = devm_regmap_init_i2c(client, &abb5zes3_rtc_regmap_config);
if (IS_ERR(regmap)) {
ret = PTR_ERR(regmap);
dev_err(dev, "%s: regmap allocation failed: %d\n",
__func__, ret);
goto err;
}
ret = abb5zes3_i2c_validate_chip(regmap);
if (ret)
goto err;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data) {
ret = -ENOMEM;
goto err;
}
mutex_init(&data->lock);
data->regmap = regmap;
dev_set_drvdata(dev, data);
ret = abb5zes3_rtc_check_setup(dev);
if (ret)
goto err;
data->rtc = devm_rtc_allocate_device(dev);
ret = PTR_ERR_OR_ZERO(data->rtc);
if (ret) {
dev_err(dev, "%s: unable to allocate RTC device (%d)\n",
__func__, ret);
goto err;
}
if (client->irq > 0) {
ret = devm_request_threaded_irq(dev, client->irq, NULL,
_abb5zes3_rtc_interrupt,
IRQF_SHARED|IRQF_ONESHOT,
DRV_NAME, client);
if (!ret) {
device_init_wakeup(dev, true);
data->irq = client->irq;
dev_dbg(dev, "%s: irq %d used by RTC\n", __func__,
client->irq);
} else {
dev_err(dev, "%s: irq %d unavailable (%d)\n",
__func__, client->irq, ret);
goto err;
}
}
data->rtc->ops = &rtc_ops;
data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
data->rtc->range_max = RTC_TIMESTAMP_END_2099;
/* Enable battery low detection interrupt if battery not already low */
if (!data->battery_low && data->irq) {
ret = _abb5zes3_rtc_battery_low_irq_enable(regmap, true);
if (ret) {
dev_err(dev, "%s: enabling battery low interrupt "
"generation failed (%d)\n", __func__, ret);
goto err;
}
}
ret = rtc_register_device(data->rtc);
err:
if (ret && data && data->irq)
device_init_wakeup(dev, false);
return ret;
}
static int st_rtc_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct st_rtc *rtc;
struct resource *res;
uint32_t mode;
int ret = 0;
ret = of_property_read_u32(np, "st,lpc-mode", &mode);
if (ret) {
dev_err(&pdev->dev, "An LPC mode must be provided\n");
return -EINVAL;
}
/* LPC can either run as a Clocksource or in RTC or WDT mode */
if (mode != ST_LPC_MODE_RTC)
return -ENODEV;
rtc = devm_kzalloc(&pdev->dev, sizeof(struct st_rtc), GFP_KERNEL);
if (!rtc)
return -ENOMEM;
rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(rtc->rtc_dev))
return PTR_ERR(rtc->rtc_dev);
spin_lock_init(&rtc->lock);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rtc->ioaddr = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(rtc->ioaddr))
return PTR_ERR(rtc->ioaddr);
rtc->irq = irq_of_parse_and_map(np, 0);
if (!rtc->irq) {
dev_err(&pdev->dev, "IRQ missing or invalid\n");
return -EINVAL;
}
ret = devm_request_irq(&pdev->dev, rtc->irq, st_rtc_handler, 0,
pdev->name, rtc);
if (ret) {
dev_err(&pdev->dev, "Failed to request irq %i\n", rtc->irq);
return ret;
}
enable_irq_wake(rtc->irq);
disable_irq(rtc->irq);
rtc->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(rtc->clk)) {
dev_err(&pdev->dev, "Unable to request clock\n");
return PTR_ERR(rtc->clk);
}
clk_prepare_enable(rtc->clk);
rtc->clkrate = clk_get_rate(rtc->clk);
if (!rtc->clkrate) {
dev_err(&pdev->dev, "Unable to fetch clock rate\n");
return -EINVAL;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, rtc);
rtc->rtc_dev->ops = &st_rtc_ops;
rtc->rtc_dev->range_max = U64_MAX;
do_div(rtc->rtc_dev->range_max, rtc->clkrate);
ret = rtc_register_device(rtc->rtc_dev);
if (ret) {
clk_disable_unprepare(rtc->clk);
return ret;
}
return 0;
}
static int m48t59_rtc_probe(struct platform_device *pdev)
{
struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
struct m48t59_private *m48t59 = NULL;
struct resource *res;
int ret = -ENOMEM;
char *name;
const struct rtc_class_ops *ops;
struct nvmem_config nvmem_cfg = {
.name = "m48t59-",
.word_size = 1,
.stride = 1,
.reg_read = m48t59_nvram_read,
.reg_write = m48t59_nvram_write,
.priv = pdev,
};
/* This chip could be memory-mapped or I/O-mapped */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!res)
return -EINVAL;
}
if (res->flags & IORESOURCE_IO) {
/* If we are I/O-mapped, the platform should provide
* the operations accessing chip registers.
*/
if (!pdata || !pdata->write_byte || !pdata->read_byte)
return -EINVAL;
} else if (res->flags & IORESOURCE_MEM) {
/* we are memory-mapped */
if (!pdata) {
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),
GFP_KERNEL);
if (!pdata)
return -ENOMEM;
/* Ensure we only kmalloc platform data once */
pdev->dev.platform_data = pdata;
}
if (!pdata->type)
pdata->type = M48T59RTC_TYPE_M48T59;
/* Try to use the generic memory read/write ops */
if (!pdata->write_byte)
pdata->write_byte = m48t59_mem_writeb;
if (!pdata->read_byte)
pdata->read_byte = m48t59_mem_readb;
}
m48t59 = devm_kzalloc(&pdev->dev, sizeof(*m48t59), GFP_KERNEL);
if (!m48t59)
return -ENOMEM;
m48t59->ioaddr = pdata->ioaddr;
if (!m48t59->ioaddr) {
/* ioaddr not mapped externally */
m48t59->ioaddr = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
if (!m48t59->ioaddr)
return ret;
}
/* Try to get irq number. We also can work in
* the mode without IRQ.
*/
m48t59->irq = platform_get_irq(pdev, 0);
if (m48t59->irq <= 0)
m48t59->irq = NO_IRQ;
if (m48t59->irq != NO_IRQ) {
ret = devm_request_irq(&pdev->dev, m48t59->irq,
m48t59_rtc_interrupt, IRQF_SHARED,
"rtc-m48t59", &pdev->dev);
if (ret)
return ret;
}
switch (pdata->type) {
case M48T59RTC_TYPE_M48T59:
name = "m48t59";
ops = &m48t59_rtc_ops;
pdata->offset = 0x1ff0;
break;
case M48T59RTC_TYPE_M48T02:
name = "m48t02";
ops = &m48t02_rtc_ops;
pdata->offset = 0x7f0;
break;
case M48T59RTC_TYPE_M48T08:
name = "m48t08";
ops = &m48t02_rtc_ops;
pdata->offset = 0x1ff0;
break;
default:
dev_err(&pdev->dev, "Unknown RTC type\n");
return -ENODEV;
}
spin_lock_init(&m48t59->lock);
platform_set_drvdata(pdev, m48t59);
m48t59->rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(m48t59->rtc))
return PTR_ERR(m48t59->rtc);
m48t59->rtc->nvram_old_abi = true;
m48t59->rtc->ops = ops;
nvmem_cfg.size = pdata->offset;
ret = rtc_nvmem_register(m48t59->rtc, &nvmem_cfg);
if (ret)
return ret;
ret = rtc_register_device(m48t59->rtc);
if (ret)
return ret;
return 0;
}
/* work with hotplug and coldplug */
MODULE_ALIAS("platform:rtc-m48t59");
static struct platform_driver m48t59_rtc_driver = {
.driver = {
.name = "rtc-m48t59",
},
.probe = m48t59_rtc_probe,
};
static int m48t86_rtc_probe(struct platform_device *pdev)
{
struct m48t86_rtc_info *info;
struct resource *res;
unsigned char reg;
int err;
struct nvmem_config m48t86_nvmem_cfg = {
.name = "m48t86_nvram",
.word_size = 1,
.stride = 1,
.size = M48T86_NVRAM_LEN,
.reg_read = m48t86_nvram_read,
.reg_write = m48t86_nvram_write,
.priv = &pdev->dev,
};
info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
if (!info)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
info->index_reg = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(info->index_reg))
return PTR_ERR(info->index_reg);
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (!res)
return -ENODEV;
info->data_reg = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(info->data_reg))
return PTR_ERR(info->data_reg);
dev_set_drvdata(&pdev->dev, info);
if (!m48t86_verify_chip(pdev)) {
dev_info(&pdev->dev, "RTC not present\n");
return -ENODEV;
}
info->rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(info->rtc))
return PTR_ERR(info->rtc);
info->rtc->ops = &m48t86_rtc_ops;
info->rtc->nvram_old_abi = true;
err = rtc_register_device(info->rtc);
if (err)
return err;
rtc_nvmem_register(info->rtc, &m48t86_nvmem_cfg);
/* read battery status */
reg = m48t86_readb(&pdev->dev, M48T86_D);
dev_info(&pdev->dev, "battery %s\n",
(reg & M48T86_D_VRT) ? "ok" : "exhausted");
return 0;
}
static struct platform_driver m48t86_rtc_platform_driver = {
.driver = {
.name = "rtc-m48t86",
},
.probe = m48t86_rtc_probe,
};
static int ds1343_probe(struct spi_device *spi)
{
struct ds1343_priv *priv;
struct regmap_config config = { .reg_bits = 8, .val_bits = 8,
.write_flag_mask = 0x80, };
unsigned int data;
int res;
struct nvmem_config nvmem_cfg = {
.name = "ds1343-",
.word_size = 1,
.stride = 1,
.size = DS1343_NVRAM_LEN,
.reg_read = ds1343_nvram_read,
.reg_write = ds1343_nvram_write,
};
priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->spi = spi;
mutex_init(&priv->mutex);
/* RTC DS1347 works in spi mode 3 and
* its chip select is active high
*/
spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
spi->bits_per_word = 8;
res = spi_setup(spi);
if (res)
return res;
spi_set_drvdata(spi, priv);
priv->map = devm_regmap_init_spi(spi, &config);
if (IS_ERR(priv->map)) {
dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
return PTR_ERR(priv->map);
}
res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
if (res)
return res;
regmap_read(priv->map, DS1343_CONTROL_REG, &data);
data |= DS1343_INTCN;
data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
regmap_write(priv->map, DS1343_CONTROL_REG, data);
regmap_read(priv->map, DS1343_STATUS_REG, &data);
data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
regmap_write(priv->map, DS1343_STATUS_REG, data);
priv->rtc = devm_rtc_allocate_device(&spi->dev);
if (IS_ERR(priv->rtc))
return PTR_ERR(priv->rtc);
priv->rtc->nvram_old_abi = true;
priv->rtc->ops = &ds1343_rtc_ops;
res = rtc_register_device(priv->rtc);
if (res)
return res;
nvmem_cfg.priv = priv;
rtc_nvmem_register(priv->rtc, &nvmem_cfg);
priv->irq = spi->irq;
if (priv->irq >= 0) {
res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
ds1343_thread, IRQF_ONESHOT,
"ds1343", priv);
if (res) {
priv->irq = -1;
dev_err(&spi->dev,
"unable to request irq for rtc ds1343\n");
} else {
device_init_wakeup(&spi->dev, true);
dev_pm_set_wake_irq(&spi->dev, spi->irq);
}
}
res = ds1343_sysfs_register(&spi->dev);
if (res)
dev_err(&spi->dev,
"unable to create sysfs entries for rtc ds1343\n");
return 0;
}
static int ds1343_remove(struct spi_device *spi)
{
struct ds1343_priv *priv = spi_get_drvdata(spi);
if (spi->irq) {
mutex_lock(&priv->mutex);
priv->irqen &= ~RTC_AF;
mutex_unlock(&priv->mutex);
dev_pm_clear_wake_irq(&spi->dev);
device_init_wakeup(&spi->dev, false);
devm_free_irq(&spi->dev, spi->irq, priv);
}
spi_set_drvdata(spi, NULL);
ds1343_sysfs_unregister(&spi->dev);
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int ds1343_suspend(struct device *dev)
{
struct spi_device *spi = to_spi_device(dev);
if (spi->irq >= 0 && device_may_wakeup(dev))
enable_irq_wake(spi->irq);
return 0;
}
static int ds1343_resume(struct device *dev)
{
struct spi_device *spi = to_spi_device(dev);
if (spi->irq >= 0 && device_may_wakeup(dev))
disable_irq_wake(spi->irq);
return 0;
}
#endif
static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
static struct spi_driver ds1343_driver = {
.driver = {
.name = "ds1343",
.pm = &ds1343_pm,
},
.probe = ds1343_probe,
.remove = ds1343_remove,
.id_table = ds1343_id,
};
module_spi_driver(ds1343_driver);
MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
MODULE_AUTHOR("Raghavendra Chandra Ganiga <*****@*****.**>,"
"Ankur Srivastava <*****@*****.**>");
MODULE_LICENSE("GPL v2");
static int puv3_rtc_probe(struct platform_device *pdev)
{
struct rtc_device *rtc;
struct resource *res;
int ret;
dev_dbg(&pdev->dev, "%s: probe=%p\n", __func__, pdev);
/* find the IRQs */
puv3_rtc_tickno = platform_get_irq(pdev, 1);
if (puv3_rtc_tickno < 0) {
dev_err(&pdev->dev, "no irq for rtc tick\n");
return -ENOENT;
}
puv3_rtc_alarmno = platform_get_irq(pdev, 0);
if (puv3_rtc_alarmno < 0) {
dev_err(&pdev->dev, "no irq for alarm\n");
return -ENOENT;
}
dev_dbg(&pdev->dev, "PKUnity_rtc: tick irq %d, alarm irq %d\n",
puv3_rtc_tickno, puv3_rtc_alarmno);
rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(rtc))
return PTR_ERR(rtc);
ret = devm_request_irq(&pdev->dev, puv3_rtc_alarmno, puv3_rtc_alarmirq,
0, "pkunity-rtc alarm", rtc);
if (ret) {
dev_err(&pdev->dev, "IRQ%d error %d\n", puv3_rtc_alarmno, ret);
return ret;
}
ret = devm_request_irq(&pdev->dev, puv3_rtc_tickno, puv3_rtc_tickirq,
0, "pkunity-rtc tick", rtc);
if (ret) {
dev_err(&pdev->dev, "IRQ%d error %d\n", puv3_rtc_tickno, ret);
return ret;
}
/* get the memory region */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
dev_err(&pdev->dev, "failed to get memory region resource\n");
return -ENOENT;
}
puv3_rtc_mem = request_mem_region(res->start, resource_size(res),
pdev->name);
if (puv3_rtc_mem == NULL) {
dev_err(&pdev->dev, "failed to reserve memory region\n");
ret = -ENOENT;
goto err_nores;
}
puv3_rtc_enable(&pdev->dev, 1);
/* register RTC and exit */
rtc->ops = &puv3_rtcops;
ret = rtc_register_device(rtc);
if (ret) {
dev_err(&pdev->dev, "cannot attach rtc\n");
goto err_nortc;
}
/* platform setup code should have handled this; sigh */
if (!device_can_wakeup(&pdev->dev))
device_init_wakeup(&pdev->dev, 1);
platform_set_drvdata(pdev, rtc);
return 0;
err_nortc:
puv3_rtc_enable(&pdev->dev, 0);
release_resource(puv3_rtc_mem);
err_nores:
return ret;
}
