static void __exit scc_enet_cleanup(void)
{
struct rtnet_device *rtdev = rtdev_root;
struct scc_enet_private *cep = (struct scc_enet_private *)rtdev->priv;
volatile cpm8xx_t *cp = cpmp;
volatile scc_enet_t *ep;
if (rtdev) {
rtdm_irq_disable(&cep->irq_handle);
rtdm_irq_free(&cep->irq_handle);
ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]);
m8xx_cpm_dpfree(ep->sen_genscc.scc_rbase);
m8xx_cpm_dpfree(ep->sen_genscc.scc_tbase);
rt_stack_disconnect(rtdev);
rt_unregister_rtnetdev(rtdev);
rt_rtdev_disconnect(rtdev);
printk("%s: unloaded\n", rtdev->name);
rtskb_pool_release(&cep->skb_pool);
rtdev_free(rtdev);
rtdev_root = NULL;
}
}
static int uart_close_nrt(struct rtdm_dev_context *context,rtdm_user_info_t * user_info)
{
int err;
MY_DEV *up=(MY_DEV *)context->device->device_data;
dev_dbg(up->dev, "serial_omap_shutdown+%d\n", up->line);
up->ier = 0;
serial_out(up, UART_IER, 0);
//disable break condition and FIFOs
serial_out(up,UART_LCR,serial_in(up,UART_LCR) & ~UART_LCR_SBC);
serial_omap_clear_fifos(up);
//read data port to reset things and then free irq
if(serial_in(up,UART_LSR) & UART_LSR_DR)
(void)serial_in(up,UART_RX);
err=rtdm_irq_disable(&up->irq_handle);//enable irq
if(err<0)
{
rtdm_printk("error in rtdm_irq_disable\n");
return err;
}
rtdm_printk("rtdm_irq_disable\n");
rtdm_irq_free(&up->irq_handle);
free_irq(up->irq, up);
return 0;
}
static int tulip_close (/*RTnet*/struct rtnet_device *rtdev)
{
long ioaddr = rtdev->base_addr;
struct tulip_private *tp = (struct tulip_private *) rtdev->priv;
int i;
rtnetif_stop_queue (rtdev);
tulip_down (rtdev);
if (tulip_debug > 1)
printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
rtdev->name, inl (ioaddr + CSR5));
rtdm_irq_free(&tp->irq_handle);
/* Free all the skbuffs in the Rx queue. */
for (i = 0; i < RX_RING_SIZE; i++) {
struct /*RTnet*/rtskb *skb = tp->rx_buffers[i].skb;
dma_addr_t mapping = tp->rx_buffers[i].mapping;
tp->rx_buffers[i].skb = NULL;
tp->rx_buffers[i].mapping = 0;
tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
tp->rx_ring[i].length = 0;
tp->rx_ring[i].buffer1 = 0xBADF00D0; /* An invalid address. */
if (skb) {
pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
PCI_DMA_FROMDEVICE);
/*RTnet*/dev_kfree_rtskb (skb);
}
}
for (i = 0; i < TX_RING_SIZE; i++) {
struct /*RTnet*/rtskb *skb = tp->tx_buffers[i].skb;
if (skb != NULL) {
pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
skb->len, PCI_DMA_TODEVICE);
/*RTnet*/dev_kfree_rtskb (skb);
}
tp->tx_buffers[i].skb = NULL;
tp->tx_buffers[i].mapping = 0;
}
rt_stack_disconnect(rtdev);
return 0;
}
void cleanup_mpu9150_irq(void)
{
rtdm_printk("MPU9150-IRQ: Releasing IRQ resources...\n");
if( irq_requested )
{
rtdm_irq_disable( &mpu9150_irq );
rtdm_irq_free( &mpu9150_irq );
}
if( irq_gpio_requested )
gpio_free( mpu9150_irq_desc.gpio_desc.gpio );
// Close the pipe
rt_pipe_delete( &pipe_desc );
rtdm_printk("MPU9150-IRQ: IRQ resources released\n");
}
int demo_close_rt(struct rtdm_dev_context *context,
rtdm_user_info_t *user_info)
{
struct demodrv_context *my_context;
rtdm_lockctx_t lock_ctx;
#ifdef USEMMAP
unsigned long vaddr;
#endif
// get the context
my_context = (struct demodrv_context *)context->dev_private;
#ifdef USEMMAP
// printk some test value
printk("%d\n", *((int *)my_context->buf + 10));
// munmap our buffer
if (my_context->mapped_user_addr) {
int ret = rtdm_munmap(my_context->mapped_user_info,
my_context->mapped_user_addr, BUFFER_SIZE);
printk("rtdm_munmap = %p, %d\n", my_context->mapped_user_info, ret);
}
/* clear pages reserved */
for (vaddr = (unsigned long)my_context->buf;
vaddr < (unsigned long)my_context->buf + BUFFER_SIZE;
vaddr += PAGE_SIZE)
ClearPageReserved(virt_to_page(vaddr));
kfree(my_context->buf);
#endif
// if we need to do some stuff with preemption disabled:
rtdm_lock_get_irqsave(&my_context->lock, lock_ctx);
// other stuff here
rtdm_lock_put_irqrestore(&my_context->lock, lock_ctx);
// free irq in RTDM
rtdm_irq_free(&my_context->irq_handle);
// destroy our interrupt signal/event
rtdm_event_destroy(&my_context->irq_event);
return 0;
}
static int rt2x00_dev_radio_off(struct _rt2x00_device * device) {
struct _rt2x00_pci *rt2x00pci = rt2x00_priv(device);
u32 reg = 0x00000000;
int retval=0;
rt2x00_register_write(rt2x00pci, PWRCSR0, cpu_to_le32(0x00000000));
rt2x00_register_read(rt2x00pci, TXCSR0, ®);
rt2x00_set_field32(®, TXCSR0_ABORT, 1);
rt2x00_register_write(rt2x00pci, TXCSR0, reg);
rt2x00_register_read(rt2x00pci, RXCSR0, ®);
rt2x00_set_field32(®, RXCSR0_DISABLE_RX, 1);
rt2x00_register_write(rt2x00pci, RXCSR0, reg);
rt2x00_register_read(rt2x00pci, LEDCSR, ®);
rt2x00_set_field32(®, LEDCSR_LINK, 0);
rt2x00_register_write(rt2x00pci, LEDCSR, reg);
rt2x00_register_read(rt2x00pci, CSR8, ®);
rt2x00_set_field32(®, CSR8_TBCN_EXPIRE, 1);
rt2x00_set_field32(®, CSR8_TXDONE_TXRING, 1);
rt2x00_set_field32(®, CSR8_TXDONE_ATIMRING, 1);
rt2x00_set_field32(®, CSR8_TXDONE_PRIORING, 1);
rt2x00_set_field32(®, CSR8_RXDONE, 1);
rt2x00_register_write(rt2x00pci, CSR8, reg);
rt2x00_pci_free_rings(device);
if((retval=rtdm_irq_free(&rt2x00pci->irq_handle)) != 0)
ERROR("rtdm_irq_free=%d\n", retval);
rt_stack_disconnect(device->rtnet_dev);
return retval;
}
/* Initialize the CPM Ethernet on SCC. If EPPC-Bug loaded us, or performed
* some other network I/O, a whole bunch of this has already been set up.
* It is no big deal if we do it again, we just have to disable the
* transmit and receive to make sure we don't catch the CPM with some
* inconsistent control information.
*/
int __init scc_enet_init(void)
{
struct rtnet_device *rtdev = NULL;
struct scc_enet_private *cep;
int i, j, k;
unsigned char *eap, *ba;
dma_addr_t mem_addr;
bd_t *bd;
volatile cbd_t *bdp;
volatile cpm8xx_t *cp;
volatile scc_t *sccp;
volatile scc_enet_t *ep;
volatile immap_t *immap;
cp = cpmp; /* Get pointer to Communication Processor */
immap = (immap_t *)(mfspr(IMMR) & 0xFFFF0000); /* and to internal registers */
bd = (bd_t *)__res;
/* Configure the SCC parameters (this has formerly be done
* by macro definitions).
*/
switch (rtnet_scc) {
case 3:
CPM_CR_ENET = CPM_CR_CH_SCC3;
PROFF_ENET = PROFF_SCC3;
SCC_ENET = 2; /* Index, not number! */
CPMVEC_ENET = CPMVEC_SCC3;
break;
case 2:
CPM_CR_ENET = CPM_CR_CH_SCC2;
PROFF_ENET = PROFF_SCC2;
SCC_ENET = 1; /* Index, not number! */
CPMVEC_ENET = CPMVEC_SCC2;
break;
case 1:
CPM_CR_ENET = CPM_CR_CH_SCC1;
PROFF_ENET = PROFF_SCC1;
SCC_ENET = 0; /* Index, not number! */
CPMVEC_ENET = CPMVEC_SCC1;
break;
default:
printk(KERN_ERR "enet: SCC%d doesn't exit (check rtnet_scc)\n", rtnet_scc);
return -1;
}
/* Allocate some private information and create an Ethernet device instance.
*/
rtdev = rtdev_root = rt_alloc_etherdev(sizeof(struct scc_enet_private));
if (rtdev == NULL) {
printk(KERN_ERR "enet: Could not allocate ethernet device.\n");
return -1;
}
rtdev_alloc_name(rtdev, "rteth%d");
rt_rtdev_connect(rtdev, &RTDEV_manager);
RTNET_SET_MODULE_OWNER(rtdev);
rtdev->vers = RTDEV_VERS_2_0;
cep = (struct scc_enet_private *)rtdev->priv;
rtdm_lock_init(&cep->lock);
/* Get pointer to SCC area in parameter RAM.
*/
ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]);
/* And another to the SCC register area.
*/
sccp = (volatile scc_t *)(&cp->cp_scc[SCC_ENET]);
cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */
/* Disable receive and transmit in case EPPC-Bug started it.
*/
sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
/* Cookbook style from the MPC860 manual.....
* Not all of this is necessary if EPPC-Bug has initialized
* the network.
* So far we are lucky, all board configurations use the same
* pins, or at least the same I/O Port for these functions.....
* It can't last though......
*/
#if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
/* Configure port A pins for Txd and Rxd.
*/
immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);
immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);
immap->im_ioport.iop_paodr &= ~PA_ENET_TXD;
#elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD))
/* Configure port B pins for Txd and Rxd.
*/
immap->im_cpm.cp_pbpar |= (PB_ENET_RXD | PB_ENET_TXD);
immap->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD);
immap->im_cpm.cp_pbodr &= ~PB_ENET_TXD;
#else
#error Exactly ONE pair of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined
#endif
#if defined(PC_ENET_LBK)
/* Configure port C pins to disable External Loopback
*/
immap->im_ioport.iop_pcpar &= ~PC_ENET_LBK;
immap->im_ioport.iop_pcdir |= PC_ENET_LBK;
immap->im_ioport.iop_pcso &= ~PC_ENET_LBK;
immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */
#endif /* PC_ENET_LBK */
/* Configure port C pins to enable CLSN and RENA.
*/
immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
/* Configure port A for TCLK and RCLK.
*/
immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
/* Configure Serial Interface clock routing.
* First, clear all SCC bits to zero, then set the ones we want.
*/
cp->cp_sicr &= ~SICR_ENET_MASK;
cp->cp_sicr |= SICR_ENET_CLKRT;
/* Manual says set SDDR, but I can't find anything with that
* name. I think it is a misprint, and should be SDCR. This
* has already been set by the communication processor initialization.
*/
/* Allocate space for the buffer descriptors in the DP ram.
* These are relative offsets in the DP ram address space.
* Initialize base addresses for the buffer descriptors.
*/
i = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE);
ep->sen_genscc.scc_rbase = i;
cep->rx_bd_base = (cbd_t *)&cp->cp_dpmem[i];
i = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE);
ep->sen_genscc.scc_tbase = i;
cep->tx_bd_base = (cbd_t *)&cp->cp_dpmem[i];
cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
cep->cur_rx = cep->rx_bd_base;
/* Issue init Rx BD command for SCC.
* Manual says to perform an Init Rx parameters here. We have
* to perform both Rx and Tx because the SCC may have been
* already running.
* In addition, we have to do it later because we don't yet have
* all of the BD control/status set properly.
cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_RX) | CPM_CR_FLG;
while (cp->cp_cpcr & CPM_CR_FLG);
*/
/* Initialize function code registers for big-endian.
*/
ep->sen_genscc.scc_rfcr = SCC_EB;
ep->sen_genscc.scc_tfcr = SCC_EB;
/* Set maximum bytes per receive buffer.
* This appears to be an Ethernet frame size, not the buffer
* fragment size. It must be a multiple of four.
*/
ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;
/* Set CRC preset and mask.
*/
ep->sen_cpres = 0xffffffff;
ep->sen_cmask = 0xdebb20e3;
ep->sen_crcec = 0; /* CRC Error counter */
ep->sen_alec = 0; /* alignment error counter */
ep->sen_disfc = 0; /* discard frame counter */
ep->sen_pads = 0x8888; /* Tx short frame pad character */
ep->sen_retlim = 15; /* Retry limit threshold */
ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */
ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */
/* Clear hash tables.
*/
ep->sen_gaddr1 = 0;
ep->sen_gaddr2 = 0;
ep->sen_gaddr3 = 0;
ep->sen_gaddr4 = 0;
ep->sen_iaddr1 = 0;
ep->sen_iaddr2 = 0;
ep->sen_iaddr3 = 0;
ep->sen_iaddr4 = 0;
/* Set Ethernet station address.
*/
eap = (unsigned char *)&(ep->sen_paddrh);
#ifdef CONFIG_FEC_ENET
/* We need a second MAC address if FEC is used by Linux */
for (i=5; i>=0; i--)
*eap++ = rtdev->dev_addr[i] = (bd->bi_enetaddr[i] |
(i==3 ? 0x80 : 0));
#else
for (i=5; i>=0; i--)
*eap++ = rtdev->dev_addr[i] = bd->bi_enetaddr[i];
#endif
ep->sen_pper = 0; /* 'cause the book says so */
ep->sen_taddrl = 0; /* temp address (LSB) */
ep->sen_taddrm = 0;
ep->sen_taddrh = 0; /* temp address (MSB) */
/* Now allocate the host memory pages and initialize the
* buffer descriptors.
*/
bdp = cep->tx_bd_base;
for (i=0; i<TX_RING_SIZE; i++) {
/* Initialize the BD for every fragment in the page.
*/
bdp->cbd_sc = 0;
bdp->cbd_bufaddr = 0;
bdp++;
}
/* Set the last buffer to wrap.
*/
bdp--;
bdp->cbd_sc |= BD_SC_WRAP;
bdp = cep->rx_bd_base;
k = 0;
for (i=0; i<CPM_ENET_RX_PAGES; i++) {
/* Allocate a page.
*/
ba = (unsigned char *)consistent_alloc(GFP_KERNEL, PAGE_SIZE, &mem_addr);
/* Initialize the BD for every fragment in the page.
*/
for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
bdp->cbd_bufaddr = mem_addr;
cep->rx_vaddr[k++] = ba;
mem_addr += CPM_ENET_RX_FRSIZE;
ba += CPM_ENET_RX_FRSIZE;
bdp++;
}
}
/* Set the last buffer to wrap.
*/
bdp--;
bdp->cbd_sc |= BD_SC_WRAP;
/* Let's re-initialize the channel now. We have to do it later
* than the manual describes because we have just now finished
* the BD initialization.
*/
cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_TRX) | CPM_CR_FLG;
while (cp->cp_cpcr & CPM_CR_FLG);
cep->skb_cur = cep->skb_dirty = 0;
sccp->scc_scce = 0xffff; /* Clear any pending events */
/* Enable interrupts for transmit error, complete frame
* received, and any transmit buffer we have also set the
* interrupt flag.
*/
sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
/* Install our interrupt handler.
*/
rtdev->irq = CPM_IRQ_OFFSET + CPMVEC_ENET;
rt_stack_connect(rtdev, &STACK_manager);
if ((i = rtdm_irq_request(&cep->irq_handle, rtdev->irq,
scc_enet_interrupt, 0, "rt_mpc8xx_enet", rtdev))) {
printk(KERN_ERR "Couldn't request IRQ %d\n", rtdev->irq);
rtdev_free(rtdev);
return i;
}
/* Set GSMR_H to enable all normal operating modes.
* Set GSMR_L to enable Ethernet to MC68160.
*/
sccp->scc_gsmrh = 0;
sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);
/* Set sync/delimiters.
*/
sccp->scc_dsr = 0xd555;
/* Set processing mode. Use Ethernet CRC, catch broadcast, and
* start frame search 22 bit times after RENA.
*/
sccp->scc_pmsr = (SCC_PMSR_ENCRC | SCC_PMSR_NIB22);
/* It is now OK to enable the Ethernet transmitter.
* Unfortunately, there are board implementation differences here.
*/
#if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA))
immap->im_ioport.iop_pcpar |= PC_ENET_TENA;
immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA))
cp->cp_pbpar |= PB_ENET_TENA;
cp->cp_pbdir |= PB_ENET_TENA;
#else
#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA
#endif
#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
/* And while we are here, set the configuration to enable ethernet.
*/
*((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK;
*((volatile uint *)RPX_CSR_ADDR) |=
(BCSR0_ETHEN | BCSR0_COLTESTDIS | BCSR0_FULLDPLXDIS);
#endif
#ifdef CONFIG_BSEIP
/* BSE uses port B and C for PHY control.
*/
cp->cp_pbpar &= ~(PB_BSE_POWERUP | PB_BSE_FDXDIS);
cp->cp_pbdir |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
cp->cp_pbdat |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
immap->im_ioport.iop_pcpar &= ~PC_BSE_LOOPBACK;
immap->im_ioport.iop_pcdir |= PC_BSE_LOOPBACK;
immap->im_ioport.iop_pcso &= ~PC_BSE_LOOPBACK;
immap->im_ioport.iop_pcdat &= ~PC_BSE_LOOPBACK;
#endif
#ifdef CONFIG_FADS
cp->cp_pbpar |= PB_ENET_TENA;
cp->cp_pbdir |= PB_ENET_TENA;
/* Enable the EEST PHY.
*/
*((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
#endif
rtdev->base_addr = (unsigned long)ep;
/* The CPM Ethernet specific entries in the device structure. */
rtdev->open = scc_enet_open;
rtdev->hard_start_xmit = scc_enet_start_xmit;
rtdev->stop = scc_enet_close;
rtdev->hard_header = &rt_eth_header;
rtdev->get_stats = scc_enet_get_stats;
if (!rx_pool_size)
rx_pool_size = RX_RING_SIZE * 2;
if (rtskb_pool_init(&cep->skb_pool, rx_pool_size) < rx_pool_size) {
rtdm_irq_disable(&cep->irq_handle);
rtdm_irq_free(&cep->irq_handle);
rtskb_pool_release(&cep->skb_pool);
rtdev_free(rtdev);
return -ENOMEM;
}
if ((i = rt_register_rtnetdev(rtdev))) {
printk(KERN_ERR "Couldn't register rtdev\n");
rtdm_irq_disable(&cep->irq_handle);
rtdm_irq_free(&cep->irq_handle);
rtskb_pool_release(&cep->skb_pool);
rtdev_free(rtdev);
return i;
}
/* And last, enable the transmit and receive processing.
*/
sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
printk("%s: CPM ENET Version 0.2 on SCC%d, irq %d, addr %02x:%02x:%02x:%02x:%02x:%02x\n",
rtdev->name, SCC_ENET+1, rtdev->irq,
rtdev->dev_addr[0], rtdev->dev_addr[1], rtdev->dev_addr[2],
rtdev->dev_addr[3], rtdev->dev_addr[4], rtdev->dev_addr[5]);
return 0;
}
static void trigger_deinit(void)
{
rtdm_irq_free(&irq_main_trigger);
gpio_free(MAIN_TRIGGER);
}
static void __exit exemple_exit (void)
{
rtdm_irq_free(& irq_rtdm);
gpio_free(GPIO_OUT);
gpio_free(GPIO_IN);
}
