/*******************************************************************************
* Function to perform late architectural and platform specific initialization.
* It also locates and loads the BL2 raw binary image in the trusted DRAM. Only
* called by the primary cpu after a cold boot.
* TODO: Add support for alternative image load mechanism e.g using virtio/elf
* loader etc.
******************************************************************************/
void bl1_main(void)
{
unsigned long sctlr_el3 = read_sctlr();
unsigned long bl2_base;
unsigned int load_type = TOP_LOAD, spsr;
meminfo *bl1_tzram_layout;
meminfo *bl2_tzram_layout = 0x0;
/*
* Ensure that MMU/Caches and coherency are turned on
*/
assert(sctlr_el3 | SCTLR_M_BIT);
assert(sctlr_el3 | SCTLR_C_BIT);
assert(sctlr_el3 | SCTLR_I_BIT);
/* Perform remaining generic architectural setup from EL3 */
bl1_arch_setup();
/* Perform platform setup in BL1. */
bl1_platform_setup();
/* Announce our arrival */
printf(FIRMWARE_WELCOME_STR);
printf("Built : %s, %s\n\r", __TIME__, __DATE__);
/*
* Find out how much free trusted ram remains after BL1 load
* & load the BL2 image at its top
*/
bl1_tzram_layout = bl1_plat_sec_mem_layout();
bl2_base = load_image(bl1_tzram_layout,
(const char *) BL2_IMAGE_NAME,
load_type, BL2_BASE);
/*
* Create a new layout of memory for BL2 as seen by BL1 i.e.
* tell it the amount of total and free memory available.
* This layout is created at the first free address visible
* to BL2. BL2 will read the memory layout before using its
* memory for other purposes.
*/
bl2_tzram_layout = (meminfo *) bl1_tzram_layout->free_base;
init_bl2_mem_layout(bl1_tzram_layout,
bl2_tzram_layout,
load_type,
bl2_base);
if (bl2_base) {
bl1_arch_next_el_setup();
spsr = make_spsr(MODE_EL1, MODE_SP_ELX, MODE_RW_64);
printf("Booting trusted firmware boot loader stage 2\n\r");
#if DEBUG
printf("BL2 address = 0x%llx \n\r", (unsigned long long) bl2_base);
printf("BL2 cpsr = 0x%x \n\r", spsr);
printf("BL2 memory layout address = 0x%llx \n\r",
(unsigned long long) bl2_tzram_layout);
#endif
run_image(bl2_base, spsr, SECURE, bl2_tzram_layout, 0);
}
/*
* TODO: print failure to load BL2 but also add a tzwdog timer
* which will reset the system eventually.
*/
printf("Failed to load boot loader stage 2 (BL2) firmware.\n\r");
return;
}
/*******************************************************************************
* The only thing to do in BL2 is to load further images and pass control to
* BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs
* entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al
* are not available. We rely on assertions to signal error conditions
******************************************************************************/
void bl2_main(void)
{
meminfo *bl2_tzram_layout;
bl31_args *bl2_to_bl31_args;
unsigned long bl31_base, bl32_base = 0, bl33_base, el_status;
unsigned int bl2_load, bl31_load, mode;
/* Perform remaining generic architectural setup in S-El1 */
bl2_arch_setup();
/* Perform platform setup in BL1 */
bl2_platform_setup();
printf("BL2 %s\n\r", build_message);
/* Find out how much free trusted ram remains after BL2 load */
bl2_tzram_layout = bl2_plat_sec_mem_layout();
/*
* Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded.
* To avoid fragmentation of trusted SRAM memory, BL31 is always
* loaded opposite to BL2. This allows BL31 to reclaim BL2 memory
* while maintaining its free space in one contiguous chunk.
*/
bl2_load = bl2_tzram_layout->attr & LOAD_MASK;
assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD));
bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD;
bl31_base = load_image(bl2_tzram_layout, BL31_IMAGE_NAME,
bl31_load, BL31_BASE);
/* Assert if it has not been possible to load BL31 */
if (bl31_base == 0) {
ERROR("Failed to load BL3-1.\n");
panic();
}
/*
* Get a pointer to the memory the platform has set aside to pass
* information to BL31.
*/
bl2_to_bl31_args = bl2_get_bl31_args_ptr();
/*
* Load the BL32 image if there's one. It is upto to platform
* to specify where BL32 should be loaded if it exists. It
* could create space in the secure sram or point to a
* completely different memory. A zero size indicates that the
* platform does not want to load a BL32 image.
*/
if (bl2_to_bl31_args->bl32_meminfo.total_size)
bl32_base = load_image(&bl2_to_bl31_args->bl32_meminfo,
BL32_IMAGE_NAME,
bl2_to_bl31_args->bl32_meminfo.attr &
LOAD_MASK,
BL32_BASE);
/*
* Create a new layout of memory for BL31 as seen by BL2. This
* will gobble up all the BL2 memory.
*/
init_bl31_mem_layout(bl2_tzram_layout,
&bl2_to_bl31_args->bl31_meminfo,
bl31_load);
/* Load the BL33 image in non-secure memory provided by the platform */
bl33_base = load_image(&bl2_to_bl31_args->bl33_meminfo,
BL33_IMAGE_NAME,
BOT_LOAD,
plat_get_ns_image_entrypoint());
/* Halt if failed to load normal world firmware. */
if (bl33_base == 0) {
ERROR("Failed to load BL3-3.\n");
panic();
}
/*
* BL2 also needs to tell BL31 where the non-trusted software image
* is located.
*/
bl2_to_bl31_args->bl33_image_info.entrypoint = bl33_base;
/* Figure out what mode we enter the non-secure world in */
el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
el_status &= ID_AA64PFR0_ELX_MASK;
if (el_status)
mode = MODE_EL2;
else
mode = MODE_EL1;
/*
* TODO: Consider the possibility of specifying the SPSR in
* the FIP ToC and allowing the platform to have a say as
* well.
*/
bl2_to_bl31_args->bl33_image_info.spsr =
make_spsr(mode, MODE_SP_ELX, MODE_RW_64);
bl2_to_bl31_args->bl33_image_info.security_state = NON_SECURE;
if (bl32_base) {
/* Fill BL32 image info */
bl2_to_bl31_args->bl32_image_info.entrypoint = bl32_base;
bl2_to_bl31_args->bl32_image_info.security_state = SECURE;
/*
* The Secure Payload Dispatcher service is responsible for
* setting the SPSR prior to entry into the BL32 image.
*/
bl2_to_bl31_args->bl32_image_info.spsr = 0;
}
/* Flush the entire BL31 args buffer */
flush_dcache_range((unsigned long) bl2_to_bl31_args,
sizeof(*bl2_to_bl31_args));
/*
* Run BL31 via an SMC to BL1. Information on how to pass control to
* the BL32 (if present) and BL33 software images will be passed to
* BL31 as an argument.
*/
run_image(bl31_base,
make_spsr(MODE_EL3, MODE_SP_ELX, MODE_RW_64),
SECURE,
(void *) bl2_to_bl31_args,
NULL);
}
int
main(int argc, char **argv)
{
init_image();
int n;
n = 0;
OPCODE(VM_LIT16);
OPCODE(0xFFFF);
OPCODE(VM_DUP);
OPCODE(VM_NOP);
OPCODE(VM_LIT32);
OPCODE(0xFFFE);
OPCODE(0xFFFD);
OPCODE(VM_DROP);
OPCODE(VM_LIT16);
OPCODE(0x1209);
OPCODE(VM_SWAP);
OPCODE(VM_DEBUG_NOP);
OPCODE(VM_PUSH);
OPCODE(VM_POP);
OPCODE(VM_LIT16);
OPCODE(2);
OPCODE(VM_NOP);
OPCODE(VM_LOOP);
OPCODE(17);
OPCODE(VM_LIT16);
OPCODE(24);
OPCODE(VM_PUSH);
OPCODE(VM_DEBUG_NOP);
OPCODE(VM_JUMP);
OPCODE(0x100);
OPCODE(VM_LIT16);
OPCODE(0x1103);
OPCODE(VM_LIT16);
OPCODE(0x1100);
OPCODE(VM_GT_JUMP);
OPCODE(0x200);
OPCODE(VM_HALT);
n = 0x100;
OPCODE(VM_DEBUG_NOP);
OPCODE(VM_LIT16);
OPCODE(0x0529);
OPCODE(VM_RETURN);
n = 0x200;
OPCODE(VM_LIT16);
OPCODE(0x0817);
OPCODE(VM_LIT16);
OPCODE(0x0818);
OPCODE(VM_GT_JUMP);
OPCODE(0x200);
OPCODE(VM_LIT16);
OPCODE(0x0817);
OPCODE(VM_LIT16);
OPCODE(0x0818);
OPCODE(VM_LT_JUMP);
OPCODE(0x300);
OPCODE(VM_HALT);
n = 0x300;
OPCODE(VM_LIT16);
OPCODE(0x0817);
OPCODE(VM_LIT16);
OPCODE(0x0816);
OPCODE(VM_LT_JUMP);
OPCODE(0x300);
OPCODE(VM_LIT16);
OPCODE(0x0817);
OPCODE(VM_LIT16);
OPCODE(VM_LIT16);
OPCODE(VM_LIT16);
OPCODE(0x0500);
OPCODE(VM_STORE);
OPCODE(VM_LIT16);
OPCODE(0x1234);
OPCODE(VM_LIT16);
OPCODE(0x0501);
OPCODE(VM_STORE);
OPCODE(VM_JUMP);
OPCODE(0x500);
OPCODE(VM_HALT);
n = 0x502;
OPCODE(VM_LIT16);
OPCODE(4);
OPCODE(VM_LIT32);
OPCODE(0xFFFC);
OPCODE(5);
OPCODE(VM_ADD);
OPCODE(VM_LIT32);
OPCODE(0xFFFC);
OPCODE(5);
OPCODE(VM_SUB);
OPCODE(VM_CALL_FLAG | 0x600);
OPCODE(VM_LIT16);
OPCODE(0x1111);
OPCODE(VM_LIT14_FLAG | 0x777);
OPCODE(VM_DUP);
OPCODE(VM_DUP);
/*
OPCODE(VM_ADD13_FLAG | 0x1111);
OPCODE(VM_SWAP);
OPCODE(VM_SHL12_FLAG | 0x0004);
*/
OPCODE(VM_LIT14_FLAG | 0x3FFF);
OPCODE(VM_HALT);
n = 0x600;
OPCODE(VM_LIT16);
OPCODE(0x2222);
OPCODE(VM_ZERO_EXIT);
OPCODE(VM_LIT16);
OPCODE(0x3333);
OPCODE(VM_LIT16);
OPCODE(0x1);
OPCODE(VM_ZERO_EXIT);
OPCODE(VM_LIT16);
OPCODE(0x4444);
OPCODE(VM_RETURN);
run_image();
}
