static void __init origen_machine_init(void)
{
origen_power_init();
s3c_i2c0_set_platdata(NULL);
i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
/*
* Since sdhci instance 2 can contain a bootable media,
* sdhci instance 0 is registered after instance 2.
*/
s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
origen_ehci_init();
origen_ohci_init();
clk_xusbxti.rate = 24000000;
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_fimd0_set_platdata(&origen_lcd_pdata);
platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
origen_bt_setup();
}
void s3c_sdhci_set_platdata(void)
{
s3c_sdhci0_set_platdata(&hsmmc0_platdata);
#if defined(CONFIG_S5PC110_SD_CH2_8BIT)
s3c_sdhci2_set_platdata(&hsmmc2_platdata);
#endif
};
static void __init smdkv310_machine_init(void)
{
s3c_i2c1_set_platdata(NULL);
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
smdkv310_smsc911x_init();
s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
samsung_keypad_set_platdata(&smdkv310_keypad_data);
samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
#ifdef CONFIG_DRM_EXYNOS
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
exynos4_fimd0_gpio_setup_24bpp();
#else
s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
#endif
smdkv310_ehci_init();
smdkv310_ohci_init();
clk_xusbxti.rate = 24000000;
platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
}
static void __init smdkv310_machine_init(void)
{
s3c_i2c1_set_platdata(NULL);
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
smdkv310_smsc911x_init();
s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
samsung_keypad_set_platdata(&smdkv310_keypad_data);
samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
smdkv310_ehci_init();
smdkv310_ohci_init();
clk_xusbxti.rate = 24000000;
platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
}
void s3c_sdhci_set_platdata(void)
{
#if defined(CONFIG_S3C_DEV_HSMMC)
s3c_sdhci0_set_platdata(&hsmmc0_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC1)
if (machine_is_aries())
hsmmc1_platdata.built_in = 1;
s3c_sdhci1_set_platdata(&hsmmc1_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC2)
if (machine_is_herring()) {
hsmmc2_platdata.ext_cd = IRQ_EINT(28);
hsmmc2_platdata.cfg_ext_cd = universal_sdhci2_cfg_ext_cd;
hsmmc2_platdata.detect_ext_cd = universal_sdhci2_detect_ext_cd;
}
if (machine_is_aries()) {
hsmmc2_platdata.ext_cd = IRQ_EINT(28);
hsmmc2_platdata.cfg_ext_cd = universal_sdhci2_cfg_ext_cd;
hsmmc2_platdata.detect_ext_cd = universal_sdhci2_detect_ext_cd;
}
s3c_sdhci2_set_platdata(&hsmmc2_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC3)
if (machine_is_herring())
hsmmc3_platdata.built_in = 1;
s3c_sdhci3_set_platdata(&hsmmc3_platdata);
if (machine_is_aries())
hsmmc3_platdata.built_in = 1;
s3c_sdhci3_set_platdata(&hsmmc3_platdata);
#endif
};
static void __init smdk6410_machine_init(void)
{
u32 cs1;
s3c_i2c0_set_platdata(NULL);
// s3c_i2c1_set_platdata(NULL);
s3c_fb_set_platdata(&smdk6410_lcd_pdata);
//jkeqiang
s3c_nand_set_platdata(&ok6410_nand_info);
s3c_sdhci0_set_platdata(&ok6410_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&ok6410_hsmmc1_pdata);
samsung_keypad_set_platdata(&smdk6410_keypad_data);
// s3c24xx_ts_set_platdata(&s3c_ts_platform);
s3c_ts_set_platdata(&s3c_ts_platform);
s3c64xx_ac97_setup_gpio(0);
/* configure nCS1 width to 16 bits */
cs1 = __raw_readl(S3C64XX_SROM_BW) &
~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
S3C64XX_SROM_BW__NCS1__SHIFT;
__raw_writel(cs1, S3C64XX_SROM_BW);
/* set timing for nCS1 suitable for ethernet chip */
__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
(6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
(0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
//gpio_request(S3C64XX_GPN(5), "LCD power");
//gpio_request(S3C64XX_GPF(13), "LCD power");
//gpio_request(S3C64XX_GPF(15), "LCD power");
i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
s3c_ide_set_platdata(&smdk6410_ide_pdata);
#ifdef CONFIG_S3C64XX_DEV_FIMC0
s3c_fimc0_set_platdata(NULL);
#endif
#ifdef CONFIG_S3C64XX_DEV_FIMC1
s3c_fimc1_set_platdata(NULL);
#endif
platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
}
static void aquila_setup_sdhci(void)
{
gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN");
s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
};
void s3c_sdhci_set_platdata(void)
{
#if defined(CONFIG_S3C_DEV_HSMMC)
s3c_sdhci0_set_platdata(&hsmmc0_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC2)
s3c_sdhci2_set_platdata(&hsmmc2_platdata);
#endif
};
static void aquila_setup_sdhci(void)
{
gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN");
gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
};
void s3c_sdhci_set_platdata(void)
{
s3c_sdhci0_set_platdata(&hsmmc0_platdata);
//#if !defined(CONFIG_S5PV210_SD_CH1_8BIT)
s3c_sdhci1_set_platdata(&hsmmc1_platdata);
//#endif
#if defined(CONFIG_S5PV210_SD_CH2_8BIT)
s3c_sdhci2_set_platdata(&hsmmc2_platdata);
#endif
s3c_sdhci3_set_platdata(&hsmmc3_platdata);
};
static void __init smdkc210_machine_init(void)
{
smdkc210_smsc911x_init();
s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
}
void s3c_sdhci_set_platdata(void)
{
#if defined(CONFIG_S3C_DEV_HSMMC)
if (machine_is_herring() || machine_is_aries() || machine_is_venturi()) { /* TODO: move to mach-herring.c */
hsmmc0_platdata.cd_type = S3C_SDHCI_CD_PERMANENT;
}
s3c_sdhci0_set_platdata(&hsmmc0_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC1)
if (machine_is_aries()) {
hsmmc1_platdata.cd_type = S3C_SDHCI_CD_EXTERNAL;
hsmmc1_platdata.ext_cd_init = ext_cd_init_hsmmc1;
hsmmc1_platdata.ext_cd_cleanup = ext_cd_cleanup_hsmmc1;
hsmmc1_platdata.built_in = 1;
}
s3c_sdhci1_set_platdata(&hsmmc1_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC2)
if (machine_is_herring()) {
if (herring_is_cdma_wimax_dev()) {
hsmmc2_platdata.cd_type = S3C_SDHCI_CD_EXTERNAL;
hsmmc2_platdata.ext_cd_init = ext_cd_init_hsmmc2;
hsmmc2_platdata.ext_cd_cleanup = ext_cd_cleanup_hsmmc2;
hsmmc2_platdata.built_in = 1;
hsmmc2_platdata.must_maintain_clock = 1;
hsmmc2_platdata.enable_intr_on_resume = 1;
} else {
hsmmc2_platdata.cd_type = S3C_SDHCI_CD_GPIO;
hsmmc2_platdata.ext_cd_gpio = S5PV210_GPH3(4);
hsmmc2_platdata.ext_cd_gpio_invert = true;
universal_sdhci2_cfg_ext_cd();
}
}
if (machine_is_aries() || machine_is_venturi()) {
hsmmc2_platdata.cd_type = S3C_SDHCI_CD_GPIO;
hsmmc2_platdata.ext_cd_gpio = S5PV210_GPH3(4);
hsmmc2_platdata.ext_cd_gpio_invert = true;
universal_sdhci2_cfg_ext_cd();
}
s3c_sdhci2_set_platdata(&hsmmc2_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC3)
if (machine_is_herring() || machine_is_aries() || machine_is_venturi()) {
hsmmc3_platdata.cd_type = S3C_SDHCI_CD_EXTERNAL;
hsmmc3_platdata.ext_cd_init = ext_cd_init_hsmmc3;
hsmmc3_platdata.ext_cd_cleanup = ext_cd_cleanup_hsmmc3;
hsmmc3_platdata.built_in = 1;
}
s3c_sdhci3_set_platdata(&hsmmc3_platdata);
#endif
};
static void __init smdkc210_machine_init(void)
{
s3c_i2c1_set_platdata(NULL);
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
smdkc210_smsc911x_init();
s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
}
void s3c_sdhci_set_platdata(void)
{
#if defined(CONFIG_S3C_DEV_HSMMC)
s3c_sdhci0_set_platdata(&hsmmc0_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC2)
hsmmc2_platdata.ext_cd = IRQ_EINT(28);
hsmmc2_platdata.cfg_ext_cd = universal_sdhci2_cfg_ext_cd;
hsmmc2_platdata.detect_ext_cd = universal_sdhci2_detect_ext_cd;
s3c_sdhci2_set_platdata(&hsmmc2_platdata);
#endif
#if defined(CONFIG_S3C_DEV_HSMMC3)
hsmmc3_platdata.built_in = 1;
s3c_sdhci3_set_platdata(&hsmmc3_platdata);
#endif
};
void s3c_sdhci_set_platdata(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC
#if defined (CONFIG_TARGET_LOCALE_EUR) || defined(CONFIG_TARGET_LOCALE_HKTW) || defined (CONFIG_TARGET_LOCALE_HKTW_FET) || defined(CONFIG_TARGET_LOCALE_VZW) || defined(CONFIG_TARGET_LOCALE_USAGSM)
if (HWREV < 12)
#elif CONFIG_TARGET_LOCALE_KOR
if (HWREV < 10 || HWREV == 17)
#endif /* CONFIG_TARGET_LOCALE */
{
hsmmc0_platdata.max_width = 4,
hsmmc0_platdata.host_caps &= ~MMC_CAP_8_BIT_DATA;
}
s3c_sdhci0_set_platdata(&hsmmc0_platdata);
#endif /* CONFIG_S3C_DEV_HSMMC */
#ifdef CONFIG_S3C_DEV_HSMMC2
s3c_sdhci2_set_platdata(&hsmmc2_platdata);
#endif /* CONFIG_S3C_DEV_HSMMC2 */
};
static void __init crag6410_machine_init(void)
{
/* Open drain IRQs need pullups */
s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
gpio_request(S3C64XX_GPB(0), "LCD power");
gpio_direction_output(S3C64XX_GPB(0), 0);
gpio_request(S3C64XX_GPF(14), "LCD PWM");
gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
gpio_request(S3C64XX_GPB(1), "SD power");
gpio_direction_output(S3C64XX_GPB(1), 0);
gpio_request(S3C64XX_GPF(10), "nRESETSEL");
gpio_direction_output(S3C64XX_GPF(10), 1);
s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
s3c_i2c0_set_platdata(&i2c0_pdata);
s3c_i2c1_set_platdata(&i2c1_pdata);
s3c_fb_set_platdata(&crag6410_lcd_pdata);
dwc2_hsotg_set_platdata(&crag6410_hsotg_pdata);
i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
samsung_keypad_set_platdata(&crag6410_keypad_data);
s3c64xx_spi0_set_platdata(NULL, 0, 2);
pwm_add_table(crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup));
platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
gpio_led_register_device(-1, &gpio_leds_pdata);
regulator_has_full_constraints();
s3c64xx_pm_init();
}
static void __init jet_machine_init(void)
{
s3c_pm_init();
s3c_init_gpio(jet_gpio_table, ARRAY_SIZE(jet_gpio_table));
/* Register I2C devices */
s3c_i2c0_set_platdata(&jet_misc_i2c);
i2c_register_board_info(jet_misc_i2c.bus_num, jet_misc_i2c_devs,
ARRAY_SIZE(jet_misc_i2c_devs));
s3c_i2c1_set_platdata(&jet_cam_i2c);
i2c_register_board_info(jet_cam_i2c.bus_num, jet_cam_i2c_devs,
ARRAY_SIZE(jet_cam_i2c_devs));
i2c_register_board_info(jet_pmic_i2c.id, jet_pmic_i2c_devs,
ARRAY_SIZE(jet_pmic_i2c_devs));
i2c_register_board_info(jet_audio_i2c.id, jet_audio_i2c_devs,
ARRAY_SIZE(jet_audio_i2c_devs));
i2c_register_board_info(jet_touch_i2c.id, jet_touch_i2c_devs,
ARRAY_SIZE(jet_touch_i2c_devs));
s3c_fb_set_platdata(&jet_lcd_pdata);
s3c_sdhci0_set_platdata(&jet_hsmmc0_pdata);
s3c_sdhci2_set_platdata(&jet_hsmmc2_pdata);
samsung_keypad_set_platdata(&jet_keypad_pdata);
s3c_set_platdata(&jet_onenand_pdata, sizeof(jet_onenand_pdata),
&s3c_device_onenand);
/* Register platform devices */
platform_add_devices(jet_devices, ARRAY_SIZE(jet_devices));
platform_add_devices(jet_mod_devices, ARRAY_SIZE(jet_mod_devices));
#ifdef CONFIG_ANDROID_PMEM
/* Register PMEM devices */
jet_add_mem_devices();
#endif
regulator_has_full_constraints();
}
static void __init smdk6440_machine_init(void)
{
s3c24xx_ts_set_platdata(NULL);
s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
i2c_register_board_info(0, smdk6440_i2c_devs0,
ARRAY_SIZE(smdk6440_i2c_devs0));
i2c_register_board_info(1, smdk6440_i2c_devs1,
ARRAY_SIZE(smdk6440_i2c_devs1));
s5p6440_set_lcd_interface();
s3c_fb_set_platdata(&smdk6440_lcd_pdata);
s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata);
s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
}
static void __init smdk2416_machine_init(void)
{
s3c_i2c0_set_platdata(NULL);
s3c_fb_set_platdata(&smdk2416_fb_platdata);
s3c_sdhci0_set_platdata(&smdk2416_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&smdk2416_hsmmc1_pdata);
s3c24xx_hsudc_set_platdata(&smdk2416_hsudc_platdata);
gpio_request(S3C2410_GPB(4), "USBHost Power");
gpio_direction_output(S3C2410_GPB(4), 1);
gpio_request(S3C2410_GPB(3), "Display Power");
gpio_direction_output(S3C2410_GPB(3), 1);
gpio_request(S3C2410_GPB(1), "Display Reset");
gpio_direction_output(S3C2410_GPB(1), 1);
platform_add_devices(smdk2416_devices, ARRAY_SIZE(smdk2416_devices));
smdk_machine_init();
}
static void __init origen_machine_init(void)
{
origen_power_init();
s3c_i2c0_set_platdata(NULL);
i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
/*
* Since sdhci instance 2 can contain a bootable media,
* sdhci instance 0 is registered after instance 2.
*/
s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
origen_ehci_init();
origen_ohci_init();
s3c_hsotg_set_platdata(&origen_hsotg_pdata);
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
#ifdef CONFIG_DRM_EXYNOS_FIMD
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
exynos4_fimd0_gpio_setup_24bpp();
#else
s5p_fimd0_set_platdata(&origen_lcd_pdata);
#endif
platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup));
samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
origen_bt_setup();
}
static void __init mini210_machine_init(void)
{
arm_pm_restart = smdkc110_pm_restart;
s3c_pm_init();
mini210_wifi_init();
#ifdef CONFIG_DM9000
mini210_dm9000_init();
#endif
platform_add_devices(mini210_devices, ARRAY_SIZE(mini210_devices));
#ifdef CONFIG_ANDROID_PMEM
android_pmem_set_platdata();
#endif
#ifdef CONFIG_KEYBOARD_SAMSUNG
samsung_keypad_set_platdata(&mini210_keypad_data);
#endif
#ifdef CONFIG_TOUCHSCREEN_S3C2410
s3c24xx_ts_set_platdata(&s3c_ts_platform);
#endif
s3c_i2c0_set_platdata(NULL);
s3c_i2c1_set_platdata(NULL);
#ifdef CONFIG_TOUCHSCREEN_GOODIX
if (mini210_get_ctp() == CTP_GT80X) {
i2c2_data.frequency = 260*1000;
}
#endif
s3c_i2c2_set_platdata(&i2c2_data);
i2c_register_board_info(0, mini210_i2c_devs0,
ARRAY_SIZE(mini210_i2c_devs0));
i2c_register_board_info(1, mini210_i2c_devs1,
ARRAY_SIZE(mini210_i2c_devs1));
i2c_register_board_info(2, mini210_i2c_devs2,
ARRAY_SIZE(mini210_i2c_devs2));
#ifdef CONFIG_TOUCHSCREEN_EGALAX
i2c_register_board_info(5, i2c_devs5, ARRAY_SIZE(i2c_devs5));
#endif
#ifdef CONFIG_S5PV210_SETUP_IDE
s3c_ide_set_platdata(&mini210_ide_pdata);
#endif
#ifdef CONFIG_FB_S3C_MINI210
{
struct s3cfb_lcd *mlcd = mini210_get_lcd();
if (!(mlcd->args & 0x0f)) {
if (readl(S5PV210_GPF0_BASE + 0x184) & 0x10)
mlcd->args |= (1 << 7);
}
mini210_fb_data.lcd = mlcd;
s3c_fb_set_platdata(&mini210_fb_data);
}
#endif
#ifdef CONFIG_S3C_DEV_HSMMC
s3c_sdhci0_set_platdata(&mini210_hsmmc0_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC1
s3c_sdhci1_set_platdata(&mini210_hsmmc1_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC2
s3c_sdhci2_set_platdata(&mini210_hsmmc2_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC3
s3c_sdhci3_set_platdata(&mini210_hsmmc3_pdata);
#endif
#ifdef CONFIG_VIDEO_FIMC
/* fimc */
s3c_fimc0_set_platdata(&fimc_plat_lsi);
s3c_fimc1_set_platdata(&fimc_plat_lsi);
s3c_fimc2_set_platdata(&fimc_plat_lsi);
#ifdef CONFIG_VIDEO_S5K4BA
#ifdef CAM_ITU_CH_A
smdkv210_cam0_power(1);
#else
smdkv210_cam1_power(1);
#endif
#endif
#endif
#ifdef CONFIG_VIDEO_FIMC_MIPI
s3c_csis_set_platdata(NULL);
#endif
#ifdef CONFIG_VIDEO_JPEG_V2
s3c_jpeg_set_platdata(&jpeg_plat);
#endif
#ifdef CONFIG_VIDEO_MFC50
/* mfc */
s3c_mfc_set_platdata(NULL);
#endif
/* spi */
#ifdef CONFIG_SPI_S3C64XX
if (!gpio_request(S5PV210_GPB(1), "SPI_CS0")) {
gpio_direction_output(S5PV210_GPB(1), 1);
s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(1));
s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
s5pv210_spi_set_info(0, S5PV210_SPI_SRCCLK_PCLK,
ARRAY_SIZE(smdk_spi0_csi));
}
if (!gpio_request(S5PV210_GPB(5), "SPI_CS1")) {
gpio_direction_output(S5PV210_GPB(5), 1);
s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(1));
s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
s5pv210_spi_set_info(1, S5PV210_SPI_SRCCLK_PCLK,
ARRAY_SIZE(smdk_spi1_csi));
}
spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs));
#endif
mini210_otg_init();
mini210_ehci_init();
mini210_ohci_init();
clk_xusbxti.rate = 24000000;
regulator_has_full_constraints();
mini210_setup_clocks();
/* write something into the INFORM6 register that we can use to
* differentiate an unclear reboot from a clean reboot (which
* writes a small integer code to INFORM6).
*/
__raw_writel(0xee, S5P_INFORM6);
}
static void __init smdk4210_machine_init(void)
{
c1_config_gpio_table();
c1_config_sleep_gpio_table();
s3c_pm_init();
s3c_gpio_cfgpin(GPIO_WLAN_EN, S3C_GPIO_OUTPUT);
s3c_gpio_setpull(GPIO_WLAN_EN, S3C_GPIO_PULL_NONE);
exynos4_pd_enable(&exynos4_device_pd[PD_MFC].dev);
exynos4_pd_enable(&exynos4_device_pd[PD_G3D].dev);
exynos4_pd_enable(&exynos4_device_pd[PD_LCD0].dev);
exynos4_pd_enable(&exynos4_device_pd[PD_LCD1].dev);
exynos4_pd_enable(&exynos4_device_pd[PD_CAM].dev);
exynos4_pd_enable(&exynos4_device_pd[PD_TV].dev);
/* SROMC Setup */
/* TODO: Move me to a separate function */
/*u32 tmp;
tmp = __raw_readl(S5P_SROM_BW);
tmp &= ~(0xffff);
tmp |= (0x9999);
__raw_writel(tmp, S5P_SROM_BW);
__raw_writel(0xff1ffff1, S5P_SROM_BC1);
tmp = __raw_readl(S5P_VA_GPIO + 0x120);
tmp &= ~(0xffffff);
tmp |= (0x221121);
__raw_writel(tmp, (S5P_VA_GPIO + 0x120));
__raw_writel(0x22222222, (S5P_VA_GPIO + 0x180));
__raw_writel(0x22222222, (S5P_VA_GPIO + 0x1a0));
__raw_writel(0x22222222, (S5P_VA_GPIO + 0x1c0));
__raw_writel(0x22222222, (S5P_VA_GPIO + 0x1e0)); */
/* MMC Card init */
s3c_gpio_cfgpin(GPIO_MASSMEM_EN, S3C_GPIO_OUTPUT);
gpio_set_value(GPIO_MASSMEM_EN, GPIO_MASSMEM_EN_LEVEL);
/* 400 kHz for initialization of MMC Card */
__raw_writel((__raw_readl(S5P_CLKDIV_FSYS3) & 0xfffffff0)
| 0x9, S5P_CLKDIV_FSYS3);
__raw_writel((__raw_readl(S5P_CLKDIV_FSYS2) & 0xfff0fff0)
| 0x80008, S5P_CLKDIV_FSYS2);
__raw_writel((__raw_readl(S5P_CLKDIV_FSYS1) & 0xfff0fff0)
| 0x90009, S5P_CLKDIV_FSYS1);
/* PLATDATA init */
s3c_i2c0_set_platdata(NULL);
/*i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0))*/
s3c_i2c1_set_platdata(NULL);
/*i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));*/
smdk4210_init_tsp();
s3c_i2c3_set_platdata(&i2c3_data);
i2c_register_board_info(3, i2c_devs3, ARRAY_SIZE(i2c_devs3)); /* TSP */
smdk4210_init_pmic();
s3c_i2c5_set_platdata(NULL);
i2c_register_board_info(5, i2c_devs5, ARRAY_SIZE(i2c_devs5));
s3c_i2c6_set_platdata(NULL);
//i2c_register_board_info(6, i2c_devs6, ARRAY_SIZE(i2c_devs6));
/*s3c_i2c7_set_platdata(NULL); TVOUT
i2c_register_board_info(7, i2c_devs7, ARRAY_SIZE(i2c_devs7));*/
smdk4210_init_touchkey();
i2c_register_board_info(9, i2c_gpio_gauge_devs, ARRAY_SIZE(i2c_gpio_gauge_devs));
s3cfb_set_platdata(NULL);
s3c_device_fb.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
s3c_sdhci2_set_platdata(&smdk4210_hsmmc2_pdata);
s3c_sdhci0_set_platdata(&smdk4210_hsmmc0_pdata);
s3c_sdhci3_set_platdata(&smdk4210_hsmmc3_pdata);
s3c_mshci_set_platdata(&smdk4210_mshc_pdata);
s5p_fimg2d_set_platdata(&fimg2d_data);
s5p_device_fimg2d.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
/* fimc */
s3c_fimc0_set_platdata(&fimc_plat);
s3c_fimc1_set_platdata(&fimc_plat);
s3c_fimc2_set_platdata(&fimc_plat);
#if 0 /* TVOUT - Will nebkat hax? */
s5p_hdmi_hpd_set_platdata(&hdmi_hpd_data);
s5p_hdmi_cec_set_platdata(&hdmi_cec_data);
s5p_device_tvout.dev.parent = &exynos4_device_pd[PD_TV].dev;
#endif
smdk4210_otg_init();
smdk4210_ohci_init();
clk_xusbxti.rate = 24000000;
smdk4210_init_battery_gauge();
smdk4210_ehci_init();
platform_add_devices(smdk4210_devices, ARRAY_SIZE(smdk4210_devices));
samsung_bl_set(&smdk4210_bl_gpio_info, &smdk4210_bl_data);
/*smdk4210_bt_setup();*/
}
static void __init universal_sdhci_init(void)
{
s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
}
static void __init smdkc110_machine_init(void)
{
struct clk *arm_clk;
arm_clk = clk_get(NULL, "fclk");
if (arm_clk == NULL) {
memcpy(&max8698_platform_default_data, &max8698_platform_data_1,
sizeof(struct max8698_platform_data));
printk(KERN_ERR "get fclk clock failed\n");
} else {
printk(KERN_INFO "arm_clk = %lu\n", arm_clk->rate);
switch (arm_clk->rate) {
case 800*1000*1000:
memcpy(&max8698_platform_default_data,
&max8698_platform_data_0,
sizeof(struct max8698_platform_data));
break;
case 1000*1000*1000:
memcpy(&max8698_platform_default_data,
&max8698_platform_data_1,
sizeof(struct max8698_platform_data));
break;
default:
printk(KERN_ERR "Set to default voltage value\n");
memcpy(&max8698_platform_default_data,
&max8698_platform_data_1,
sizeof(struct max8698_platform_data));
break;
}
clk_put(arm_clk);
}
#ifdef CONFIG_DM9000
smdkv210_dm9000_set();
#endif
s3c_pm_init();
s3c_i2c0_set_platdata(NULL);
s3c_i2c1_set_platdata(NULL);
s3c_i2c2_set_platdata(NULL);
i2c_register_board_info(0, smdkc110_i2c_devs0,
ARRAY_SIZE(smdkc110_i2c_devs0));
i2c_register_board_info(1, smdkc110_i2c_devs1,
ARRAY_SIZE(smdkc110_i2c_devs1));
i2c_register_board_info(2, smdkc110_i2c_devs2,
ARRAY_SIZE(smdkc110_i2c_devs2));
s3c_ide_set_platdata(&smdkc110_ide_pdata);
#ifdef CONFIG_S3C64XX_DEV_SPI
if (!gpio_request(S5PV210_GPB(1), "SPI_CS0")) {
gpio_direction_output(S5PV210_GPB(1), 1);
s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(1));
s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
s5pv210_spi_set_info(0, S5PV210_SPI_SRCCLK_PCLK,
ARRAY_SIZE(smdk_spi0_csi));
}
if (!gpio_request(S5PV210_GPB(5), "SPI_CS1")) {
gpio_direction_output(S5PV210_GPB(5), 1);
s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(1));
s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
s5pv210_spi_set_info(1, S5PV210_SPI_SRCCLK_PCLK,
ARRAY_SIZE(smdk_spi1_csi));
}
spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs));
#endif
#ifdef CONFIG_S3C_DEV_HSMMC
s3c_sdhci0_set_platdata(&smdkc110_hsmmc0_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC1
s3c_sdhci1_set_platdata(&smdkc110_hsmmc1_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC2
s3c_sdhci2_set_platdata(&smdkc110_hsmmc2_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC3
s3c_sdhci3_set_platdata(&smdkc110_hsmmc3_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HWMON
s3c_hwmon_set_platdata(&smdkc110_hwmon_pdata);
#endif
#ifdef CONFIG_TOUCHSCREEN_S3C2410
#ifdef CONFIG_S3C_DEV_ADC
s3c24xx_ts_set_platdata(&s3c_ts_platform);
#endif
#ifdef CONFIG_S3C_DEV_ADC1
s3c24xx_ts1_set_platdata(&s3c_ts_platform);
#endif
#endif
#if defined(CONFIG_VIDEO_TV20) || defined(CONFIG_VIDEO_TVOUT)
s5p_hdmi_hpd_set_platdata(&hdmi_hpd_data);
s5p_hdmi_cec_set_platdata(&hdmi_cec_data);
#endif
platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
}
static void __init mini6410_machine_init(void)
{
u32 cs1;
s3c_i2c0_set_platdata(NULL);
#ifdef CONFIG_S3C_DEV_I2C1
s3c_i2c1_set_platdata(NULL);
#endif
s3c_fb_set_platdata(&mini6410_lcd_pdata);
#ifdef CONFIG_SAMSUNG_DEV_TS
s3c24xx_ts_set_platdata(&s3c_ts_platform);
#endif
#ifdef CONFIG_TOUCHSCREEN_MINI6410
s3c_ts_set_platdata(&s3c_ts_platform);
#endif
s3c_sdhci0_set_platdata(&mini6410_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
#ifdef CONFIG_MTD_NAND_S3C
s3c_device_nand.name = "s3c6410-nand";
#endif
s3c_nand_set_platdata(&mini6410_nand_info);
s3c64xx_ac97_setup_gpio(0);
/* configure nCS1 width to 16 bits */
cs1 = __raw_readl(S3C64XX_SROM_BW) &
~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
S3C64XX_SROM_BW__NCS1__SHIFT;
__raw_writel(cs1, S3C64XX_SROM_BW);
/* set timing for nCS1 suitable for ethernet chip */
__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
(6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
(0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
gpio_request(S3C64XX_GPN(5), "LCD power");
gpio_request(S3C64XX_GPF(13), "LCD power");
gpio_request(S3C64XX_GPF(15), "LCD power");
if (ARRAY_SIZE(i2c_devs0)) {
i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
}
if (ARRAY_SIZE(i2c_devs1)) {
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
}
#ifdef CONFIG_S3C64XX_DEV_FIMC0
s3c_fimc0_set_platdata(NULL);
#endif
#ifdef CONFIG_S3C64XX_DEV_FIMC1
s3c_fimc1_set_platdata(NULL);
#endif
platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices));
platform_device_register_simple("GPIODEV", 0, &gpiodev_resource, 1); //GPIO resource MAP
if ((platform_device_register(&mini6410_leds))!=0)
printk( "Failed to register LEDs.\n");
else
printk( "LEDs initialized.\n");
#ifdef CONFIG_VIDEO_SAMSUNG
create_proc_read_entry("videomem", 0, NULL, s3c_media_read_proc, NULL);
#endif
}
static void goni_setup_sdhci(void)
{
s3c_sdhci0_set_platdata(&goni_hsmmc0_data);
s3c_sdhci1_set_platdata(&goni_hsmmc1_data);
s3c_sdhci2_set_platdata(&goni_hsmmc2_data);
};
static void __init nuri_sdhci_init(void)
{
s3c_sdhci0_set_platdata(&nuri_hsmmc0_data);
s3c_sdhci2_set_platdata(&nuri_hsmmc2_data);
s3c_sdhci3_set_platdata(&nuri_hsmmc3_data);
}
static void __init armlex4210_sdhci_init(void)
{
s3c_sdhci0_set_platdata(&armlex4210_hsmmc0_pdata);
s3c_sdhci2_set_platdata(&armlex4210_hsmmc2_pdata);
s3c_sdhci3_set_platdata(&armlex4210_hsmmc3_pdata);
}
void smdk6440_setup_sdhci0 (void)
{
s3c_sdhci0_set_platdata(&s3c_hsmmc0_platdata);
}
static void __init smdk6410_machine_init(void)
{
u32 cs1;
s3c_i2c0_set_platdata(NULL);
//s3c_i2c1_set_platdata(NULL);
s3c_fb_set_platdata(&smdk6410_lcd_pdata);
s3c_nand_set_platdata(&ok6410_nand_info); // gjl
s3c_sdhci0_set_platdata(&ok6410_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&ok6410_hsmmc1_pdata);
samsung_keypad_set_platdata(&smdk6410_keypad_data);
// s3c24xx_ts_set_platdata(&s3c_ts_platform);
s3c_ts_set_platdata(&s3c_ts_platform);
s3c64xx_ac97_setup_gpio(0);
/* configure nCS1 width to 16 bits */
cs1 = __raw_readl(S3C64XX_SROM_BW) &
~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
S3C64XX_SROM_BW__NCS1__SHIFT;
__raw_writel(cs1, S3C64XX_SROM_BW);
/* set timing for nCS1 suitable for ethernet chip */
__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
(6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
(0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
//gpio_request(S3C64XX_GPN(5), "LCD power");
//gpio_request(S3C64XX_GPF(13), "LCD power");
i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
//s3c_ide_set_platdata(&smdk6410_ide_pdata);
#ifdef CONFIG_S3C64XX_DEV_FIMC0
s3c_fimc0_set_platdata(NULL);
#endif
#ifdef CONFIG_S3C64XX_DEV_FIMC1
s3c_fimc1_set_platdata(NULL);
#endif
s3c64xx_spi_set_info(0,0,3);
s3c64xx_spi_set_info(1,0,2);
//printk(KERN_INFO "SPI: Only Register Bus number 1, spidev for test\n");
spi_register_board_info(forlinx6410_mc251x_info,ARRAY_SIZE(forlinx6410_mc251x_info));
spi_register_board_info(spi_eeprom,ARRAY_SIZE(spi_eeprom));
samsung_keypad_set_platdata(&smdk6410_keypad_data);
platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
printk(KERN_INFO "Adding SPI infomation, Check SPI register v10\n");
printk(KERN_INFO "SPI: FPGA initialize....\n");
setup_spi_fpga();
}
