static void __init nuri_machine_init(void) { nuri_sdhci_init(); nuri_tsp_init(); nuri_power_init(); s3c_i2c0_set_platdata(&nuri_i2c0_platdata); i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); s3c_i2c3_set_platdata(&i2c3_data); i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); s3c_i2c5_set_platdata(NULL); i2c5_devs[I2C5_MAX8997].irq = gpio_to_irq(EXYNOS4_GPX0(7)); i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); i2c9_devs[I2C9_MAX17042].irq = gpio_to_irq(EXYNOS4_GPX2(3)); i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs)); s5p_fimd0_set_platdata(&nuri_fb_pdata); nuri_camera_init(); nuri_ehci_init(); clk_xusbxti.rate = 24000000; /* Last */ platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev; s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev; s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev; s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev; s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev; }
static void __init nuri_machine_init(void) { nuri_sdhci_init(); nuri_tsp_init(); nuri_power_init(); s3c_i2c0_set_platdata(&nuri_i2c0_platdata); i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); s3c_i2c3_set_platdata(&i2c3_data); i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); s3c_i2c5_set_platdata(NULL); i2c5_devs[I2C5_MAX8997].irq = gpio_to_irq(EXYNOS4_GPX0(7)); i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); i2c9_devs[I2C9_MAX17042].irq = gpio_to_irq(EXYNOS4_GPX2(3)); i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs)); s3c_i2c6_set_platdata(&nuri_i2c6_platdata); #ifdef CONFIG_DRM_EXYNOS s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; exynos4_fimd0_gpio_setup_24bpp(); #else s5p_fimd0_set_platdata(&nuri_fb_pdata); #endif nuri_camera_init(); nuri_ehci_init(); s3c_hsotg_set_platdata(&nuri_hsotg_pdata); /* Last */ platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); }
static void __init origen_machine_init(void) { origen_power_init(); s3c_i2c0_set_platdata(NULL); i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs)); /* * Since sdhci instance 2 can contain a bootable media, * sdhci instance 0 is registered after instance 2. */ s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); origen_ehci_init(); origen_ohci_init(); clk_xusbxti.rate = 24000000; s5p_tv_setup(); s5p_i2c_hdmiphy_set_platdata(NULL); s5p_fimd0_set_platdata(&origen_lcd_pdata); platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data); origen_bt_setup(); }
static void __init universal_machine_init(void) { universal_sdhci_init(); s5p_tv_setup(); s3c_i2c0_set_platdata(&universal_i2c0_platdata); i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); universal_tsp_init(); s3c_i2c3_set_platdata(NULL); i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); s3c_i2c5_set_platdata(NULL); s5p_i2c_hdmiphy_set_platdata(NULL); i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); s5p_fimd0_set_platdata(&universal_lcd_pdata); universal_touchkey_init(); i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, ARRAY_SIZE(i2c_gpio12_devs)); universal_camera_init(); /* Last */ platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); }
static void __init nuri_machine_init(void) { nuri_sdhci_init(); nuri_tsp_init(); nuri_power_init(); s3c_i2c0_set_platdata(&nuri_i2c0_platdata); i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); s3c_i2c3_set_platdata(&i2c3_data); i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); s3c_i2c5_set_platdata(NULL); i2c5_devs[I2C5_MAX8997].irq = gpio_to_irq(EXYNOS4_GPX0(7)); i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); i2c9_devs[I2C9_MAX17042].irq = gpio_to_irq(EXYNOS4_GPX2(3)); i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs)); s3c_i2c6_set_platdata(&nuri_i2c6_platdata); s5p_fimd0_set_platdata(&nuri_fb_pdata); nuri_camera_init(); nuri_ehci_init(); /* Last */ platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); }
static void __init smdkv310_machine_init(void) { s3c_i2c1_set_platdata(NULL); i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); smdkv310_smsc911x_init(); s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata); s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata); s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata); s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata); s5p_tv_setup(); s5p_i2c_hdmiphy_set_platdata(NULL); samsung_keypad_set_platdata(&smdkv310_keypad_data); samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); smdkv310_ehci_init(); smdkv310_ohci_init(); clk_xusbxti.rate = 24000000; platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); }
static void __init universal_machine_init(void) { universal_sdhci_init(); s5p_tv_setup(); s3c_i2c0_set_platdata(&universal_i2c0_platdata); i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); universal_tsp_init(); s3c_i2c3_set_platdata(NULL); i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); s3c_i2c5_set_platdata(NULL); s5p_i2c_hdmiphy_set_platdata(NULL); i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); #ifdef CONFIG_DRM_EXYNOS s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; exynos4_fimd0_gpio_setup_24bpp(); #else s5p_fimd0_set_platdata(&universal_lcd_pdata); #endif universal_touchkey_init(); i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, ARRAY_SIZE(i2c_gpio12_devs)); s3c_hsotg_set_platdata(&universal_hsotg_pdata); universal_camera_init(); /* Last */ platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); }
static void __init smdkv310_machine_init(void) { s3c_i2c1_set_platdata(NULL); i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); smdkv310_smsc911x_init(); s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata); s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata); s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata); s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata); s5p_tv_setup(); s5p_i2c_hdmiphy_set_platdata(NULL); samsung_keypad_set_platdata(&smdkv310_keypad_data); samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); #ifdef CONFIG_DRM_EXYNOS s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; exynos4_fimd0_gpio_setup_24bpp(); #else s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); #endif smdkv310_ehci_init(); smdkv310_ohci_init(); clk_xusbxti.rate = 24000000; platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); }
void __init exynos4_smdk4270_display_init(void) { struct resource *res; s5p_dsim0_set_platdata(&dsim_platform_data); s5p_fimd0_set_platdata(&smdk4270_lcd0_pdata); platform_add_devices(smdk4270_display_devices, ARRAY_SIZE(smdk4270_display_devices)); exynos4_fimd_setup_clock(&s5p_device_fimd0.dev, "sclk_fimd", "mout_mpll_user_top", 69 * MHZ); #if !defined(CONFIG_S5P_LCD_INIT) exynos5_keep_disp_clock(&s5p_device_fimd0.dev); #endif res = platform_get_resource(&s5p_device_fimd0, IORESOURCE_MEM, 1); if (res && bootloaderfb_start) { res->start = bootloaderfb_start; res->end = res->start + bootloaderfb_size - 1; pr_info("bootloader fb located at %8X-%8X\n", res->start, res->end); } else { pr_err("failed to find bootloader fb resource\n"); } }
void __init exynos5_m6x_display_init(void) { #if defined(CONFIG_FB_VIDEO_PSR) // For TE_VSYNC, GPIO initialization will be processed // in m6x_init_gpio_cfg of gpio-m6x.c after this step // This interrupt will be chained to 77 (gpio_RT group) int irq; irq = s5p_register_gpio_interrupt(MEIZU_LCD_TE); if (IS_ERR_VALUE(irq)){ pr_err("%s: Failed to configure GPJ1(7) \n", __func__); return; } #endif #ifdef CONFIG_FB_MIPI_DSIM #ifdef CONFIG_S5P_DEV_MIPI_DSIM0 s5p_dsim0_set_platdata(&dsim_platform_data); #else s5p_dsim1_set_platdata(&dsim_platform_data); #endif #endif #ifdef CONFIG_S5P_DP s5p_dp_set_platdata(&smdk5410_dp_data); #endif #ifdef CONFIG_S5P_DEV_FIMD0 s5p_fimd0_set_platdata(&m6x_lcd0_pdata); #else s5p_fimd1_set_platdata(&m6x_lcd1_pdata); #endif #if defined(CONFIG_BACKLIGHT_LM3695) || defined(CONFIG_BACKLIGHT_LM3630) lm3695_rt_init_res(); i2c_register_board_info(9, i2c_bl, ARRAY_SIZE(i2c_bl)); #endif #ifdef CONFIG_TPS65132 i2c_register_board_info(14, i2c_tps, ARRAY_SIZE(i2c_tps)); #endif platform_add_devices(m6x_display_devices, ARRAY_SIZE(m6x_display_devices)); #ifdef CONFIG_S5P_DP exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev, "sclk_fimd", "mout_mpll_bpll", 267 * MHZ); #endif #ifdef CONFIG_FB_MIPI_DSIM #if defined(CONFIG_S5P_DEV_FIMD0) exynos5_fimd0_setup_clock(&s5p_device_fimd0.dev, "sclk_fimd", "mout_mpll_bpll", 140 * MHZ); #else exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev, "sclk_fimd", "mout_mpll_bpll", 140 * MHZ); #endif #endif }
void __init exynos4_smdk4270_display_init(void) { s5p_dsim0_set_platdata(&dsim_platform_data); s5p_fimd0_set_platdata(&smdk4270_lcd0_pdata); platform_add_devices(smdk4270_display_devices, ARRAY_SIZE(smdk4270_display_devices)); exynos4_fimd_setup_clock(&s5p_device_fimd0.dev, "sclk_fimd", "mout_mpll_user_top", 200 * MHZ); }
static void __init smdkc210_machine_init(void) { s3c_i2c1_set_platdata(NULL); i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); smdkc210_smsc911x_init(); s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata); s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata); s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata); s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata); samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data); s5p_fimd0_set_platdata(&smdkc210_lcd0_pdata); platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices)); }
void __init exynos4_smdk4x12_display_init(void) { samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data); dev_set_name(&s5p_device_fimd0.dev, "s3cfb.0"); clk_add_alias("lcd", "exynos4-fb.0", "lcd", &s5p_device_fimd0.dev); clk_add_alias("sclk_fimd", "exynos4-fb.0", "sclk_fimd", \ &s5p_device_fimd0.dev); s5p_fb_setname(0, "exynos4-fb"); spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); s5p_fimd0_set_platdata(&smdk4x12_lcd0_pdata); platform_add_devices(smdk4x12_display_devices, \ ARRAY_SIZE(smdk4x12_display_devices)); exynos4_fimd_setup_clock(&s5p_device_fimd0.dev, "sclk_fimd", \ "mout_mpll_user", 800 * MHZ); }
void __init exynos4_smdk4270_display_init(void) { struct resource *res; unsigned int lcd_id = lcdtype & 0xF; /* REV.E change MIPI SPEED 500Mbps to 480Mbps for RF */ if (lcd_id < 7 ) { dsim_info.p = 3; dsim_info.m = 125; dsim_info.s = 1; } s5p_dsim0_set_platdata(&dsim_platform_data); s5p_fimd0_set_platdata(&smdk4270_lcd0_pdata); platform_add_devices(smdk4270_display_devices, ARRAY_SIZE(smdk4270_display_devices)); exynos4_fimd_setup_clock(&s5p_device_fimd0.dev, "sclk_fimd", "mout_mpll_user_top", 58 * MHZ); #if !defined(CONFIG_S5P_LCD_INIT) exynos5_keep_disp_clock(&s5p_device_fimd0.dev); #endif #ifdef CONFIG_FB_S5P_MDNIE mdnie_device_register(); #endif res = platform_get_resource(&s5p_device_fimd0, IORESOURCE_MEM, 1); if (res && bootloaderfb_start) { res->start = bootloaderfb_start; res->end = res->start + bootloaderfb_size - 1; pr_info("bootloader fb located at %8X-%8X\n", res->start, res->end); } else { pr_err("failed to find bootloader fb resource\n"); } }
static void __init smdk4x12_machine_init(void) { s3c_i2c0_set_platdata(NULL); i2c_register_board_info(0, smdk4x12_i2c_devs0, ARRAY_SIZE(smdk4x12_i2c_devs0)); s3c_i2c1_set_platdata(NULL); i2c_register_board_info(1, smdk4x12_i2c_devs1, ARRAY_SIZE(smdk4x12_i2c_devs1)); s3c_i2c3_set_platdata(NULL); i2c_register_board_info(3, smdk4x12_i2c_devs3, ARRAY_SIZE(smdk4x12_i2c_devs3)); s3c_i2c7_set_platdata(NULL); i2c_register_board_info(7, smdk4x12_i2c_devs7, ARRAY_SIZE(smdk4x12_i2c_devs7)); samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data); pwm_add_table(smdk4x12_pwm_lookup, ARRAY_SIZE(smdk4x12_pwm_lookup)); samsung_keypad_set_platdata(&smdk4x12_keypad_data); s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata); s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata); s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata); #ifdef CONFIG_DRM_EXYNOS_FIMD s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; exynos4_fimd0_gpio_setup_24bpp(); #else s5p_fimd0_set_platdata(&smdk4x12_lcd_pdata); #endif platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices)); }
void __init exynos5_smdk5410_display_init(void) { #ifdef CONFIG_FB_MIPI_DSIM #ifdef CONFIG_S5P_DEV_MIPI_DSIM0 s5p_dsim0_set_platdata(&dsim_platform_data); #else s5p_dsim1_set_platdata(&dsim_platform_data); #endif #endif #ifdef CONFIG_S5P_DP s5p_dp_set_platdata(&smdk5410_dp_data); #endif #ifdef CONFIG_S5P_DEV_FIMD0 s5p_fimd0_set_platdata(&smdk5410_lcd0_pdata); #else s5p_fimd1_set_platdata(&smdk5410_lcd1_pdata); #endif samsung_bl_set(&smdk5410_bl_gpio_info, &smdk5410_bl_data); platform_add_devices(smdk5410_display_devices, ARRAY_SIZE(smdk5410_display_devices)); #ifdef CONFIG_S5P_DP exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev, "sclk_fimd", "mout_mpll_bpll", 267 * MHZ); #endif #ifdef CONFIG_FB_MIPI_DSIM #if defined(CONFIG_S5P_DEV_FIMD0) exynos5_fimd0_setup_clock(&s5p_device_fimd0.dev, "sclk_fimd", "mout_mpll_bpll", 800 * MHZ); #else /* 64MHz = 320MHz@CPLL / 6 */ exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev, "sclk_fimd", "mout_cpll", 64 * MHZ); #endif #endif }
static void __init origen_machine_init(void) { origen_power_init(); s3c_i2c0_set_platdata(NULL); i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs)); /* * Since sdhci instance 2 can contain a bootable media, * sdhci instance 0 is registered after instance 2. */ s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); origen_ehci_init(); origen_ohci_init(); s3c_hsotg_set_platdata(&origen_hsotg_pdata); s5p_tv_setup(); s5p_i2c_hdmiphy_set_platdata(NULL); s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0); #ifdef CONFIG_DRM_EXYNOS_FIMD s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; exynos4_fimd0_gpio_setup_24bpp(); #else s5p_fimd0_set_platdata(&origen_lcd_pdata); #endif platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup)); samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data); origen_bt_setup(); }
static void __init universal_machine_init(void) { universal_sdhci_init(); s5p_tv_setup(); s3c_i2c0_set_platdata(&universal_i2c0_platdata); i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); universal_tsp_init(); s3c_i2c3_set_platdata(NULL); i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); s3c_i2c5_set_platdata(NULL); s5p_i2c_hdmiphy_set_platdata(NULL); i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); s5p_fimd0_set_platdata(&universal_lcd_pdata); universal_touchkey_init(); i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, ARRAY_SIZE(i2c_gpio12_devs)); universal_camera_init(); /* Last */ platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev; s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev; s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev; s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev; s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev; s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev; }