/**
* \ingroup sd_raw
* Continuously reads units of \c interval bytes and calls a callback function.
*
* This function starts reading at the specified offset. Every \c interval bytes,
* it calls the callback function with the associated data buffer.
*
* By returning zero, the callback may stop reading.
*
* \note Within the callback function, you can not start another read or
* write operation.
* \note This function only works if the following conditions are met:
* - (offset - (offset % 512)) % interval == 0
* - length % interval == 0
*
* \param[in] offset Offset from which to start reading.
* \param[in] buffer Pointer to a buffer which is at least interval bytes in size.
* \param[in] interval Number of bytes to read before calling the callback function.
* \param[in] length Number of bytes to read altogether.
* \param[in] callback The function to call every interval bytes.
* \param[in] p An opaque pointer directly passed to the callback function.
* \returns 0 on failure, 1 on success
* \see sd_raw_write_interval, sd_raw_read, sd_raw_write
*/
uint8_t sd_raw_read_interval(offset_t offset, uint8_t* buffer, uintptr_t interval, uintptr_t length, sd_raw_read_interval_handler_t callback, void* p)
{
if(!buffer || interval == 0 || length < interval || !callback)
return 0;
while(length >= interval)
{
/* as reading is now buffered, we directly
* hand over the request to sd_raw_read()
*/
if(!sd_raw_read(offset, buffer, interval))
return 0;
if(!callback(buffer, offset, p))
break;
offset += interval;
length -= interval;
}
return 1;
}
/**
* \ingroup sd_raw
* Writes raw data to the card.
*
* \note If write buffering is enabled, you might have to
* call sd_raw_sync() before disconnecting the card
* to ensure all remaining data has been written.
*
* \param[in] offset The offset where to start writing.
* \param[in] buffer The buffer containing the data to be written.
* \param[in] length The number of bytes to write.
* \returns 0 on failure, 1 on success.
* \see sd_raw_write_interval, sd_raw_read, sd_raw_read_interval
*/
uint8_t sd_raw_write(uint32_t offset, const uint8_t* buffer, uint16_t length)
{
#if SD_RAW_WRITE_SUPPORT
if(get_pin_locked())
return 0;
uint32_t block_address;
uint16_t block_offset;
uint16_t write_length;
uint16_t i;
while(length > 0)
{
/* determine byte count to write at once */
block_address = offset & 0xfffffe00;
block_offset = offset & 0x01ff;
write_length = 512 - block_offset; /* write up to block border */
if(write_length > length)
write_length = length;
/* Merge the data to write with the content of the block.
* Use the cached block if available.
*/
if(block_address != raw_block_address)
{
#if SD_RAW_WRITE_BUFFERING
if(!raw_block_written)
{
if(!sd_raw_write(raw_block_address, raw_block, sizeof(raw_block)))
return 0;
}
#endif
if(block_offset || write_length < 512)
{
if(!sd_raw_read(block_address, raw_block, sizeof(raw_block)))
return 0;
}
raw_block_address = block_address;
}
if(buffer != raw_block)
{
memcpy(raw_block + block_offset, buffer, write_length);
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 0;
if(length == write_length)
return 1;
#endif
}
buffer += write_length;
/* address card */
select_card();
/* send single block request */
if(sd_raw_send_command_r1(CMD_WRITE_SINGLE_BLOCK, block_address))
{
unselect_card();
return 0;
}
/* send start byte */
sd_raw_send_byte(0xfe);
/* write byte block */
uint8_t* cache = raw_block;
for(i = 0; i < 512; ++i)
sd_raw_send_byte(*cache++);
/* write dummy crc16 */
sd_raw_send_byte(0xff);
sd_raw_send_byte(0xff);
/* wait while card is busy */
while(sd_raw_rec_byte() != 0xff);
sd_raw_rec_byte();
/* deaddress card */
unselect_card();
length -= write_length;
offset += write_length;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
}
return 1;
#else
return 0;
#endif
}
/**
* \ingroup sd_raw
* Continuously reads units of \c interval bytes and calls a callback function.
*
* This function starts reading at the specified offset. Every \c interval bytes,
* it calls the callback function with the associated data buffer.
*
* By returning zero, the callback may stop reading.
*
* \note Within the callback function, you can not start another read or
* write operation.
* \note This function only works if the following conditions are met:
* - (offset - (offset % 512)) % interval == 0
* - length % interval == 0
*
* \param[in] offset Offset from which to start reading.
* \param[in] buffer Pointer to a buffer which is at least interval bytes in size.
* \param[in] interval Number of bytes to read before calling the callback function.
* \param[in] length Number of bytes to read altogether.
* \param[in] callback The function to call every interval bytes.
* \param[in] p An opaque pointer directly passed to the callback function.
* \returns 0 on failure, 1 on success
* \see sd_raw_write_interval, sd_raw_read, sd_raw_write
*/
uint8_t sd_raw_read_interval(uint32_t offset, uint8_t* buffer, uint16_t interval, uint16_t length, sd_raw_read_interval_handler_t callback, void* p)
{
if(!buffer || interval == 0 || length < interval || !callback)
return 0;
#if !SD_RAW_SAVE_RAM
while(length >= interval)
{
/* as reading is now buffered, we directly
* hand over the request to sd_raw_read()
*/
if(!sd_raw_read(offset, buffer, interval))
return 0;
if(!callback(buffer, offset, p))
break;
offset += interval;
length -= interval;
}
return 1;
#else
/* address card */
select_card();
uint16_t block_offset;
uint16_t read_length;
uint8_t* buffer_cur;
uint8_t finished = 0;
do
{
/* determine byte count to read at once */
block_offset = offset & 0x01ff;
read_length = 512 - block_offset;
/* send single block request */
if(sd_raw_send_command_r1(CMD_READ_SINGLE_BLOCK, offset & 0xfffffe00))
{
unselect_card();
return 0;
}
/* wait for data block (start byte 0xfe) */
while(sd_raw_rec_byte() != 0xfe);
/* read up to the data of interest */
for(i = 0; i < block_offset; ++i)
sd_raw_rec_byte();
/* read interval bytes of data and execute the callback */
do
{
if(read_length < interval || length < interval)
break;
buffer_cur = buffer;
for(i = 0; i < interval; ++i)
*buffer_cur++ = sd_raw_rec_byte();
if(!callback(buffer, offset + (512 - read_length), p))
{
finished = 1;
break;
}
read_length -= interval;
length -= interval;
} while(read_length > 0 && length > 0);
/* read rest of data block */
while(read_length-- > 0)
sd_raw_rec_byte();
/* read crc16 */
sd_raw_rec_byte();
sd_raw_rec_byte();
if(length < interval)
break;
offset = (offset & 0xfffffe00) + 512;
} while(!finished);
/* deaddress card */
unselect_card();
/* let card some time to finish */
sd_raw_rec_byte();
return 1;
#endif
}
/**
* \ingroup sd_raw
* Initializes memory card communication.
*
* \returns 0 on failure, 1 on success.
*/
uint8_t sd_raw_init()
{
uint16_t i;
uint8_t response;
/* enable inputs for reading card status */
configure_pin_available();
configure_pin_locked();
/* enable outputs for MOSI, SCK, SS, input for MISO */
configure_pin_mosi();
configure_pin_sck();
configure_pin_ss();
configure_pin_miso();
unselect_card();
/* initialize SPI with lowest frequency; max. 400kHz during identification mode of card */
SPCR = (0 << SPIE) | /* SPI Interrupt Enable */
(1 << SPE) | /* SPI Enable */
(0 << DORD) | /* Data Order: MSB first */
(1 << MSTR) | /* Master mode */
(0 << CPOL) | /* Clock Polarity: SCK low when idle */
(0 << CPHA) | /* Clock Phase: sample on rising SCK edge */
(1 << SPR1) | /* Clock Frequency: f_OSC / 128 */
(1 << SPR0);
SPSR &= ~(1 << SPI2X); /* No doubled clock frequency */
/* initialization procedure */
if(!sd_raw_available())
return 0;
/* card needs 74 cycles minimum to start up */
for(i = 0; i < 10; ++i)
{
/* wait 8 clock cycles */
sd_raw_rec_byte();
}
/* address card */
select_card();
/* reset card */
for(i = 0; ; ++i)
{
response = sd_raw_send_command_r1(CMD_GO_IDLE_STATE, 0);
if(response == (1 << R1_IDLE_STATE))
break;
if(i == 0x1ff)
{
unselect_card();
return 0;
}
}
/* wait for card to get ready */
for(i = 0; ; ++i)
{
response = sd_raw_send_command_r1(CMD_SEND_OP_COND, 0);
if(!(response & (1 << R1_IDLE_STATE)))
break;
if(i == 0x7fff)
{
unselect_card();
return 0;
}
}
/* set block size to 512 bytes */
if(sd_raw_send_command_r1(CMD_SET_BLOCKLEN, 512))
{
unselect_card();
return 0;
}
/* deaddress card */
unselect_card();
/* switch to highest SPI frequency possible */
SPCR &= ~((1 << SPR1) | (1 << SPR0)); /* Clock Frequency: f_OSC / 4 */
SPSR |= (1 << SPI2X); /* Doubled Clock Frequency: f_OSC / 2 */
#if !SD_RAW_SAVE_RAM
/* the first block is likely to be accessed first, so precache it here */
raw_block_address = 0xffffffff;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
if(!sd_raw_read(0, raw_block, sizeof(raw_block)))
return 0;
#endif
return 1;
}
/**
* \ingroup sd_raw
* Initializes memory card communication.
*
* \returns 0 on failure, 1 on success.
*/
uint8_t sd_raw_init()
{
/* enable inputs for reading card status */
configure_pin_available();
configure_pin_locked();
/* enable outputs for MOSI, SCK, SS, input for MISO */
configure_pin_mosi();
configure_pin_sck();
configure_pin_ss();
configure_pin_miso();
unselect_card();
/* initialize SPI with lowest frequency; max. 400kHz during identification mode of card */
S0SPCCR = 150; /* Set frequency to 400kHz */
S0SPCR = 0x38;
/* initialization procedure */
sd_raw_card_type = 0;
if(!sd_raw_available())
return 0;
/* card needs 74 cycles minimum to start up */
for(uint8_t i = 0; i < 10; ++i)
{
/* wait 8 clock cycles */
sd_raw_rec_byte();
}
/* address card */
select_card();
/* reset card */
uint8_t response;
for(uint16_t i = 0; ; ++i)
{
response = sd_raw_send_command(CMD_GO_IDLE_STATE, 0);
if(response == (1 << R1_IDLE_STATE))
break;
if(i == 0x1ff)
{
unselect_card();
return 0;
}
}
#if SD_RAW_SDHC
/* check for version of SD card specification */
response = sd_raw_send_command(CMD_SEND_IF_COND, 0x100 /* 2.7V - 3.6V */ | 0xaa /* test pattern */);
if((response & (1 << R1_ILL_COMMAND)) == 0)
{
sd_raw_rec_byte();
sd_raw_rec_byte();
if((sd_raw_rec_byte() & 0x01) == 0)
return 0; /* card operation voltage range doesn't match */
if(sd_raw_rec_byte() != 0xaa)
return 0; /* wrong test pattern */
/* card conforms to SD 2 card specification */
sd_raw_card_type |= (1 << SD_RAW_SPEC_2);
}
else
#endif
{
/* determine SD/MMC card type */
sd_raw_send_command(CMD_APP, 0);
response = sd_raw_send_command(CMD_SD_SEND_OP_COND, 0);
if((response & (1 << R1_ILL_COMMAND)) == 0)
{
/* card conforms to SD 1 card specification */
sd_raw_card_type |= (1 << SD_RAW_SPEC_1);
}
else
{
/* MMC card */
}
}
/* wait for card to get ready */
for(uint16_t i = 0; ; ++i)
{
if(sd_raw_card_type & ((1 << SD_RAW_SPEC_1) | (1 << SD_RAW_SPEC_2)))
{
uint32_t arg = 0;
#if SD_RAW_SDHC
if(sd_raw_card_type & (1 << SD_RAW_SPEC_2))
arg = 0x40000000;
#endif
sd_raw_send_command(CMD_APP, 0);
response = sd_raw_send_command(CMD_SD_SEND_OP_COND, arg);
}
else
{
response = sd_raw_send_command(CMD_SEND_OP_COND, 0);
}
if((response & (1 << R1_IDLE_STATE)) == 0)
break;
if(i == 0x7fff)
{
unselect_card();
return 0;
}
}
#if SD_RAW_SDHC
if(sd_raw_card_type & (1 << SD_RAW_SPEC_2))
{
if(sd_raw_send_command(CMD_READ_OCR, 0))
{
unselect_card();
return 0;
}
if(sd_raw_rec_byte() & 0x40)
sd_raw_card_type |= (1 << SD_RAW_SPEC_SDHC);
sd_raw_rec_byte();
sd_raw_rec_byte();
sd_raw_rec_byte();
}
#endif
/* set block size to 512 bytes */
if(sd_raw_send_command(CMD_SET_BLOCKLEN, 512))
{
unselect_card();
return 0;
}
/* deaddress card */
unselect_card();
/* switch to highest SPI frequency possible */
S0SPCCR = 60; /* ~1MHz-- potentially can be faster */
#if !SD_RAW_SAVE_RAM
/* the first block is likely to be accessed first, so precache it here */
raw_block_address = (offset_t) -1;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
if(!sd_raw_read(0, raw_block, sizeof(raw_block)))
return 0;
#endif
return 1;
}
/**
* \ingroup sd_raw
* Writes raw data to the card.
*
* \note If write buffering is enabled, you might have to
* call sd_raw_sync() before disconnecting the card
* to ensure all remaining data has been written.
*
* \param[in] offset The offset where to start writing.
* \param[in] buffer The buffer containing the data to be written.
* \param[in] length The number of bytes to write.
* \returns 0 on failure, 1 on success.
* \see sd_raw_write_interval, sd_raw_read, sd_raw_read_interval
*/
uint8_t sd_raw_write(offset_t offset, const uint8_t* buffer, uintptr_t length)
{
if(sd_raw_locked())
return 0;
offset_t block_address;
uint16_t block_offset;
uint16_t write_length;
while(length > 0)
{
/* determine byte count to write at once */
block_offset = offset & 0x01ff;
block_address = offset - block_offset;
write_length = 512 - block_offset; /* write up to block border */
if(write_length > length)
write_length = length;
/* Merge the data to write with the content of the block.
* Use the cached block if available.
*/
if(block_address != raw_block_address)
{
#if SD_RAW_WRITE_BUFFERING
if(!sd_raw_sync())
return 0;
#endif
if(block_offset || write_length < 512)
{
if(!sd_raw_read(block_address, raw_block, sizeof(raw_block)))
return 0;
}
raw_block_address = block_address;
}
if(buffer != raw_block)
{
memcpy(raw_block + block_offset, buffer, write_length);
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 0;
if(length == write_length)
return 1;
#endif
}
/* address card */
select_card();
/* send single block request */
#if SD_RAW_SDHC
if(sd_raw_send_command(CMD_WRITE_SINGLE_BLOCK, (sd_raw_card_type & (1 << SD_RAW_SPEC_SDHC) ? block_address / 512 : block_address)))
#else
if(sd_raw_send_command(CMD_WRITE_SINGLE_BLOCK, block_address))
#endif
{
unselect_card();
return 0;
}
/* send start byte */
sd_raw_send_byte(0xfe);
/* write byte block */
uint8_t* cache = raw_block;
for(uint16_t i = 0; i < 512; ++i)
sd_raw_send_byte(*cache++);
/* write dummy crc16 */
sd_raw_send_byte(0xff);
sd_raw_send_byte(0xff);
uint16_t tries = 0;
/* wait while card is busy */
while(sd_raw_rec_byte() != 0xff){
if(tries >= 0x7FFF){
unselect_card();
return 0;
}
tries++;
}
sd_raw_rec_byte();
/* deaddress card */
unselect_card();
buffer += write_length;
offset += write_length;
length -= write_length;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
}
return 1;
}
/**
* \ingroup sd_raw
* Initializes memory card communication.
*
* \returns 0 on failure, 1 on success.
*/
uint8_t sd_raw_init(bool use_crc, uint8_t speed)
{
#if !SD_POOR_DESIGN
(void)speed;
#endif
#if !SD_RAW_SAVE_RAM
sd_use_crc = use_crc;
#else
(void)use_crc;
#endif
sd_errno = 0;
/* enable inputs for reading card status */
configure_pin_available();
configure_pin_locked();
/* enable outputs for MOSI, SCK, SS, input for MISO */
configure_pin_ss();
/* unselect SS as it may be CS for another SPI device */
unselect_card();
configure_pin_mosi();
configure_pin_sck();
configure_pin_miso();
/* initialize SPI with lowest frequency; max. 400kHz during identification mode of card */
SPCR = (0 << SPIE) | /* SPI Interrupt Enable */
(1 << SPE) | /* SPI Enable */
(0 << DORD) | /* Data Order: MSB first */
(1 << MSTR) | /* Master mode */
(0 << CPOL) | /* Clock Polarity: SCK low when idle */
(0 << CPHA) | /* Clock Phase: sample on rising SCK edge */
(1 << SPR1) | /* Clock Frequency: f_OSC / 128 */
(1 << SPR0);
SPSR = 0; // &= ~(1 << SPI2X); /* No doubled clock frequency */
/* initialization procedure */
sd_raw_card_type = 0;
if(!sd_raw_available())
{
sd_errno = SDR_ERR_NOCARD;
return 0;
}
/* card needs 74 cycles minimum to start up with SS/CS high */
for(uint8_t i = 0; i < 10; ++i)
{
/* wait 8 clock cycles */
sd_raw_rec_byte();
}
/* now lower CS */
select_card();
/* reset card */
uint8_t response;
for(uint16_t i = 0; ; ++i)
{
response = sd_raw_send_command(CMD_GO_IDLE_STATE, 0);
if(response == (1 << R1_IDLE_STATE))
break;
if(i == 0x1ff)
{
unselect_card();
sd_errno = SDR_ERR_COMMS;
return 0;
}
}
#if !SD_RAW_SAVE_RAM
if ( sd_use_crc ) {
if ( sd_raw_send_command(CMD_CRC_ON_OFF, 1) != (1 << R1_IDLE_STATE) ) {
unselect_card();
sd_errno = SDR_ERR_CRC;
return 0;
}
}
#endif
#if SD_RAW_SDHC
/* check for version of SD card specification */
response = sd_raw_send_command(CMD_SEND_IF_COND, 0x100 /* 2.7V - 3.6V */ | 0xaa /* test pattern */);
if((response & (1 << R1_ILL_COMMAND)) == 0)
{
sd_raw_rec_byte();
sd_raw_rec_byte();
if((sd_raw_rec_byte() & 0x01) == 0)
{
sd_errno = SDR_ERR_VOLTAGE;
return 0; /* card operation voltage range doesn't match */
}
if(sd_raw_rec_byte() != 0xaa)
{
sd_errno = SDR_ERR_PATTERN;
return 0; /* wrong test pattern */
}
/* card conforms to SD 2 card specification */
sd_raw_card_type |= (1 << SD_RAW_SPEC_2);
}
else
#endif
{
/* determine SD/MMC card type */
sd_raw_send_command(CMD_APP, 0);
response = sd_raw_send_command(CMD_SD_SEND_OP_COND, 0);
if((response & (1 << R1_ILL_COMMAND)) == 0)
{
/* card conforms to SD 1 card specification */
sd_raw_card_type |= (1 << SD_RAW_SPEC_1);
}
else
{
/* MMC card */
}
}
/* wait for card to get ready */
for(uint16_t i = 0; ; ++i)
{
if(sd_raw_card_type & ((1 << SD_RAW_SPEC_1) | (1 << SD_RAW_SPEC_2)))
{
uint32_t arg = 0;
#if SD_RAW_SDHC
if(sd_raw_card_type & (1 << SD_RAW_SPEC_2))
arg = 0x40000000;
#endif
sd_raw_send_command(CMD_APP, 0);
response = sd_raw_send_command(CMD_SD_SEND_OP_COND, arg);
}
else
{
response = sd_raw_send_command(CMD_SEND_OP_COND, 0);
}
if((response & (1 << R1_IDLE_STATE)) == 0)
break;
if(i == 0x1ff)
{
unselect_card();
sd_errno = SDR_ERR_COMMS;
return 0;
}
}
#if SD_RAW_SDHC
if(sd_raw_card_type & (1 << SD_RAW_SPEC_2))
{
if(sd_raw_send_command(CMD_READ_OCR, 0))
{
unselect_card();
sd_errno = SDR_ERR_BADRESPONSE;
return 0;
}
if(sd_raw_rec_byte() & 0x40)
sd_raw_card_type |= (1 << SD_RAW_SPEC_SDHC);
sd_raw_rec_byte();
sd_raw_rec_byte();
sd_raw_rec_byte();
}
#endif
/* set block size to 512 bytes */
if(sd_raw_send_command(CMD_SET_BLOCKLEN, 512))
{
unselect_card();
sd_errno = SDR_ERR_BADRESPONSE;
return 0;
}
/* deaddress card */
unselect_card();
/* switch to highest SPI frequency possible */
#if SD_POOR_DESIGN
switch(speed) {
/* f_OSC / 2 */
case 0:
SPCR &= ~((1 << SPR1) | (1 << SPR0));
SPSR |= (1 << SPI2X);
break;
/* f_OSC / 4 */
case 1:
SPCR &= ~((1 << SPR1) | (1 << SPR0));
SPSR &= ~(1 << SPI2X);
break;
/* f_OSC / 8 */
case 2:
SPCR |= (1 << SPR0);
SPCR &= ~(1 << SPR1);
SPSR |= (1 << SPI2X); /* Doubled Clock Frequency: f_OSC / 2 */
break;
/* f_OSC / 16 */
case 3:
SPCR |= (1 << SPR0);
SPCR &= ~(1 << SPR1);
SPSR &= ~(1 << SPI2X); /* Doubled Clock Frequency: f_OSC / 2 */
break;
/* f_OSC / 32 */
case 4:
SPCR &= ~(1 << SPR0);
SPCR |= (1 << SPR1);
SPSR |= (1 << SPI2X); /* Doubled Clock Frequency: f_OSC / 2 */
break;
/* f_OSC / 64 [two ways of achieving] */
case 5:
SPCR &= ~(1 << SPR0);
SPCR |= (1 << SPR1);
SPSR &= ~(1 << SPI2X);
break;
/* f_OSC / 128 */
case 6:
SPCR |= (1 << SPR1) | (1 << SPR0);
SPSR &= ~(1 << SPI2X);
break;
default:
sd_errno = SDR_ERR_COMMS;
return 0;
}
#else
// MBI used to use f_OSC / 2
// But owing to the lousy SD card bus, that doesn't work well
// Then with the introduction of the revH MightyBoard, they dropped
// down to f_OSC / 16.
// / * f_OSC / 2 */
// SPCR &= ~((1 << SPR1) | (1 << SPR0)); /* Clock Frequency: f_OSC / 4 */
// SPSR |= (1 << SPI2X); /* Doubled Clock Frequency: f_OSC / 2 */
/* f_OSC / 16 */
SPCR |= ( 1 << SPR0 );
SPCR &= ~( 1 << SPR1 );
SPSR &= ~( 1 << SPI2X );
#endif
#if !SD_RAW_SAVE_RAM
/* the first block is likely to be accessed first, so precache it here */
raw_block_address = (offset_t) -1;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
if(!sd_raw_read(0, raw_block, sizeof(raw_block)))
return 0;
#endif
#if defined(DEBUG_SD)
sd_errno = SDR_ERR_FOO;
#endif
// sd_errno set by sd_raw_read
return 1;
}
/**
* \ingroup sd_raw
* Initializes memory card communication.
*
* \returns 0 on failure, 1 on success.
*/
uint8_t sd_raw_init(void)
{
_sd_infodirty = 1;
/* enable inputs for reading card status */
configure_pin_available();
configure_pin_locked();
/* enable outputs for MOSI, SCK, SS, input for MISO */
configure_pin_mosi();
configure_pin_sck();
configure_pin_ss();
configure_pin_miso();
unselect_card();
/* initialize SPI with lowest frequency; max. 400kHz during identification mode of card */
SPCR = (0 << SPIE) | /* SPI Interrupt Enable */
(1 << SPE) | /* SPI Enable */
(0 << DORD) | /* Data Order: MSB first */
(1 << MSTR) | /* Master mode */
(0 << CPOL) | /* Clock Polarity: SCK low when idle */
(0 << CPHA) | /* Clock Phase: sample on rising SCK edge */
(1 << SPR1) | /* Clock Frequency: f_OSC / 128 */
(1 << SPR0);
SPSR &= ~(1 << SPI2X); /* No doubled clock frequency */
/* initialization procedure */
sd_raw_card_type = 0;
if(!sd_raw_available())
{
SD_DEBUG("SD card not available");
return 0;
}
/* card needs 74 cycles minimum to start up */
uint16_t i;
for(i = 0; i < 10; ++i)
{
/* wait 8 clock cycles */
sd_raw_rec_byte();
}
/* address card */
select_card();
/* reset card */
uint8_t response;
for(i = 0; ; ++i)
{
response = sd_raw_send_command(CMD_GO_IDLE_STATE, 0);
if(response == (1 << R1_IDLE_STATE))
break;
if(i == 0x1ff)
{
unselect_card();
SD_DEBUG("Some kind of error.");
return 0;
}
}
#if SD_RAW_SDHC
/* check for version of SD card specification */
response = sd_raw_send_command(CMD_SEND_IF_COND, 0x100 /* 2.7V - 3.6V */ | 0xaa /* test pattern */);
if((response & (1 << R1_ILL_COMMAND)) == 0)
{
sd_raw_rec_byte();
sd_raw_rec_byte();
if((sd_raw_rec_byte() & 0x01) == 0)
{
SD_DEBUG("Bad voltage");
return 0; /* card operation voltage range doesn't match */
}
if(sd_raw_rec_byte() != 0xaa)
{
SD_DEBUG("Bad test pattern.");
return 0; /* wrong test pattern */
}
/* card conforms to SD 2 card specification */
sd_raw_card_type |= (1 << SD_RAW_SPEC_2);
}
else
#endif
{
/* determine SD/MMC card type */
sd_raw_send_command(CMD_APP, 0);
response = sd_raw_send_command(CMD_SD_SEND_OP_COND, 0);
if((response & (1 << R1_ILL_COMMAND)) == 0)
{
/* card conforms to SD 1 card specification */
sd_raw_card_type |= (1 << SD_RAW_SPEC_1);
}
else
{
/* MMC card */
}
}
/* wait for card to get ready */
for(i = 0; ; ++i)
{
if(sd_raw_card_type & ((1 << SD_RAW_SPEC_1) | (1 << SD_RAW_SPEC_2)))
{
uint32_t arg = 0;
#if SD_RAW_SDHC
if(sd_raw_card_type & (1 << SD_RAW_SPEC_2))
arg = 0x40000000;
#endif
sd_raw_send_command(CMD_APP, 0);
response = sd_raw_send_command(CMD_SD_SEND_OP_COND, arg);
}
else
{
response = sd_raw_send_command(CMD_SEND_OP_COND, 0);
}
if((response & (1 << R1_IDLE_STATE)) == 0)
break;
if(i == 0x7fff)
{
unselect_card();
SD_DEBUG("Some kind of error.");
return 0;
}
}
#if SD_RAW_SDHC
if(sd_raw_card_type & (1 << SD_RAW_SPEC_2))
{
if(sd_raw_send_command(CMD_READ_OCR, 0))
{
unselect_card();
SD_DEBUG("Some kind of error.");
return 0;
}
if(sd_raw_rec_byte() & 0x40)
sd_raw_card_type |= (1 << SD_RAW_SPEC_SDHC);
sd_raw_rec_byte();
sd_raw_rec_byte();
sd_raw_rec_byte();
}
#endif
/* set block size to 512 bytes */
if(sd_raw_send_command(CMD_SET_BLOCKLEN, 512))
{
unselect_card();
SD_DEBUG("Some kind of error.");
return 0;
}
/* deaddress card */
unselect_card();
/* switch to highest SPI frequency possible */
SPCR &= ~((1 << SPR1) | (1 << SPR0)); /* Clock Frequency: f_OSC / 4 */
SPSR |= (1 << SPI2X); /* Doubled Clock Frequency: f_OSC / 2 */
#if !SD_RAW_SAVE_RAM
/* the first block is likely to be accessed first, so precache it here */
raw_block_address = (unsigned long) -1;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
if(!sd_raw_read(0, raw_block, sizeof(raw_block)))
{
SD_DEBUG("Some kind of error.");
return 0;
}
#endif
return 1;
}
/**
* \ingroup sd_raw
* Writes raw data to the card.
*
* \note If write buffering is enabled, you might have to
* call sd_raw_sync() before disconnecting the card
* to ensure all remaining data has been written.
*
* \param[in] offset The offset where to start writing.
* \param[in] buffer The buffer containing the data to be written.
* \param[in] length The number of bytes to write.
* \returns 0 on failure, 1 on success.
* \see sd_raw_write_interval, sd_raw_read, sd_raw_read_interval
*/
uint8_t sd_raw_write(uint32_t offset, const uint8_t* buffer, uint16_t length)
{
#if SD_RAW_WRITE_SUPPORT
if(get_pin_locked())
return 0;
uint32_t block_address;
uint16_t block_offset;
uint16_t write_length;
while(length > 0)
{
/* determine byte count to write at once */
block_address = offset & 0xfffffe00;
block_offset = offset & 0x01ff;
write_length = 512 - block_offset; /* write up to block border */
if(write_length > length)
write_length = length;
/* Merge the data to write with the content of the block.
* Use the cached block if available.
*/
if(block_address != raw_block_address)
{
#if SD_RAW_WRITE_BUFFERING
if(!sd_raw_sync())
return 0;
#endif
if(block_offset || write_length < 512)
{
if(!sd_raw_read(block_address, raw_block, sizeof(raw_block)))
return 0;
}
raw_block_address = block_address;
}
if(buffer != raw_block)
{
memcpy(raw_block + block_offset, buffer, write_length);
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 0;
if(length == write_length)
return 1;
#endif
}
/* address card */
select_card();
/* send single block request */
if(sd_raw_send_command_r1(CMD_WRITE_SINGLE_BLOCK, block_address))
{
unselect_card();
spi_rec_byte();
return 0;
}
/* send start byte */
spi_send_byte(0xfe);
/* write byte block */
spi_send_data(raw_block, 512);
/* write dummy crc16 */
spi_send_byte(0xff);
spi_send_byte(0xff);
/* wait while card is busy */
/*
uint16_t i;
for(i = 0; i < 0x7fff; ++i)
{
if(spi_rec_byte() == 0xff)
break;
}
if(i >= 0x7fff)
{
unselect_card();
spi_rec_byte();
return 0;
}
*/
// obiger code reicht bei langsamen Karten nicht aus!
// daher nachfolgende alte Version mit endlos Warteschleife
// Wil.
while(spi_rec_byte() != 0xff);
spi_rec_byte();
/* deaddress card */
unselect_card();
buffer += write_length;
offset += write_length;
length -= write_length;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
}
return 1;
#else
return 0;
#endif
}
/**
* \ingroup sd_raw
* Initializes memory card communication.
*
* \returns 0 on failure, 1 on success.
*/
uint8_t sd_raw_init()
{
/* enable inputs for reading card status */
configure_pin_available();
configure_pin_locked();
/* enable output CS */
configure_pin_cs();
unselect_card();
/* initialization procedure */
if(!sd_raw_available())
return 0;
/* wait for the card being powered up */
_delay_ms(10);
/* initialize SPI with lowest frequency; max. 400kHz during identification mode of card */
spi_low_frequency();
/* card needs 74 cycles minimum to start up */
for(uint8_t i = 0; i < 32; ++i)
{
/* wait 8 clock cycles */
spi_rec_byte();
}
/* address card */
select_card();
printf_P(PSTR("Card reset\n\r"));
/* reset card */
uint8_t response;
for(uint16_t i = 0; ; ++i)
{
response = sd_raw_send_command_r1(CMD_GO_IDLE_STATE, 0);
if(response == (1 << R1_IDLE_STATE))
break;
if(i == 0x1ff)
{
unselect_card();
spi_rec_byte();
spi_high_frequency();
return 0;
}
}
printf_P(PSTR("Card: wait\n\r"));
/* wait for card to get ready */
for(uint16_t i = 0; ; ++i)
{
// ACMD41 für "dünne" und "normale" SD-Karten (wil)
// response = sd_raw_send_command_r1(55, 0); // APP_CMD
// response = sd_raw_send_command_r1(41, 0); // SD_SEND_OP_COND (keine 'high capacity')
response = sd_raw_send_command_r1(1, 0); // CMD1 (for MMC)
if(!(response & (1 << R1_IDLE_STATE)))
break;
if(i == 0x7fff)
{
unselect_card();
spi_rec_byte();
spi_high_frequency();
return 0;
}
}
printf_P(PSTR("Card ready\n\r"));
/* set block size to 512 bytes */
if(sd_raw_send_command_r1(CMD_SET_BLOCKLEN, 512))
{
unselect_card();
spi_rec_byte();
spi_high_frequency();
return 0;
}
/* deaddress card */
unselect_card();
spi_rec_byte();
/* switch to highest SPI frequency possible */
spi_high_frequency();
#if !SD_RAW_SAVE_RAM
/* the first block is likely to be accessed first, so precache it here */
raw_block_address = 0xffffffff;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
if(!sd_raw_read(0, raw_block, sizeof(raw_block)))
return 0;
#endif
return 1;
}
/**
* \ingroup sd_raw
* Initializes memory card communication.
*
* \returns 0 on failure, 1 on success.
*/
uint8_t sd_raw_init()
{
/* Configure Chip-Select Pin*/
configure_pin_ss();
#if defined(AVRNETIO) && defined(AVRNETIO_ADDON)
/* enable inputs for reading card status */
DDRD |= (1<<PD7);
PORTD |= (1<<PD7);
DDRD |= (1<<PD5);
PORTD |= (1<<PD5);
configure_pin_available();
// configure_pin_locked();
#elif defined(AVRNETIO) && !defined(AVRNETIO_ADDON)
/* enable inputs for reading card status */
configure_pin_available();
configure_pin_locked();
configure_pin_available_pullup();
configure_pin_locked_pullup();
#endif
/* unselect MMC-Card */
select_card();
unselect_card();
/* SPI-Bus Init */
SPI_init( spi_bus_num );
#if defined(AVRNETIO) && !defined(AVRNETIO_ADDON)
/* Power up the MMC-Interface */
configure_power_up();
power_up();
#endif
/* initialization procedure */
sd_raw_card_type = 0;
if(!sd_raw_available())
{
return 0;
}
/* card needs 74 cycles minimum to start up */
for(uint8_t i = 0; i < 100; ++i)
{
/* wait 8 clock cycles */
sd_raw_rec_byte();
}
/* address card */
select_card();
/* reset card */
uint8_t response;
for(uint16_t i = 0; ; ++i)
{
response = sd_raw_send_command(CMD_GO_IDLE_STATE, 0);
if(response == (1 << R1_IDLE_STATE))
break;
if(i == 0xfff)
{
unselect_card();
return 0;
}
}
#if SD_RAW_SDHC
/* check for version of SD card specification */
response = sd_raw_send_command(CMD_SEND_IF_COND, 0x100 /* 2.7V - 3.6V */ | 0xaa /* test pattern */);
if((response & (1 << R1_ILL_COMMAND)) == 0)
{
sd_raw_rec_byte();
sd_raw_rec_byte();
if((sd_raw_rec_byte() & 0x01) == 0)
{
unselect_card();
return 0; /* card operation voltage range doesn't match */
}
if(sd_raw_rec_byte() != 0xaa)
{
unselect_card();
return 0; /* wrong test pattern */
}
/* card conforms to SD 2 card specification */
sd_raw_card_type |= (1 << SD_RAW_SPEC_2);
}
else
#endif
{
/* determine SD/MMC card type */
sd_raw_send_command(CMD_APP, 0);
response = sd_raw_send_command(CMD_SD_SEND_OP_COND, 0);
if((response & (1 << R1_ILL_COMMAND)) == 0)
{
/* card conforms to SD 1 card specification */
sd_raw_card_type |= (1 << SD_RAW_SPEC_1);
}
else
{
/* MMC card */
}
}
/* wait for card to get ready */
for(uint16_t i = 0; ; ++i)
{
if(sd_raw_card_type & ((1 << SD_RAW_SPEC_1) | (1 << SD_RAW_SPEC_2)))
{
uint32_t arg = 0;
#if SD_RAW_SDHC
if(sd_raw_card_type & (1 << SD_RAW_SPEC_2))
arg = 0x40000000;
#endif
sd_raw_send_command(CMD_APP, 0);
response = sd_raw_send_command(CMD_SD_SEND_OP_COND, arg);
}
else
{
response = sd_raw_send_command(CMD_SEND_OP_COND, 0);
}
if((response & (1 << R1_IDLE_STATE)) == 0)
break;
if(i == 0x7fff)
{
unselect_card();
return 0;
}
}
#if SD_RAW_SDHC
if(sd_raw_card_type & (1 << SD_RAW_SPEC_2))
{
if(sd_raw_send_command(CMD_READ_OCR, 0))
{
unselect_card();
return 0;
}
if(sd_raw_rec_byte() & 0x40)
sd_raw_card_type |= (1 << SD_RAW_SPEC_SDHC);
sd_raw_rec_byte();
sd_raw_rec_byte();
sd_raw_rec_byte();
}
#endif
/* set block size to 512 bytes */
if(sd_raw_send_command(CMD_SET_BLOCKLEN, 512))
{
unselect_card();
return 0;
}
/* deaddress card */
unselect_card();
// /* switch to highest SPI frequency possible */
// SPCR &= ~((1 << SPR1) | (1 << SPR0)); /* Clock Frequency: f_OSC / 4 */
// SPSR |= (1 << SPI2X); /* Doubled Clock Frequency: f_OSC / 2 */
#if !SD_RAW_SAVE_RAM
/* the first block is likely to be accessed first, so precache it here */
raw_block_address = (offset_t) -1;
#if SD_RAW_WRITE_BUFFERING
raw_block_written = 1;
#endif
if(!sd_raw_read(0, raw_block, sizeof(raw_block)))
{
unselect_card();
return 0;
}
#endif
return 1;
}
