void trustzone_post_init(void)
{
atf_arg_t_ptr teearg = (atf_arg_t_ptr)trustzone_get_atf_boot_param_addr();
teearg->atf_magic = ATF_BOOTCFG_MAGIC;
teearg->tee_entry = tee_entry_addr;
teearg->tee_boot_arg_addr = TEE_BOOT_ARG_ADDR;
teearg->HRID[0] = seclib_get_devinfo_with_index(E_AREA12);
teearg->HRID[1] = seclib_get_devinfo_with_index(E_AREA13);
teearg->atf_log_port = CFG_UART_LOG;
teearg->atf_log_baudrate = CFG_LOG_BAUDRATE;
teearg->atf_irq_num = (32 + 249); /* K2 reserve SPI ID 249 for ATF log, which is ID 281 */
DBG_MSG("%s hwuid[0] : 0x%x\n", MOD, teearg->hwuid[0]);
DBG_MSG("%s hwuid[1] : 0x%x\n", MOD, teearg->hwuid[1]);
DBG_MSG("%s hwuid[2] : 0x%x\n", MOD, teearg->hwuid[2]);
DBG_MSG("%s hwuid[3] : 0x%x\n", MOD, teearg->hwuid[3]);
DBG_MSG("%s HRID[0] : 0x%x\n", MOD, teearg->HRID[0]);
DBG_MSG("%s HRID[1] : 0x%x\n", MOD, teearg->HRID[1]);
DBG_MSG("%s atf_log_port : 0x%x\n", MOD, teearg->atf_log_port);
DBG_MSG("%s atf_log_baudrate : 0x%x\n", MOD, teearg->atf_log_baudrate);
DBG_MSG("%s atf_irq_num : %d\n", MOD, teearg->atf_irq_num);
#if CFG_TRUSTONIC_TEE_SUPPORT
tbase_secmem_param_prepare(TEE_PARAMETER_ADDR, tee_entry_addr, CFG_TEE_CORE_SIZE,
tee_secmem_size);
tbase_boot_param_prepare(TEE_BOOT_ARG_ADDR, tee_entry_addr, CFG_TEE_CORE_SIZE,
CFG_DRAM_ADDR, platform_memory_size());
teearg->tee_support = 1;
#else //CFG_ATF_SUPPORT
teearg->tee_support = 0;
#endif
tz_dapc_sec_postinit();
#if CFG_ATF_LOG_SUPPORT
teearg->atf_log_buf_start = atf_log_buf_start;
teearg->atf_log_buf_size = ATF_LOG_BUFFER_SIZE;
teearg->atf_aee_debug_buf_start = (atf_log_buf_start + ATF_LOG_BUFFER_SIZE - ATF_AEE_BUFFER_SIZE);
teearg->atf_aee_debug_buf_size = ATF_AEE_BUFFER_SIZE;
#else
teearg->atf_log_buf_start = 0;
teearg->atf_log_buf_size = 0;
teearg->atf_aee_debug_buf_start = 0;
teearg->atf_aee_debug_buf_size = 0;
#endif
DBG_MSG("%s ATF log buffer start : 0x%x\n", MOD, teearg->atf_log_buf_start);
DBG_MSG("%s ATF log buffer size : 0x%x\n", MOD, teearg->atf_log_buf_size);
DBG_MSG("%s ATF aee buffer start : 0x%x\n", MOD, teearg->atf_aee_debug_buf_start);
DBG_MSG("%s ATF aee buffer size : 0x%x\n", MOD, teearg->atf_aee_debug_buf_size);
}
void mt_usb_phy_recover (void)
{
/* clean PUPD_BIST_EN */
/* PUPD_BIST_EN = 1'b0 */
/* PMIC will use it to detect charger type */
USBPHY_CLR8(0x1d, 0x10);
/* force_uart_en = 1'b0 */
USBPHY_CLR8(0x6b, 0x04);
/* RG_UART_EN = 1'b0 */
USBPHY_CLR8(0x6e, 0x01);
/* force_uart_en = 1'b0 */
USBPHY_CLR8(0x6a, 0x04);
USBPHY_CLR8(0x68, 0xf4);
/* RG_DATAIN[3:0] = 4'b0000 */
USBPHY_CLR8(0x69, 0x3c);
USBPHY_CLR8(0x6a, 0xba);
/* RG_USB20_BC11_SW_EN = 1'b0 */
USBPHY_CLR8(0x1a, 0x80);
/* RG_USB20_OTG_VBUSSCMP_EN = 1'b1 */
USBPHY_SET8(0x1a, 0x10);
udelay(800);
/* force enter device mode */
USBPHY_CLR8(0x6c, 0x10);
USBPHY_SET8(0x6c, 0x2E);
USBPHY_SET8(0x6d, 0x3E);
print("USB HW reg: index14=0x%x\n", seclib_get_devinfo_with_index(14));
if (seclib_get_devinfo_with_index(14) & (0x01<<22))
{
print("USB HW reg: read RG_USB20_INTR_EN 0x%x\n", USBPHY_READ8(0x00));
USBPHY_CLR8(0x00, 0x20);
print("USB HW reg: write RG_USB20_INTR_EN 0x%x\n", USBPHY_READ8(0x00));
}
if (seclib_get_devinfo_with_index(14) & (0x07<<19))
{
//RG_USB20_VRT_VREF_SEL[2:0]=5 (ori:4) (0x11110804[14:12])
print("USB HW reg: read RG_USB20_VRT_VREF_SEL 0x%x\n", USBPHY_READ8(0x05));
USBPHY_CLR8(0x05, 0x70);
USBPHY_SET8(0x05, ((seclib_get_devinfo_with_index(7)>>19)<<4)&0x70);
print("USB HW reg: overwrite RG_USB20_VRT_VREF_SEL 0x%x\n", USBPHY_READ8(0x05));
}
void ptp_init1(void)
{
PTP_Init_T PTP_Init_value;
unsigned int PTPINTSTS;
#if PTP_Get_Real_Val
val_0 = seclib_get_devinfo_with_index(8);
val_1 = seclib_get_devinfo_with_index(9);
val_2 = seclib_get_devinfo_with_index(21);
val_3 = seclib_get_devinfo_with_index(22);
#endif
if( (val_0 & 0x1) == 0x0 )
{
return 0;
}
// enable thermal clock
ptp_write(MT_CG_THEM_SET, 0x2);
PTP_Init_value.PTPINITEN = (val_0) & 0x1;
PTP_Init_value.PTPMONEN = (val_0 >> 1) & 0x1;
PTP_Init_value.MDES = (val_0 >> 8) & 0xff;
PTP_Init_value.BDES = (val_0 >> 16) & 0xff;
PTP_Init_value.DCMDET = (val_0 >> 24) & 0xff;
PTP_Init_value.DCCONFIG = (val_1) & 0xffffff;
PTP_Init_value.DCBDET = (val_1 >> 24) & 0xff;
PTP_Init_value.AGECONFIG = (val_2) & 0xffffff;
PTP_Init_value.AGEM = (val_2 >> 24) & 0xff;
PTP_Init_value.AGEDELTA = (val_3) & 0xff;
PTP_Init_value.DVTFIXED = (val_3 >> 8) & 0xff;
PTP_Init_value.MTDES = (val_3 >> 16) & 0xff;
PTP_Init_value.VCO = (val_3 >> 24) & 0xff;
//need to provide by efuse
/*PTP_Init_value.MDES = 0x3c;
PTP_Init_value.BDES = 0x28;
PTP_Init_value.DCMDET = 0x11;
PTP_Init_value.DCBDET = 0x0;
PTP_Init_value.PTPINITEN = 0x1;
PTP_Init_value.PTPMONEN = 0x0;
PTP_Init_value.AGEM = 0x14;
PTP_Init_value.DCCONFIG = 0xaaaaaa;
PTP_Init_value.AGECONFIG = 0xaaaaaa;
PTP_Init_value.AGEDELTA = 0x0;
PTP_Init_value.DVTFIXED = 0x0;
PTP_Init_value.MTDES = 0x26;
PTP_Init_value.VCO = 0x60;
PTP_Init_value.FREQPCT0 = 120; // max freq 1200 x 100%
PTP_Init_value.FREQPCT1 = 100; // 1000
PTP_Init_value.FREQPCT2 = 80; // 800
PTP_Init_value.FREQPCT3 = 60; // 600
PTP_Init_value.FREQPCT4 = 0;
PTP_Init_value.FREQPCT5 = 0;
PTP_Init_value.FREQPCT6 = 0;
PTP_Init_value.FREQPCT7 = 0;
*/
// 40 us. This is special case for init1 (bclk source is switch to 26M, and bclk = 26M also)
PTP_Init_value.DETWINDOW = 0x514; // 50us
PTP_Init_value.VMAX = 0x58; // 1.25v (700mv + n * 6.25mv)
PTP_Init_value.VMIN = 0x48; // 1.15v (700mv + n * 6.25mv)
PTP_Init_value.DTHI = 0x01; // positive
PTP_Init_value.DTLO = 0xfe; // negative (2's compliment)
PTP_Init_value.VBOOT = 0x48; // 115v (700mv + n * 6.25mv)
PTP_Init_value.DETMAX = 0xffff; // This timeout value is in cycles of bclk_ck.
// set register for init1
ptp_init_setup(INIT1_MODE, &PTP_Init_value);
// polling PTP_PTPINTSTS till = 0x1
PTPINTSTS = ptp_read(PTP_PTPINTSTS);
while((PTPINTSTS & 1) != 0x1){ PTPINTSTS = ptp_read(PTP_PTPINTSTS); };
// Set PTPEN.PTPINITEN/PTPEN.PTPINIT2EN = 0x0 & Clear PTP INIT interrupt PTPINTSTS = 0x00000001
ptp_write(PTP_PTPEN, 0x0);
ptp_write(PTP_PTPINTSTS, 0x1);
// disable thermal clock
ptp_write(MT_CG_THEM_CLR, 0x2);
//clkmux_sel(MT_CLKMUX_AXIBUS_GFMUX_SEL, MT_CG_MPLL_D12, "PTP_BCLK");
//}
}
