DRIVER_API_RC adxl362_sampling_register_setup(
adxl362_sample_rate_t sample_rate,
uint16_t
watermark)
{
/* Set up the filter control */
if (!adxl362_reg_write_and_test(ADXL362_REG_FILTER_CTL,
adxl362_filter_config[sample_rate] |
ADXL362_EXT_TRIGGER | measurement_range))
return DRV_RC_FAIL;
if (!adxl362_reg_write_and_test(ADXL362_REG_FIFO_CONTROL,
ADXL362_FIFO_MODE_STREAM))
return DRV_RC_FAIL;
if (!adxl362_reg_write_and_test(ADXL362_REG_FIFO_SAMPLES,
(watermark * 3) - 1))
return DRV_RC_FAIL;
if (!adxl362_reg_write_and_test(ADXL362_REG_INTMAP1,
ADXL362_INT_FIFO_WATERMARK))
return DRV_RC_FAIL;
if (!adxl362_reg_write_and_test(ADXL362_REG_POWER_CTL, ADXL362_MEASURE))
return DRV_RC_FAIL;
sensor_delay_ms(50);
return DRV_RC_OK;
}
int adxl362_init(void)
{
gpio_cfg_data_t out_cfg = { 0 };
gpio_cfg_data_t in_cfg = { 0 };
out_cfg.gpio_type = GPIO_OUTPUT;
in_cfg.gpio_type = GPIO_INPUT;
adxl362_s.int_pin_gpio = &pf_device_ss_gpio_8b0;
gpio_set_config(adxl362_s.int_pin_gpio, ADXL362_INT2_PIN, &out_cfg);
gpio_set_config(adxl362_s.int_pin_gpio, ADXL362_INT1_PIN, &in_cfg);
adxl362_s.id[0] = adxl362_s.id[1] = 0;
adxl362_bus_read(ADXL362_REG_DEVID_AD, adxl362_s.id, 2);
if ((adxl362_s.id[0] == 0xff && adxl362_s.id[1] == 0xff)
|| (adxl362_s.id[0] == 0 && adxl362_s.id[1] == 0))
return -1;
/* SW reset the sensor */
adxl362_softreset();
sensor_delay_ms(100);
adxl362_standby();
return 0;
}
DRIVER_API_RC bme280_set_workmode(struct phy_sensor_t * sensor)
{
BME280_RETURN_FUNCTION_TYPE comres = SUCCESS;
uint8_t cfg = BME280_Zero_U8X;
uint8_t ctrl_meas = BME280_Zero_U8X;
uint8_t ctrl_hum = BME280_Zero_U8X;
uint8_t cfg_check = BME280_Zero_U8X;
uint8_t ctrl_meas_check = BME280_Zero_U8X;
uint8_t ctrl_hum_check = BME280_Zero_U8X;
uint8_t mismatch = 0;
struct bme280_t *p_bme280 = &bme280_s;
/* Only support FORCED MODE in driver */
if(p_bme280->mode == BME280_FORCED_MODE){
pr_debug(LOG_MODULE_BME280, "Forced mode not supported!");
return E_BME280_OUT_OF_RANGE;
}
comres += bme280_read_reg(BME280_CTRLHUM_REG, &ctrl_hum);
comres += bme280_read_reg(BME280_CTRLMEAS_REG, &ctrl_meas);
comres += bme280_read_reg(BME280_CONFIG_REG, &cfg);
if(comres)
return comres;
//switch to sleep mode for config reg write
if(BME280_GET_BITSLICE(ctrl_meas, BME280_CTRLMEAS_REG_MODE)!=BME280_SLEEP_MODE){
bme280_set_softreset();
sensor_delay_ms(3);
}
cfg = BME280_SET_BITSLICE(cfg, BME280_CONFIG_REG_TSB, p_bme280->t_sb);
cfg = BME280_SET_BITSLICE(cfg, BME280_CONFIG_REG_FILTER, p_bme280->filter);
comres += bme280_write_reg(BME280_CONFIG_REG, &cfg);
ctrl_hum = BME280_SET_BITSLICE(ctrl_hum, BME280_CTRLHUM_REG_OSRSH, p_bme280->osrs_h);
comres += bme280_write_reg(BME280_CTRLHUM_REG, &ctrl_hum);
ctrl_meas = BME280_SET_BITSLICE(ctrl_meas, BME280_CTRLMEAS_REG_OSRST, p_bme280->osrs_t);
ctrl_meas = BME280_SET_BITSLICE(ctrl_meas, BME280_CTRLMEAS_REG_OSRSP, p_bme280->osrs_p);
ctrl_meas = BME280_SET_BITSLICE(ctrl_meas, BME280_CTRLMEAS_REG_MODE, p_bme280->mode);
comres += bme280_write_reg(BME280_CTRLMEAS_REG, &ctrl_meas);
bme280_read_reg(BME280_CTRLHUM_REG, &ctrl_hum_check);
if(ctrl_hum_check!=ctrl_hum)
mismatch |= (1<<0);
bme280_read_reg(BME280_CTRLMEAS_REG, &ctrl_meas_check);
if(ctrl_meas_check!=ctrl_meas)
mismatch |= (1<<1);
bme280_read_reg(BME280_CONFIG_REG, &cfg_check);
if(cfg_check!=cfg)
mismatch |= (1<<2);
if(comres || mismatch){
pr_debug(LOG_MODULE_BME280, "set wm mismatch=%x", mismatch);
return DRV_RC_FAIL;
}
p_bme280->t_period_us = 1000;
if(p_bme280->osrs_t)
p_bme280->t_period_us += 2000*p_bme280->osrs_t;
if(p_bme280->osrs_p)
p_bme280->t_period_us += (2000*p_bme280->osrs_p+500);
if(p_bme280->osrs_h)
p_bme280->t_period_us += (2000*p_bme280->osrs_h+500);
switch(p_bme280->t_sb){
case 0:
p_bme280->t_period_us += 500;
break;
case 6:
p_bme280->t_period_us += 10000;
break;
case 7:
p_bme280->t_period_us += 20000;
break;
default:
p_bme280->t_period_us += (62500 << (p_bme280->t_sb-1));
}
sensor->odr_hz_x10 = (uint16_t)(10000000/p_bme280->t_period_us);
return DRV_RC_OK;
}
