/* physical register for arm archtecture */ static void arch_arm_init(cpu_t *cpu, cpu_archinfo_t *info, cpu_archrf_t *rf) { arm_opc_func_init(); // Basic Information info->name = "arm"; info->full_name = "arm_dyncom"; // This architecture is biendian, accept whatever the // client wants, override other flags. info->common_flags &= CPU_FLAG_ENDIAN_MASK; info->delay_slots = 0; // The byte size is 8bits. // The word size is 32bits. // The float size is 64bits. // The address size is 32bits. info->byte_size = 8; info->word_size = 32; info->float_size = 64; info->address_size = 32; // There are 16 32-bit GPRs info->register_count[CPU_REG_GPR] = MAX_REGNUM; info->register_size[CPU_REG_GPR] = info->word_size; // There is also 1 extra register to handle PSR. //info->register_count[CPU_REG_XR] = PPC_XR_SIZE; info->register_count[CPU_REG_XR] = 16; info->register_size[CPU_REG_XR] = 32; info->register_count[CPU_REG_SPR] = 8; info->register_size[CPU_REG_SPR] = 32; info->psr_size = 32; info->flags_count = 4; info->flags_layout = arm_flags_layout; cpu->redirection = false; //debug cpu_set_flags_debug(cpu, 0 // | CPU_DEBUG_PRINT_IR // | CPU_DEBUG_LOG ); cpu_set_flags_codegen(cpu, CPU_CODEGEN_TAG_LIMIT); /* Initilize different register set for different core */ set_memory_operator(arch_arm_read_memory, arch_arm_write_memory); }
void mips_dyncom_init(mips_core_t *core) { cpu_t* cpu = cpu_new(0, 0, arch_func_mips); /* init the reg structure */ cpu->rf.pc = &core->pc; cpu->rf.phys_pc = &core->pc; cpu->rf.grf = core->gpr; cpu->rf.frf = core->fpr; cpu->rf.srf = core->cp0; cpu_set_flags_debug(cpu, 0 | CPU_DEBUG_PRINT_IR | CPU_DEBUG_LOG ); cpu_set_flags_codegen(cpu, CPU_CODEGEN_TAG_LIMIT); cpu->cpu_data = (conf_object_t*)core; core->dyncom_cpu = get_conf_obj_by_cast(cpu, "cpu_t"); cpu->debug_func = mips_debug_func; sky_pref_t *pref = get_skyeye_pref(); set_memory_operator(arch_mips_read_memory, arch_mips_write_memory); if(pref->user_mode_sim){ //cpu->syscall_func = mips_dyncom_syscall; cpu->syscall_func = NULL; } else cpu->syscall_func = NULL; cpu->dyncom_engine->code_start = 0x0; cpu->dyncom_engine->code_end = 0x100000; cpu->dyncom_engine->code_entry = 0x0; return; }