void via6522_device::device_start()
{
m_in_a_handler.resolve();
m_in_b_handler.resolve();
m_out_a_handler.resolve_safe();
m_out_b_handler.resolve_safe();
m_ca1_handler.resolve();
m_cb1_handler.resolve_safe();
m_ca2_handler.resolve_safe();
m_cb2_handler.resolve_safe();
m_irq_handler.resolve_safe();
m_t1ll = 0xf3; /* via at 0x9110 in vic20 show these values */
m_t1lh = 0xb5; /* ports are not written by kernel! */
m_t2ll = 0xff; /* taken from vice */
m_t2lh = 0xff;
m_time2 = m_time1 = machine().time();
m_t1 = timer_alloc(TIMER_T1);
m_t2 = timer_alloc(TIMER_T2);
m_ca2_timer = timer_alloc(TIMER_CA2);
m_shift_timer = timer_alloc(TIMER_SHIFT);
m_pcr = 0;
/* Default clock is from CPU1 */
if (clock() == 0)
{
set_unscaled_clock(machine().firstcpu->clock());
}
/* save state register */
save_item(NAME(m_in_a));
save_item(NAME(m_in_ca1));
save_item(NAME(m_in_ca2));
save_item(NAME(m_out_a));
save_item(NAME(m_out_ca2));
save_item(NAME(m_ddr_a));
save_item(NAME(m_in_b));
save_item(NAME(m_in_cb1));
save_item(NAME(m_in_cb2));
save_item(NAME(m_out_b));
save_item(NAME(m_out_cb2));
save_item(NAME(m_ddr_b));
save_item(NAME(m_t1cl));
save_item(NAME(m_t1ch));
save_item(NAME(m_t1ll));
save_item(NAME(m_t1lh));
save_item(NAME(m_t2cl));
save_item(NAME(m_t2ch));
save_item(NAME(m_t2ll));
save_item(NAME(m_t2lh));
save_item(NAME(m_sr));
save_item(NAME(m_pcr));
save_item(NAME(m_acr));
save_item(NAME(m_ier));
save_item(NAME(m_ifr));
save_item(NAME(m_irq));
save_item(NAME(m_t1_active));
save_item(NAME(m_t2_active));
save_item(NAME(m_shift_counter));
}
void cbm2_expansion_slot_device::device_start()
{
m_card = dynamic_cast<device_cbm2_expansion_card_interface *>(get_card_device());
// inherit bus clock
if (clock() == 0)
{
cbm2_expansion_slot_device *root = machine().device<cbm2_expansion_slot_device>(CBM2_EXPANSION_SLOT_TAG);
assert(root);
set_unscaled_clock(root->clock());
}
}
void vic20_expansion_slot_device::device_start()
{
m_card = dynamic_cast<device_vic20_expansion_card_interface *>(get_card_device());
// resolve callbacks
m_write_irq.resolve_safe();
m_write_nmi.resolve_safe();
m_write_res.resolve_safe();
// inherit bus clock
if (clock() == 0)
{
vic20_expansion_slot_device *root = machine().device<vic20_expansion_slot_device>(VIC20_EXPANSION_SLOT_TAG);
assert(root);
set_unscaled_clock(root->clock());
}
}
void vic20_expansion_slot_device::device_start()
{
m_cart = dynamic_cast<device_vic20_expansion_card_interface *>(get_card_device());
// resolve callbacks
m_out_irq_func.resolve(m_out_irq_cb, *this);
m_out_nmi_func.resolve(m_out_nmi_cb, *this);
m_out_res_func.resolve(m_out_res_cb, *this);
// inherit bus clock
if (clock() == 0)
{
vic20_expansion_slot_device *root = machine().device<vic20_expansion_slot_device>(VIC20_EXPANSION_SLOT_TAG);
assert(root);
set_unscaled_clock(root->clock());
}
}
void plus4_expansion_slot_device::device_start()
{
m_card = dynamic_cast<device_plus4_expansion_card_interface *>(get_card_device());
// resolve callbacks
m_write_irq.resolve_safe();
m_read_dma_cd.resolve_safe(0xff);
m_write_dma_cd.resolve_safe();
m_write_aec.resolve_safe();
// inherit bus clock
if (clock() == 0)
{
plus4_expansion_slot_device *root = machine().device<plus4_expansion_slot_device>(PLUS4_EXPANSION_SLOT_TAG);
assert(root);
set_unscaled_clock(root->clock());
}
}
void plus4_expansion_slot_device::device_start()
{
m_cart = dynamic_cast<device_plus4_expansion_card_interface *>(get_card_device());
// resolve callbacks
m_in_dma_cd_func.resolve(m_in_dma_cd_cb, *this);
m_out_dma_cd_func.resolve(m_out_dma_cd_cb, *this);
m_out_irq_func.resolve(m_out_irq_cb, *this);
m_out_aec_func.resolve(m_out_aec_cb, *this);
// inherit bus clock
if (clock() == 0)
{
plus4_expansion_slot_device *root = machine().device<plus4_expansion_slot_device>(PLUS4_EXPANSION_SLOT_TAG);
assert(root);
set_unscaled_clock(root->clock());
}
}
void via6522_device::device_start()
{
devcb_resolve_read8(&m_in_a_func, &m_config.m_in_a_func, this);
devcb_resolve_read8(&m_in_b_func, &m_config.m_in_b_func, this);
devcb_resolve_read_line(&m_in_ca1_func, &m_config.m_in_ca1_func, this);
devcb_resolve_read_line(&m_in_cb1_func, &m_config.m_in_cb1_func, this);
devcb_resolve_read_line(&m_in_ca2_func, &m_config.m_in_ca2_func, this);
devcb_resolve_read_line(&m_in_cb2_func, &m_config.m_in_cb2_func, this);
devcb_resolve_write8(&m_out_a_func, &m_config.m_out_a_func, this);
devcb_resolve_write8(&m_out_b_func, &m_config.m_out_b_func, this);
devcb_resolve_write_line(&m_out_ca1_func, &m_config.m_out_ca1_func, this);
devcb_resolve_write_line(&m_out_cb1_func, &m_config.m_out_cb1_func, this);
devcb_resolve_write_line(&m_out_ca2_func, &m_config.m_out_ca2_func, this);
devcb_resolve_write_line(&m_out_cb2_func, &m_config.m_out_cb2_func, this);
devcb_resolve_write_line(&m_irq_func, &m_config.m_irq_func, this);
m_t1ll = 0xf3; /* via at 0x9110 in vic20 show these values */
m_t1lh = 0xb5; /* ports are not written by kernel! */
m_t2ll = 0xff; /* taken from vice */
m_t2lh = 0xff;
m_time2 = m_time1 = timer_get_time(&m_machine);
m_t1 = device_timer_alloc(*this, TIMER_T1);
m_t2 = device_timer_alloc(*this, TIMER_T2);
m_shift_timer = device_timer_alloc(*this, TIMER_SHIFT);
/* Default clock is from CPU1 */
if (clock() == 0)
{
set_unscaled_clock(m_machine.firstcpu->clock());
}
/* save state register */
state_save_register_device_item(this, 0, m_in_a);
state_save_register_device_item(this, 0, m_in_ca1);
state_save_register_device_item(this, 0, m_in_ca2);
state_save_register_device_item(this, 0, m_out_a);
state_save_register_device_item(this, 0, m_out_ca2);
state_save_register_device_item(this, 0, m_ddr_a);
state_save_register_device_item(this, 0, m_in_b);
state_save_register_device_item(this, 0, m_in_cb1);
state_save_register_device_item(this, 0, m_in_cb2);
state_save_register_device_item(this, 0, m_out_b);
state_save_register_device_item(this, 0, m_out_cb2);
state_save_register_device_item(this, 0, m_ddr_b);
state_save_register_device_item(this, 0, m_t1cl);
state_save_register_device_item(this, 0, m_t1ch);
state_save_register_device_item(this, 0, m_t1ll);
state_save_register_device_item(this, 0, m_t1lh);
state_save_register_device_item(this, 0, m_t2cl);
state_save_register_device_item(this, 0, m_t2ch);
state_save_register_device_item(this, 0, m_t2ll);
state_save_register_device_item(this, 0, m_t2lh);
state_save_register_device_item(this, 0, m_sr);
state_save_register_device_item(this, 0, m_pcr);
state_save_register_device_item(this, 0, m_acr);
state_save_register_device_item(this, 0, m_ier);
state_save_register_device_item(this, 0, m_ifr);
state_save_register_device_item(this, 0, m_t1_active);
state_save_register_device_item(this, 0, m_t2_active);
state_save_register_device_item(this, 0, m_shift_counter);
}
