/* Reset routine */
static t_stat scp300f_reset(DEVICE *dptr)
{
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
TRACE_PRINT(VERBOSE_MSG, ("SCP300F: Reset." NLP));
if(dptr->flags & DEV_DIS) { /* Disconnect I/O Ports */
sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &scp300fdev, TRUE);
sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &scp300f_mem, TRUE);
} else {
/* Connect SCP300F at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &scp300fdev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
/* Connect SCP300F Memory (512K RAM, 1MB FLASH) */
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &scp300f_mem, FALSE) != 0) {
printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->mem_base);
return SCPE_ARG;
}
/* Re-enable ROM */
scp300f_info->rom_enabled = 1;
}
return SCPE_OK;
}
/* Reset routine */
static t_stat if3_reset(DEVICE *dptr)
{
uint8 i;
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
if(dptr->flags & DEV_DIS) { /* Disconnect I/O Ports */
for(i=0;i<IF3_MAX_BOARDS;i++)
sim_cancel(&if3_unit[i]);
sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &if3dev, TRUE);
} else {
/* Connect IF3 at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &if3dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
for(i=0;i<IF3_MAX_BOARDS;i++) {
if3_unit[i].u3 = i; /* Store unit board ID in u3. Also guarantees that u3 < IF3_MAX_BOARDS */
if(if3_unit[i].flags & UNIT_IF3_CONNECT) {
TRACE_PRINT((RXIRQ_MSG|TXIRQ_MSG), ("IF3[%d]: IRQ polling started..." NLP, i));
sim_activate(&if3_unit[i], 200000); /* start Rx/Tx interrupt polling routine */
}
}
}
return SCPE_OK;
}
/* Reset routine */
static t_stat adcs6_reset(DEVICE *dptr)
{
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
if(dptr->flags & DEV_DIS) { /* Disconnect ROM and I/O Ports */
if (adcs6_hasProperty(UNIT_ADCS6_ROM)) {
sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &adcs6rom, TRUE);
}
/* Unmap I/O Ports (0x3-4,0x5-9,0x34,0x40 */
sim_map_resource(0x10, 4, RESOURCE_TYPE_IO, &adcs6_dma, TRUE);
sim_map_resource(0x04, 8, RESOURCE_TYPE_IO, &adcs6_timer, TRUE);
sim_map_resource(0x14, 1, RESOURCE_TYPE_IO, &adcs6_control, TRUE);
sim_map_resource(0x15, 7, RESOURCE_TYPE_IO, &adcs6_banksel, TRUE);
} else {
/* Connect ADCS6 ROM at base address */
if (adcs6_hasProperty(UNIT_ADCS6_ROM)) {
sim_debug(VERBOSE_MSG, &adcs6_dev, "ADCS6: ROM Enabled.\n");
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &adcs6rom, FALSE) != 0) {
printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
adcs6_info->rom_disabled = FALSE;
} else {
sim_debug(VERBOSE_MSG, &adcs6_dev, "ADCS6: ROM Disabled.\n");
adcs6_info->rom_disabled = TRUE;
}
/* Connect ADCS6 FDC Synchronization / Drive / Density Register */
if(sim_map_resource(0x14, 0x01, RESOURCE_TYPE_IO, &adcs6_control, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
/*#define ADCS6 */
#ifdef ADCS6
/* Connect ADCS6 Interrupt, and Aux Disk Registers */
if(sim_map_resource(0x10, 0x04, RESOURCE_TYPE_IO, &adcs6_dma, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
/* Connect ADCS6 Timer Registers */
if(sim_map_resource(0x04, 0x08, RESOURCE_TYPE_IO, &adcs6_timer, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
#endif
/* Connect ADCS6 Memory Management / Bank Select Register */
if(sim_map_resource(0x15, 0x7, RESOURCE_TYPE_IO, &adcs6_banksel, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
}
/* sim_activate (adcs6_unit, adcs6_unit->wait); */ /* requeue! */
return SCPE_OK;
}
static t_stat net_reset(DEVICE *dptr) {
uint32 i;
if (net_unit.flags & UNIT_ATT)
sim_activate(&net_unit, net_unit.wait); /* start poll */
for (i = 0; i <= MAX_CONNECTIONS; i++) {
serviceDescriptor_reset(i);
sim_map_resource(serviceDescriptor[i].Z80StatusPort, 1,
RESOURCE_TYPE_IO, &netStatus, dptr->flags & DEV_DIS);
sim_map_resource(serviceDescriptor[i].Z80DataPort, 1,
RESOURCE_TYPE_IO, &netData, dptr->flags & DEV_DIS);
}
return SCPE_OK;
}
/* Reset routine */
static t_stat hdsk_reset(DEVICE *dptr) {
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
if (dptr->flags & DEV_DIS) {
sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &hdsk_io, TRUE);
} else {
/* Connect HDSK at base address */
if (sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &hdsk_io, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->mem_base);
dptr->flags |= DEV_DIS;
return SCPE_ARG;
}
}
return SCPE_OK;
}
/* Reset routine */
static t_stat i8272_reset(DEVICE *dptr)
{
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
if(dptr->flags & DEV_DIS) { /* Disconnect I/O Ports */
sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &i8272dev, TRUE);
} else {
/* Connect I/O Ports at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &i8272dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
}
return SCPE_OK;
}
static t_stat dsk_reset(DEVICE *dptr) {
int32 i;
for (i = 0; i < NUM_OF_DSK; i++) {
warnLock[i] = 0;
warnAttached[i] = 0;
}
warnDSK10 = 0;
warnDSK11 = 0;
warnDSK12 = 0;
current_disk = NUM_OF_DSK;
in9_count = 0;
in9_message = FALSE;
sim_map_resource(0x08, 1, RESOURCE_TYPE_IO, &dsk10, dptr->flags & DEV_DIS);
sim_map_resource(0x09, 1, RESOURCE_TYPE_IO, &dsk11, dptr->flags & DEV_DIS);
sim_map_resource(0x0A, 1, RESOURCE_TYPE_IO, &dsk12, dptr->flags & DEV_DIS);
return SCPE_OK;
}
/* Reset routine */
static t_stat disk3_reset(DEVICE *dptr)
{
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
if(dptr->flags & DEV_DIS) { /* Disconnect I/O Ports */
sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &disk3dev, TRUE);
} else {
/* Connect DISK3 at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &disk3dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
}
disk3_info->link_addr = 0x50; /* After RESET, the link pointer is at 0x50. */
return SCPE_OK;
}
/* Reset routine */
t_stat mdsad_reset(DEVICE *dptr)
{
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
if(dptr->flags & DEV_DIS) {
sim_map_resource(pnp->mem_base, pnp->mem_size,
RESOURCE_TYPE_MEMORY, &mdsaddev, TRUE);
} else {
/* Connect MDSAD at base address */
if(sim_map_resource(pnp->mem_base, pnp->mem_size,
RESOURCE_TYPE_MEMORY, &mdsaddev, FALSE) != 0) {
printf("%s: error mapping resource at 0x%04x\n",
__FUNCTION__, pnp->mem_base);
dptr->flags |= DEV_DIS;
return SCPE_ARG;
}
}
return SCPE_OK;
}
/* Reset routine */
t_stat mfdc_reset(DEVICE *dptr)
{
uint8 i;
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
if(dptr->flags & DEV_DIS) {
sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &mdskdev, TRUE);
} else {
/* Connect MFDC at base address */
for(i = 0; i < MFDC_MAX_DRIVES; i++) {
mfdc_info->drive[i].uptr = &mfdc_dev.units[i];
}
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &mdskdev, FALSE) != 0) {
printf("%s: error mapping resource at 0x%04x\n", __FUNCTION__, pnp->mem_base);
dptr->flags |= DEV_DIS;
return SCPE_ARG;
}
}
return SCPE_OK;
}
/* Reset routine */
static t_stat mdriveh_reset(DEVICE *dptr)
{
uint8 i;
PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt;
if(dptr->flags & DEV_DIS) { /* Disconnect ROM and I/O Ports */
sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &mdrivehdev, TRUE);
} else {
/* Connect MDRIVEH at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &mdrivehdev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG;
}
}
for(i=0; i<MDRIVEH_MAX_DRIVES; i++) {
mdriveh_info->uptr[i] = dptr->units[i];
if((dptr->flags & DEV_DIS) || (dptr->units[i].flags & UNIT_DIS)) {
if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)
printf("MDRIVEH: Unit %d disabled", i);
if(mdriveh_info->storage[i] != NULL) {
if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)
printf(", freed 0x%p\n", mdriveh_info->storage[i]);
free(mdriveh_info->storage[i]);
mdriveh_info->storage[i] = NULL;
} else if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE) {
printf(".\n");
}
} else {
if(mdriveh_info->storage[i] == NULL) {
mdriveh_info->storage[i] = calloc(1, 524288);
}
if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)
printf("MDRIVEH: Unit %d enabled, 512K at 0x%p\n", i, mdriveh_info->storage[i]);
}
}
return SCPE_OK;
}