static int smm_load_handlers(void) { /* All range registers are aligned to 4KiB */ const uint32_t rmask = ~((1 << 12) - 1); const struct pattrs *pattrs = pattrs_get(); /* Initialize global tracking state. */ relo_attrs.smbase = (uint32_t)smm_region_start(); relo_attrs.smrr_base = relo_attrs.smbase | MTRR_TYPE_WRBACK; relo_attrs.smrr_mask = ~(smm_region_size() - 1) & rmask; relo_attrs.smrr_mask |= MTRR_PHYS_MASK_VALID; /* Install handlers. */ if (install_relocation_handler(pattrs->num_cpus) < 0) { printk(BIOS_ERR, "Unable to install SMM relocation handler.\n"); return -1; } if (install_permanent_handler(pattrs->num_cpus) < 0) { printk(BIOS_ERR, "Unable to install SMM permanent handler.\n"); return -1; } /* Ensure the SMM handlers hit DRAM before performing first SMI. */ wbinvd(); return 0; }
static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { /* All range registers are aligned to 4KiB */ const uint32_t rmask = ~((1 << 12) - 1); /* Initialize global tracking state. */ relo_attrs.smbase = (uint32_t)smm_region_start(); relo_attrs.smrr_base = relo_attrs.smbase | MTRR_TYPE_WRBACK; relo_attrs.smrr_mask = ~(smm_region_size() - 1) & rmask; relo_attrs.smrr_mask |= MTRR_PHYS_MASK_VALID; *perm_smbase = relo_attrs.smbase; *perm_smsize = smm_region_size() - CONFIG_SMM_RESERVED_SIZE; *smm_save_state_size = sizeof(em64t100_smm_state_save_area_t); }
void smm_region(void **start, size_t *size) { *start = (void *)smm_region_start(); *size = smm_region_size(); }
void *cbmem_top(void) { return (void *)smm_region_start(); }
static size_t smm_region_size(void) { uintptr_t smm_end = ALIGN_DOWN(pci_read_config32(NB_DEV_ROOT, BGSM), 1*MiB); return smm_end - smm_region_start(); }
void *cbmem_top(void) { return (void *) (smm_region_start() - FSP_RESERVE_MEMORY_SIZE); }