static int mi0343_init(struct sn9c102_device* cam) { struct sn9c102_sensor* s = sn9c102_get_sensor(cam); int err = 0; err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11}, {0x0a, 0x14}, {0x40, 0x01}, {0x20, 0x17}, {0x07, 0x18}, {0xa0, 0x19}); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, 0x00, 0x01, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, 0x00, 0x00, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x03, 0x01, 0xe1, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x04, 0x02, 0x81, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x05, 0x00, 0x17, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x06, 0x00, 0x11, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x62, 0x04, 0x9a, 0, 0); return err; }
static int mi0343_init(struct sn9c102_device* cam) { int err = 0; err += sn9c102_write_reg(cam, 0x00, 0x10); err += sn9c102_write_reg(cam, 0x00, 0x11); err += sn9c102_write_reg(cam, 0x0a, 0x14); err += sn9c102_write_reg(cam, 0x40, 0x01); err += sn9c102_write_reg(cam, 0x20, 0x17); err += sn9c102_write_reg(cam, 0x07, 0x18); err += sn9c102_write_reg(cam, 0xa0, 0x19); err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x0d, 0x00, 0x01, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x0d, 0x00, 0x00, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x03, 0x01, 0xe1, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x04, 0x02, 0x81, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x05, 0x00, 0x17, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x06, 0x00, 0x11, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x62, 0x04, 0x9a, 0, 0); return err; }
static int mi0343_set_pix_format(struct sn9c102_device* cam, const struct v4l2_pix_format* pix) { struct sn9c102_sensor* s = sn9c102_get_sensor(cam); int err = 0; if (pix->pixelformat == V4L2_PIX_FMT_SN9C10X) { err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0a, 0x00, 0x03, 0, 0); err += sn9c102_write_reg(cam, 0x20, 0x19); } else { err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0a, 0x00, 0x05, 0, 0); err += sn9c102_write_reg(cam, 0xa0, 0x19); } return err; }
static int mi0360_set_ctrl(struct sn9c102_device *cam, const struct v4l2_control *ctrl) { struct sn9c102_sensor *s = sn9c102_get_sensor(cam); int err = 0; switch (ctrl->id) { case V4L2_CID_EXPOSURE: err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x09, ctrl->value, 0x00, 0, 0); break; case V4L2_CID_GAIN: err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x35, 0x03, ctrl->value, 0, 0); break; case V4L2_CID_RED_BALANCE: err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x2c, 0x03, ctrl->value, 0, 0); break; case V4L2_CID_BLUE_BALANCE: err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x2d, 0x03, ctrl->value, 0, 0); break; case SN9C102_V4L2_CID_GREEN_BALANCE: err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x2b, 0x03, ctrl->value, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x2e, 0x03, ctrl->value, 0, 0); break; case V4L2_CID_HFLIP: err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x20, ctrl->value ? 0x40:0x00, ctrl->value ? 0x20:0x00, 0, 0); break; case V4L2_CID_VFLIP: err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x20, ctrl->value ? 0x80:0x00, ctrl->value ? 0x80:0x00, 0, 0); break; default: return -EINVAL; } return err ? -EIO : 0; }
static int tas5130d1b_init(struct sn9c102_device* cam) { int err = 0; err += sn9c102_write_reg(cam, 0x01, 0x01); err += sn9c102_write_reg(cam, 0x20, 0x17); err += sn9c102_write_reg(cam, 0x04, 0x01); err += sn9c102_write_reg(cam, 0x01, 0x10); err += sn9c102_write_reg(cam, 0x00, 0x11); err += sn9c102_write_reg(cam, 0x00, 0x14); err += sn9c102_write_reg(cam, 0x60, 0x17); err += sn9c102_write_reg(cam, 0x07, 0x18); err += sn9c102_write_reg(cam, 0x33, 0x19); err += sn9c102_i2c_try_raw_write(cam, &tas5130d1b, 4, 0x11, 0x00, 0x40, 0x47, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &tas5130d1b, 4, 0x11, 0x02, 0x20, 0xa9, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &tas5130d1b, 4, 0x11, 0x00, 0xc0, 0x49, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &tas5130d1b, 4, 0x11, 0x02, 0x20, 0x6c, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &tas5130d1b, 4, 0x11, 0x00, 0xc0, 0x08, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &tas5130d1b, 4, 0x11, 0x00, 0x20, 0x00, 0, 0); err += sn9c102_write_reg(cam, 0x63, 0x19); return err; }
static int tas5110c1b_set_ctrl(struct sn9c102_device* cam, const struct v4l2_control* ctrl) { switch (ctrl->id) { case V4L2_CID_GAIN: return sn9c102_i2c_try_raw_write(cam, &tas5110c1b, 4, 0x11, 0x02, 0x20, 0xff - (ctrl->value & 0xff), 0, 0); default: return -EINVAL; } }
static int mi0360_set_pix_format(struct sn9c102_device *cam, const struct v4l2_pix_format *pix) { struct sn9c102_sensor *s = sn9c102_get_sensor(cam); int err = 0; if (pix->pixelformat == V4L2_PIX_FMT_SBGGR8) { err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0a, 0x00, 0x05, 0, 0); err += sn9c102_write_reg(cam, 0x60, 0x19); if (sn9c102_get_bridge(cam) == BRIDGE_SN9C105 || sn9c102_get_bridge(cam) == BRIDGE_SN9C120) err += sn9c102_write_reg(cam, 0xa6, 0x17); } else { err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0a, 0x00, 0x02, 0, 0); err += sn9c102_write_reg(cam, 0x20, 0x19); if (sn9c102_get_bridge(cam) == BRIDGE_SN9C105 || sn9c102_get_bridge(cam) == BRIDGE_SN9C120) err += sn9c102_write_reg(cam, 0xa2, 0x17); } return err; }
static int tas5110c1b_init(struct sn9c102_device* cam) { int err = 0; err += sn9c102_write_reg(cam, 0x01, 0x01); err += sn9c102_write_reg(cam, 0x44, 0x01); err += sn9c102_write_reg(cam, 0x00, 0x10); err += sn9c102_write_reg(cam, 0x00, 0x11); err += sn9c102_write_reg(cam, 0x0a, 0x14); err += sn9c102_write_reg(cam, 0x60, 0x17); err += sn9c102_write_reg(cam, 0x06, 0x18); err += sn9c102_write_reg(cam, 0xfb, 0x19); err += sn9c102_i2c_try_raw_write(cam, &tas5110c1b, 4, 0x11, 0x00, 0xc0, 0x80, 0, 0); return err; }
static int mt9v111_set_ctrl(struct sn9c102_device *cam, const struct v4l2_control *ctrl) { struct sn9c102_sensor *s = sn9c102_get_sensor(cam); int err = 0; switch (ctrl->id) { case V4L2_CID_VFLIP: err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x20, ctrl->value ? 0x80 : 0x00, ctrl->value ? 0x80 : 0x00, 0, 0); break; default: return -EINVAL; } return err ? -EIO : 0; }
int sn9c102_probe_mt9v111(struct sn9c102_device *cam) { u8 data[2]; int err = 0; err += sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1}, {0x29, 0x01}, {0x42, 0x17}, {0x62, 0x17}, {0x08, 0x01}); err += sn9c102_i2c_try_raw_write(cam, &mt9v111, 4, mt9v111.i2c_slave_id, 0x01, 0x00, 0x04, 0, 0); if (err || sn9c102_i2c_try_raw_read(cam, &mt9v111, mt9v111.i2c_slave_id, 0x36, 2, data) < 0) return -EIO; if (data[0] != 0x82 || data[1] != 0x3a) return -ENODEV; sn9c102_attach_sensor(cam, &mt9v111); return 0; }
static int mi0343_set_ctrl(struct sn9c102_device* cam, const struct v4l2_control* ctrl) { u16 reg = 0; int err = 0; switch (ctrl->id) { case V4L2_CID_GAIN: case V4L2_CID_RED_BALANCE: case V4L2_CID_BLUE_BALANCE: case SN9C102_V4L2_CID_GREEN_BALANCE: if (ctrl->value <= (0x3f-0x10)) reg = 0x10 + ctrl->value; else if (ctrl->value <= ((0x3f-0x10) + (0x7f-0x60))) reg = 0x60 + (ctrl->value - (0x3f-0x10)); else reg = 0xe0 + (ctrl->value - (0x3f-0x10) - (0x7f-0x60)); break; } switch (ctrl->id) { case V4L2_CID_EXPOSURE: err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x09, ctrl->value, 0x00, 0, 0); break; case V4L2_CID_GAIN: err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x35, reg >> 8, reg & 0xff, 0, 0); break; case V4L2_CID_HFLIP: err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x20, ctrl->value ? 0x40:0x00, ctrl->value ? 0x20:0x00, 0, 0); break; case V4L2_CID_VFLIP: err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x20, ctrl->value ? 0x80:0x00, ctrl->value ? 0x80:0x00, 0, 0); break; case V4L2_CID_RED_BALANCE: err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x2d, reg >> 8, reg & 0xff, 0, 0); break; case V4L2_CID_BLUE_BALANCE: err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x2c, reg >> 8, reg & 0xff, 0, 0); break; case SN9C102_V4L2_CID_GREEN_BALANCE: err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x2b, reg >> 8, reg & 0xff, 0, 0); err += sn9c102_i2c_try_raw_write(cam, &mi0343, 4, mi0343.i2c_slave_id, 0x2e, reg >> 8, reg & 0xff, 0, 0); break; default: return -EINVAL; } return err ? -EIO : 0; }
static int mi0360_init(struct sn9c102_device *cam) { struct sn9c102_sensor *s = sn9c102_get_sensor(cam); int err = 0; switch (sn9c102_get_bridge(cam)) { case BRIDGE_SN9C103: err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11}, {0x0a, 0x14}, {0x40, 0x01}, {0x20, 0x17}, {0x07, 0x18}, {0xa0, 0x19}, {0x02, 0x1c}, {0x03, 0x1d}, {0x0f, 0x1e}, {0x0c, 0x1f}, {0x00, 0x20}, {0x10, 0x21}, {0x20, 0x22}, {0x30, 0x23}, {0x40, 0x24}, {0x50, 0x25}, {0x60, 0x26}, {0x70, 0x27}, {0x80, 0x28}, {0x90, 0x29}, {0xa0, 0x2a}, {0xb0, 0x2b}, {0xc0, 0x2c}, {0xd0, 0x2d}, {0xe0, 0x2e}, {0xf0, 0x2f}, {0xff, 0x30}); break; case BRIDGE_SN9C105: case BRIDGE_SN9C120: err = sn9c102_write_const_regs(cam, {0x44, 0x01}, {0x40, 0x02}, {0x00, 0x03}, {0x1a, 0x04}, {0x50, 0x05}, {0x20, 0x06}, {0x10, 0x07}, {0x03, 0x10}, {0x08, 0x14}, {0xa2, 0x17}, {0x47, 0x18}, {0x00, 0x19}, {0x1d, 0x1a}, {0x10, 0x1b}, {0x02, 0x1c}, {0x03, 0x1d}, {0x0f, 0x1e}, {0x0c, 0x1f}, {0x00, 0x20}, {0x29, 0x21}, {0x40, 0x22}, {0x54, 0x23}, {0x66, 0x24}, {0x76, 0x25}, {0x85, 0x26}, {0x94, 0x27}, {0xa1, 0x28}, {0xae, 0x29}, {0xbb, 0x2a}, {0xc7, 0x2b}, {0xd3, 0x2c}, {0xde, 0x2d}, {0xea, 0x2e}, {0xf4, 0x2f}, {0xff, 0x30}, {0x00, 0x3F}, {0xC7, 0x40}, {0x01, 0x41}, {0x44, 0x42}, {0x00, 0x43}, {0x44, 0x44}, {0x00, 0x45}, {0x44, 0x46}, {0x00, 0x47}, {0xC7, 0x48}, {0x01, 0x49}, {0xC7, 0x4A}, {0x01, 0x4B}, {0xC7, 0x4C}, {0x01, 0x4D}, {0x44, 0x4E}, {0x00, 0x4F}, {0x44, 0x50}, {0x00, 0x51}, {0x44, 0x52}, {0x00, 0x53}, {0xC7, 0x54}, {0x01, 0x55}, {0xC7, 0x56}, {0x01, 0x57}, {0xC7, 0x58}, {0x01, 0x59}, {0x44, 0x5A}, {0x00, 0x5B}, {0x44, 0x5C}, {0x00, 0x5D}, {0x44, 0x5E}, {0x00, 0x5F}, {0xC7, 0x60}, {0x01, 0x61}, {0xC7, 0x62}, {0x01, 0x63}, {0xC7, 0x64}, {0x01, 0x65}, {0x44, 0x66}, {0x00, 0x67}, {0x44, 0x68}, {0x00, 0x69}, {0x44, 0x6A}, {0x00, 0x6B}, {0xC7, 0x6C}, {0x01, 0x6D}, {0xC7, 0x6E}, {0x01, 0x6F}, {0xC7, 0x70}, {0x01, 0x71}, {0x44, 0x72}, {0x00, 0x73}, {0x44, 0x74}, {0x00, 0x75}, {0x44, 0x76}, {0x00, 0x77}, {0xC7, 0x78}, {0x01, 0x79}, {0xC7, 0x7A}, {0x01, 0x7B}, {0xC7, 0x7C}, {0x01, 0x7D}, {0x44, 0x7E}, {0x00, 0x7F}, {0x14, 0x84}, {0x00, 0x85}, {0x27, 0x86}, {0x00, 0x87}, {0x07, 0x88}, {0x00, 0x89}, {0xEC, 0x8A}, {0x0f, 0x8B}, {0xD8, 0x8C}, {0x0f, 0x8D}, {0x3D, 0x8E}, {0x00, 0x8F}, {0x3D, 0x90}, {0x00, 0x91}, {0xCD, 0x92}, {0x0f, 0x93}, {0xf7, 0x94}, {0x0f, 0x95}, {0x0C, 0x96}, {0x00, 0x97}, {0x00, 0x98}, {0x66, 0x99}, {0x05, 0x9A}, {0x00, 0x9B}, {0x04, 0x9C}, {0x00, 0x9D}, {0x08, 0x9E}, {0x00, 0x9F}, {0x2D, 0xC0}, {0x2D, 0xC1}, {0x3A, 0xC2}, {0x05, 0xC3}, {0x04, 0xC4}, {0x3F, 0xC5}, {0x00, 0xC6}, {0x00, 0xC7}, {0x50, 0xC8}, {0x3C, 0xC9}, {0x28, 0xCA}, {0xD8, 0xCB}, {0x14, 0xCC}, {0xEC, 0xCD}, {0x32, 0xCE}, {0xDD, 0xCF}, {0x32, 0xD0}, {0xDD, 0xD1}, {0x6A, 0xD2}, {0x50, 0xD3}, {0x00, 0xD4}, {0x00, 0xD5}, {0x00, 0xD6}); break; default: break; } err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, 0x00, 0x01, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, 0x00, 0x00, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x03, 0x01, 0xe1, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x04, 0x02, 0x81, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x05, 0x00, 0x17, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x06, 0x00, 0x11, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x62, 0x04, 0x9a, 0, 0); return err; }
static int mt9v111_init(struct sn9c102_device *cam) { struct sn9c102_sensor *s = sn9c102_get_sensor(cam); int err = 0; err = sn9c102_write_const_regs(cam, {0x44, 0x01}, {0x40, 0x02}, {0x00, 0x03}, {0x1a, 0x04}, {0x1f, 0x05}, {0x20, 0x06}, {0x1f, 0x07}, {0x81, 0x08}, {0x5c, 0x09}, {0x00, 0x0a}, {0x00, 0x0b}, {0x00, 0x0c}, {0x00, 0x0d}, {0x00, 0x0e}, {0x00, 0x0f}, {0x03, 0x10}, {0x00, 0x11}, {0x00, 0x12}, {0x02, 0x13}, {0x14, 0x14}, {0x28, 0x15}, {0x1e, 0x16}, {0xe2, 0x17}, {0x06, 0x18}, {0x00, 0x19}, {0x00, 0x1a}, {0x00, 0x1b}, {0x08, 0x20}, {0x39, 0x21}, {0x51, 0x22}, {0x63, 0x23}, {0x73, 0x24}, {0x82, 0x25}, {0x8f, 0x26}, {0x9b, 0x27}, {0xa7, 0x28}, {0xb1, 0x29}, {0xbc, 0x2a}, {0xc6, 0x2b}, {0xcf, 0x2c}, {0xd8, 0x2d}, {0xe1, 0x2e}, {0xea, 0x2f}, {0xf2, 0x30}, {0x13, 0x84}, {0x00, 0x85}, {0x25, 0x86}, {0x00, 0x87}, {0x07, 0x88}, {0x00, 0x89}, {0xee, 0x8a}, {0x0f, 0x8b}, {0xe5, 0x8c}, {0x0f, 0x8d}, {0x2e, 0x8e}, {0x00, 0x8f}, {0x30, 0x90}, {0x00, 0x91}, {0xd4, 0x92}, {0x0f, 0x93}, {0xfc, 0x94}, {0x0f, 0x95}, {0x14, 0x96}, {0x00, 0x97}, {0x00, 0x98}, {0x60, 0x99}, {0x07, 0x9a}, {0x40, 0x9b}, {0x20, 0x9c}, {0x00, 0x9d}, {0x00, 0x9e}, {0x00, 0x9f}, {0x2d, 0xc0}, {0x2d, 0xc1}, {0x3a, 0xc2}, {0x05, 0xc3}, {0x04, 0xc4}, {0x3f, 0xc5}, {0x00, 0xc6}, {0x00, 0xc7}, {0x50, 0xc8}, {0x3c, 0xc9}, {0x28, 0xca}, {0xd8, 0xcb}, {0x14, 0xcc}, {0xec, 0xcd}, {0x32, 0xce}, {0xdd, 0xcf}, {0x2d, 0xd0}, {0xdd, 0xd1}, {0x6a, 0xd2}, {0x50, 0xd3}, {0x60, 0xd4}, {0x00, 0xd5}, {0x00, 0xd6}); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x01, 0x00, 0x01, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, 0x00, 0x01, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, 0x00, 0x00, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x08, 0x04, 0x80, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x01, 0x00, 0x04, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x08, 0x00, 0x08, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x02, 0x00, 0x16, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x03, 0x01, 0xe7, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x04, 0x02, 0x87, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x06, 0x00, 0x40, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x05, 0x00, 0x09, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x07, 0x30, 0x02, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0c, 0x00, 0x00, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x12, 0x00, 0xb0, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x13, 0x00, 0x7c, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x1e, 0x00, 0x00, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x20, 0x00, 0x00, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x20, 0x00, 0x00, 0, 0); err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x01, 0x00, 0x04, 0, 0); return err; }