static void __init arch_mem_init(char **cmdline_p)
{
extern void plat_mem_setup(void);
/* call board setup routine */
plat_mem_setup();
pr_info("Determined physical RAM map:\n");
print_memory_map();
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
if (usermem) {
pr_info("User-defined physical RAM map:\n");
print_memory_map();
}
bootmem_init();
device_tree_init();
sparse_init();
plat_swiotlb_setup();
paging_init();
}
static void __init arch_mem_init(char **cmdline_p)
{
extern void plat_mem_setup(void);
/* call board setup routine */
plat_mem_setup();
pr_info("Determined physical RAM map:\n");
print_memory_map();
strlcpy(command_line, arcs_cmdline, sizeof(command_line));
strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
if (usermem) {
pr_info("User-defined physical RAM map:\n");
print_memory_map();
}
bootmem_init();
#ifndef CONFIG_NLM_16G_MEM_SUPPORT
#ifndef CONFIG_NUMA
setup_mapped_kernel_tlbs(FALSE, TRUE);
#endif
#endif
sparse_init();
paging_init();
}
/*
* paging_init() sets up the page tables
*/
void __init paging_init(void)
{
unsigned long max_zone_pfns[MAX_NR_ZONES];
unsigned long pgd_type, asce_bits;
psw_t psw;
init_mm.pgd = swapper_pg_dir;
if (VMALLOC_END > _REGION2_SIZE) {
asce_bits = _ASCE_TYPE_REGION2 | _ASCE_TABLE_LENGTH;
pgd_type = _REGION2_ENTRY_EMPTY;
} else {
asce_bits = _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
pgd_type = _REGION3_ENTRY_EMPTY;
}
init_mm.context.asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
S390_lowcore.kernel_asce = init_mm.context.asce;
crst_table_init((unsigned long *) init_mm.pgd, pgd_type);
vmem_map_init();
/* enable virtual mapping in kernel mode */
__ctl_load(S390_lowcore.kernel_asce, 1, 1);
__ctl_load(S390_lowcore.kernel_asce, 7, 7);
__ctl_load(S390_lowcore.kernel_asce, 13, 13);
psw.mask = __extract_psw();
psw_bits(psw).dat = 1;
psw_bits(psw).as = PSW_BITS_AS_HOME;
__load_psw_mask(psw.mask);
sparse_memory_present_with_active_regions(MAX_NUMNODES);
sparse_init();
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS);
max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
free_area_init_nodes(max_zone_pfns);
}
static void __init arch_mem_init(char **cmdline_p)
{
extern void plat_mem_setup(void);
/* call board setup routine */
plat_mem_setup();
printk("Determined physical RAM map:\n");
print_memory_map();
strlcpy(command_line, arcs_cmdline, sizeof(command_line));
strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
if (usermem) {
printk("User-defined physical RAM map:\n");
print_memory_map();
}
bootmem_init();
#ifdef CONFIG_SPARSEMEM
sparse_memory_present_with_active_regions(MAX_NUMNODES);
#endif
sparse_init();
paging_init();
}
void __init paging_init(void)
{
static const int ssm_mask = 0x04000000L;
unsigned long max_zone_pfns[MAX_NR_ZONES];
unsigned long pgd_type;
init_mm.pgd = swapper_pg_dir;
S390_lowcore.kernel_asce = __pa(init_mm.pgd) & PAGE_MASK;
#ifdef CONFIG_64BIT
/* A three level page table (4TB) is enough for the kernel space. */
S390_lowcore.kernel_asce |= _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
pgd_type = _REGION3_ENTRY_EMPTY;
#else
S390_lowcore.kernel_asce |= _ASCE_TABLE_LENGTH;
pgd_type = _SEGMENT_ENTRY_EMPTY;
#endif
clear_table((unsigned long *) init_mm.pgd, pgd_type,
sizeof(unsigned long)*2048);
vmem_map_init();
/* enable virtual mapping in kernel mode */
__ctl_load(S390_lowcore.kernel_asce, 1, 1);
__ctl_load(S390_lowcore.kernel_asce, 7, 7);
__ctl_load(S390_lowcore.kernel_asce, 13, 13);
__raw_local_irq_ssm(ssm_mask);
sparse_memory_present_with_active_regions(MAX_NUMNODES);
sparse_init();
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
#ifdef CONFIG_ZONE_DMA
max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS);
#endif
max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
free_area_init_nodes(max_zone_pfns);
}
/*
* paging_init() sets up the page tables
*/
void __init paging_init(void)
{
unsigned long max_zone_pfns[MAX_NR_ZONES];
unsigned long pgd_type, asce_bits;
init_mm.pgd = swapper_pg_dir;
if (VMALLOC_END > (1UL << 42)) {
asce_bits = _ASCE_TYPE_REGION2 | _ASCE_TABLE_LENGTH;
pgd_type = _REGION2_ENTRY_EMPTY;
} else {
asce_bits = _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
pgd_type = _REGION3_ENTRY_EMPTY;
}
S390_lowcore.kernel_asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
clear_table((unsigned long *) init_mm.pgd, pgd_type,
sizeof(unsigned long)*2048);
vmem_map_init();
/* enable virtual mapping in kernel mode */
__ctl_load(S390_lowcore.kernel_asce, 1, 1);
__ctl_load(S390_lowcore.kernel_asce, 7, 7);
__ctl_load(S390_lowcore.kernel_asce, 13, 13);
__arch_local_irq_stosm(0x04);
sparse_memory_present_with_active_regions(MAX_NUMNODES);
sparse_init();
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS);
max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
free_area_init_nodes(max_zone_pfns);
}
void __init paging_init(void)
{
unsigned long max_zone_pfns[MAX_NR_ZONES];
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
max_zone_pfns[ZONE_NORMAL] = end_pfn;
memory_present(0, 0, end_pfn);
sparse_init();
free_area_init_nodes(max_zone_pfns);
}
/*
* Called into from start_kernel, after lock_kernel has been called.
* Initializes bootmem, which is unsed to manage page allocation until
* mem_init is called.
*/
void __init setup_arch(char **cmdline_p)
{
ppc64_boot_msg(0x12, "Setup Arch");
*cmdline_p = cmd_line;
/*
* Set cache line size based on type of cpu as a default.
* Systems with OF can look in the properties on the cpu node(s)
* for a possibly more accurate value.
*/
dcache_bsize = ppc64_caches.dline_size;
icache_bsize = ppc64_caches.iline_size;
/* reboot on panic */
panic_timeout = 180;
if (ppc_md.panic)
setup_panic();
init_mm.start_code = (unsigned long)_stext;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
init_mm.brk = klimit;
irqstack_early_init();
exc_lvl_early_init();
emergency_stack_init();
#ifdef CONFIG_PPC_STD_MMU_64
stabs_alloc();
#endif
/* set up the bootmem stuff with available memory */
do_init_bootmem();
sparse_init();
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
#endif
if (ppc_md.setup_arch)
ppc_md.setup_arch();
paging_init();
/* Initialize the MMU context management stuff */
mmu_context_init();
ppc64_boot_msg(0x15, "Setup Done");
}
static void __init arch_mem_init(char **cmdline_p)
{
extern void plat_mem_setup(void);
phys_t init_mem, init_end, init_size;
/* call board setup routine */
plat_mem_setup();
init_mem = PFN_UP(__pa_symbol(&__init_begin)) << PAGE_SHIFT;
init_end = PFN_DOWN(__pa_symbol(&__init_end)) << PAGE_SHIFT;
init_size = init_end - init_mem;
if (init_size) {
/* Make sure it is in the boot_mem_map */
int i, found;
found = 0;
for (i = 0; i < boot_mem_map.nr_map; i++) {
if (init_mem >= boot_mem_map.map[i].addr &&
init_mem < (boot_mem_map.map[i].addr +
boot_mem_map.map[i].size)) {
found = 1;
break;
}
}
if (!found)
add_memory_region(init_mem, init_size,
BOOT_MEM_INIT_RAM);
}
printk("Determined physical RAM map:\n");
print_memory_map();
strlcpy(command_line, arcs_cmdline, sizeof(command_line));
strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
if (usermem) {
printk("User-defined physical RAM map:\n");
print_memory_map();
}
bootmem_init();
sparse_init();
paging_init();
}
static void __init arch_mem_init(char **cmdline_p)
{
extern void plat_mem_setup(void);
/* call board setup routine */
plat_mem_setup();
pr_info("Determined physical RAM map:\n");
print_memory_map();
#ifdef CONFIG_CMDLINE_BOOL
#ifdef CONFIG_CMDLINE_OVERRIDE
strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
#else
if (builtin_cmdline[0]) {
strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE);
}
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
#endif
#else
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
#endif
strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
if (usermem) {
pr_info("User-defined physical RAM map:\n");
print_memory_map();
}
bootmem_init();
#if defined (CONFIG_RALINK_MT7621) && defined (CONFIG_RT2880_DRAM_512M)
reserve_bootmem(0x1C000000, 64*1024*1024, BOOTMEM_DEFAULT);
#endif
device_tree_init();
sparse_init();
plat_swiotlb_setup();
paging_init();
}
static void __init arch_mem_init(char **cmdline_p)
{
extern void plat_mem_setup(void);
/* call board setup routine */
plat_mem_setup();
pr_info("Determined physical RAM map:\n");
print_memory_map();
#ifdef CONFIG_CMDLINE_BOOL
#ifdef CONFIG_CMDLINE_OVERRIDE
strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
#else
if (builtin_cmdline[0]) {
strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE);
}
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
#endif
#else
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
#endif
strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
if (usermem) {
pr_info("User-defined physical RAM map:\n");
print_memory_map();
}
bootmem_init();
sparse_init();
paging_init();
#ifdef CONFIG_DUMP_PREV_OOPS_MSG
reserve_bootmem(CPHYSADDR(CONFIG_DUMP_PREV_OOPS_MSG_BUF_ADDR), CONFIG_DUMP_PREV_OOPS_MSG_BUF_LEN, BOOTMEM_DEFAULT);
#endif
}
/*
* paging_init() sets up the page tables
*/
void __init paging_init(void)
{
unsigned long max_zone_pfns[MAX_NR_ZONES];
unsigned long pgd_type, asce_bits;
init_mm.pgd = swapper_pg_dir;
#ifdef CONFIG_64BIT
if (VMALLOC_END > (1UL << 42)) {
asce_bits = _ASCE_TYPE_REGION2 | _ASCE_TABLE_LENGTH;
pgd_type = _REGION2_ENTRY_EMPTY;
} else {
asce_bits = _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
pgd_type = _REGION3_ENTRY_EMPTY;
}
#else
asce_bits = _ASCE_TABLE_LENGTH;
pgd_type = _SEGMENT_ENTRY_EMPTY;
#endif
init_mm.context.asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
S390_lowcore.kernel_asce = init_mm.context.asce;
clear_table((unsigned long *) init_mm.pgd, pgd_type,
sizeof(unsigned long)*2048);
vmem_map_init();
/* enable virtual mapping in kernel mode */
__ctl_load(S390_lowcore.kernel_asce, 1, 1);
__ctl_load(S390_lowcore.kernel_asce, 7, 7);
__ctl_load(S390_lowcore.kernel_asce, 13, 13);
arch_local_irq_restore(4UL << (BITS_PER_LONG - 8));
atomic_set(&init_mm.context.attach_count, 1);
sparse_memory_present_with_active_regions(MAX_NUMNODES);
sparse_init();
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS);
max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
free_area_init_nodes(max_zone_pfns);
}
static void __init arch_mem_init(char **cmdline_p)
{
extern void plat_mem_setup(void);
/* call board setup routine */
plat_mem_setup();
pr_info("Determined physical RAM map:\n");
print_memory_map();
#ifdef CONFIG_CMDLINE_BOOL
#ifdef CONFIG_CMDLINE_OVERRIDE
strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
#else
if (builtin_cmdline[0]) {
strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE);
}
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
#endif
#else
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
#endif
strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
if (usermem) {
pr_info("User-defined physical RAM map:\n");
print_memory_map();
}
bootmem_init();
device_tree_init();
sparse_init();
paging_init();
}
void __init setup_arch(char **cmdline_p)
{
enable_mmu();
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
#ifdef CONFIG_BLK_DEV_RAM
rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
#endif
if (!MOUNT_ROOT_RDONLY)
root_mountflags &= ~MS_RDONLY;
init_mm.start_code = (unsigned long) _text;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
init_mm.brk = (unsigned long) _end;
code_resource.start = virt_to_phys(_text);
code_resource.end = virt_to_phys(_etext)-1;
data_resource.start = virt_to_phys(_etext);
data_resource.end = virt_to_phys(_edata)-1;
memory_start = (unsigned long)PAGE_OFFSET+__MEMORY_START;
memory_end = memory_start + __MEMORY_SIZE;
#ifdef CONFIG_CMDLINE_BOOL
strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
#else
strlcpy(command_line, COMMAND_LINE, sizeof(command_line));
#endif
/* Save unparsed command line copy for /proc/cmdline */
memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
sh_mv_setup();
/*
* Find the highest page frame number we have available
*/
max_pfn = PFN_DOWN(__pa(memory_end));
/*
* Determine low and high memory ranges:
*/
max_low_pfn = max_pfn;
min_low_pfn = __MEMORY_START >> PAGE_SHIFT;
nodes_clear(node_online_map);
/* Setup bootmem with available RAM */
setup_memory();
sparse_init();
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
#endif
/* Perform the machine specific initialisation */
if (likely(sh_mv.mv_setup))
sh_mv.mv_setup(cmdline_p);
paging_init();
}
static void __init arch_mem_init(char **cmdline_p)
{
phys_t init_mem, init_end, init_size;
extern void plat_mem_setup(void);
/* call board setup routine */
plat_mem_setup();
init_mem = PFN_UP(__pa_symbol(&__init_begin)) << PAGE_SHIFT;
init_end = PFN_DOWN(__pa_symbol(&__init_end)) << PAGE_SHIFT;
init_size = init_end - init_mem;
if (init_size) {
/* Make sure it is in the boot_mem_map */
int i, found;
found = 0;
for (i = 0; i < boot_mem_map.nr_map; i++) {
if (init_mem >= boot_mem_map.map[i].addr &&
init_mem < (boot_mem_map.map[i].addr +
boot_mem_map.map[i].size)) {
found = 1;
break;
}
}
if (!found)
add_memory_region(init_mem, init_size,
BOOT_MEM_INIT_RAM);
}
pr_info("Determined physical RAM map:\n");
print_memory_map();
#ifdef CONFIG_CMDLINE_BOOL
#ifdef CONFIG_CMDLINE_OVERRIDE
strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
#else
if (builtin_cmdline[0]) {
strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE);
}
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
#endif
#else
strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
#endif
strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
if (usermem) {
pr_info("User-defined physical RAM map:\n");
print_memory_map();
}
bootmem_init();
device_tree_init();
sparse_init();
plat_swiotlb_setup();
paging_init();
}
int main(int argc, char* argv[])
{
bool hermite_false, hermite_true;
int n1, n2, npml, pad1, pad2, ns, nw, nh;
float d1, d2, **v, ds, os, dw, ow;
double omega;
sf_complex ***f, ***srcw, ***recw, ***obs, ***obs_cut;
sf_file in, out, source, receiver, record;
int uts, mts;
char *order;
int is, i, j, iw, ih;
float ***image, **recloc;
sf_init(argc, argv);
in = sf_input("in");
out = sf_output("out");
if (!sf_getint("nh",&nh)) nh=0;
if (!sf_getint("uts",&uts)) uts=0;
//#ifdef _OPENMP
// mts = omp_get_max_threads();
//#else
mts = 1;
//#endif
uts = (uts < 1)? mts: uts;
hermite_false=false;
hermite_true=true;
/* Hermite operator */
if (!sf_getint("npml",&npml)) npml=20;
/* PML width */
if (NULL == (order = sf_getstring("order"))) order="j";
/* discretization scheme (default optimal 9-point) */
fdprep_order(order);
/* read input dimension */
if (!sf_histint(in,"n1",&n1)) sf_error("No n1= in input.");
if (!sf_histint(in,"n2",&n2)) sf_error("No n2= in input.");
if (!sf_histfloat(in,"d1",&d1)) sf_error("No d1= in input.");
if (!sf_histfloat(in,"d2",&d2)) sf_error("No d2= in input.");
v = sf_floatalloc2(n1,n2);
sf_floatread(v[0],n1*n2,in);
/* PML padding */
pad1 = n1+2*npml;
pad2 = n2+2*npml;
/* read receiver */
if (NULL == sf_getstring("receiver")) sf_error("Need receiver=");
receiver = sf_input("receiver");
recloc=sf_floatalloc2(n1,n2);
sf_floatread(recloc[0],n1*n2,receiver);
/* read source */
if (NULL == sf_getstring("source")) sf_error("Need source=");
source = sf_input("source");
if (!sf_histint(source,"n3",&ns)) sf_error("No ns=.");
if (!sf_histfloat(source,"d3",&ds)) ds=d2;
if (!sf_histfloat(source,"o3",&os)) os=0.;
f = sf_complexalloc3(n1,n2,ns);
/* read observed data */
if (NULL == sf_getstring("record")) sf_error("Need record=");
record = sf_input("record");
if (!sf_histint(record,"n4",&nw)) sf_error("No nw=.");
if (!sf_histfloat(record,"d4",&dw)) sf_error("No dw=.");
if (!sf_histfloat(record,"o4",&ow)) sf_error("No ow=.");
obs = sf_complexalloc3(n1,n2,ns);
obs_cut = sf_complexalloc3(n1,n2,ns);
srcw = sf_complexalloc3(n1,n2,ns);
recw = sf_complexalloc3(n1,n2,ns);
image = sf_floatalloc3(n1,n2,2*nh+1);
/* Loop over frequency */
for (iw=0; iw<nw; iw++ ) {
omega=(double) 2.*SF_PI*(ow+iw*dw);
sf_warning("Calculating frequency %d out of %d for %f HZ.",iw+1,nw,ow+iw*dw);
sf_complexread(f[0][0],n1*n2*ns,source);
sf_complexread(obs[0][0],n1*n2*ns,record);
/* generate adjoint source for reverse time migration */
genadjsrc_rtm(obs, obs_cut, recloc, n1, n2, ns);
/* initialize sparse solver */
sparse_init(uts, pad1, pad2);
/* factorize matrix, change according to different frequencies and models */
sparse_factor(omega,n1,n2,d1,d2,v,npml,pad1,pad2,uts);
for (is=0; is < ns; is++ ) {
for (j=0; j < n2; j++ ) {
for (i=0; i < n1; i++ ) {
srcw[is][j][i]=f[is][j][i];
recw[is][j][i]=obs_cut[is][j][i];
}
}
}
/* sparse solver for source wavefield */
sparse_solve(npml, pad1, pad2, srcw, hermite_false, ns, uts);
/* sparse solver for receiver wavefield */
sparse_solve(npml, pad1, pad2, recw, hermite_true, ns, uts);
/* imaging condition */
for (ih=-nh; ih < nh+1; ih++ ) {
for (j=0; j<n2; j++ ) {
for (i=0; i< n1; i++ ) {
for (is=0; is < ns; is++ ) {
if (j-abs(ih) >= 0 && j+abs(ih) < n2) {
image[ih+nh][j][i] += crealf(omega*omega*conjf(srcw[is][j-ih][i])*recw[is][j+ih][i]/(v[j][i]*v[j][i]));
}
}
}
}
}
/* free memory */
sparse_free(uts);
} /* end frequency */
sf_putint(out,"n1",n1);
sf_putint(out,"n2",n2);
sf_putint(out,"n3",2*nh+1);
sf_putfloat(out,"d3",d2);
sf_putfloat(out,"o3", (float) -nh*d2);
sf_floatwrite(image[0][0],n1*n2*(2*nh+1),out);
exit(0);
}
int main(int argc, char* argv[])
{
bool hermite;
int n1, n2, npml, pad1, pad2, ns, nw, iw;
float d1, d2, **v, ds, os, ow, dw;
double omega;
sf_complex ***f;
sf_file in, out, source;
int uts, mts;
char *order;
sf_init(argc, argv);
in = sf_input("in");
out = sf_output("out");
if (!sf_getint("uts",&uts)) uts=0;
//#ifdef _OPENMP
// mts = omp_get_max_threads();
//#else
mts = 1;
//#endif
uts = (uts < 1)? mts: uts;
sf_warning("Using %d out of %d threads!", uts, mts);
if (!sf_getbool("hermite",&hermite)) hermite=false;
/* Hermite operator */
if (!sf_getint("npml",&npml)) npml=20;
/* PML width */
if (NULL == (order = sf_getstring("order"))) order="j";
/* discretization scheme (default optimal 9-point) */
fdprep_order(order);
/* read input dimension */
if (!sf_histint(in,"n1",&n1)) sf_error("No n1= in input.");
if (!sf_histint(in,"n2",&n2)) sf_error("No n2= in input.");
if (!sf_histfloat(in,"d1",&d1)) sf_error("No d1= in input.");
if (!sf_histfloat(in,"d2",&d2)) sf_error("No d2= in input.");
v = sf_floatalloc2(n1,n2);
sf_floatread(v[0],n1*n2,in);
/* PML padding */
pad1 = n1+2*npml;
pad2 = n2+2*npml;
/* read source */
if (NULL == sf_getstring("source"))
sf_error("Need source=");
source = sf_input("source");
if (!sf_histint(source,"n3",&ns)) sf_error("No ns=.");
if (!sf_histfloat(source,"d3",&ds)) ds=d2;
if (!sf_histfloat(source,"o3",&os)) os=0.;
if (!sf_histint(source,"n4",&nw)) sf_error("No nw=.");
if (!sf_histfloat(source,"d4",&dw)) sf_error("No dw=.");
if (!sf_histfloat(source,"o4",&ow)) sf_error("No ow=.");
f = sf_complexalloc3(n1,n2,ns);
/* write out forward simulation */
sf_settype(out,SF_COMPLEX);
sf_putint(out,"n3",ns);
sf_putfloat(out,"d3",ds);
sf_putfloat(out,"o3",os);
sf_putstring(out,"label3","Shot");
sf_putstring(out,"unit3","");
sf_putint(out,"n4",nw);
sf_putfloat(out,"d4",dw);
sf_putfloat(out,"o4",ow);
sf_putstring(out,"label4","Frequency");
sf_putstring(out,"unit4","Hz");
/* Loop over frequency */
for (iw=0; iw<nw; iw++ ) {
omega=(double) 2.*SF_PI*(ow+iw*dw);
sf_warning("Calculating frequency %d out of %d for %f HZ.",iw+1,nw,ow+iw*dw);
/* read in source */
sf_complexread(f[0][0],n1*n2*ns,source);
/* initialize sparse solver */
sparse_init(uts, pad1, pad2);
/* factorize matrix, change according to different frequencies and models */
sparse_factor(omega, n1, n2, d1, d2, v, npml, pad1, pad2);
/* sparse solver */
sparse_solve(npml, pad1, pad2, f, hermite, ns, uts);
/* write out wavefield */
sf_complexwrite(f[0][0],n1*n2*ns,out);
sparse_free(uts);
}
exit(0);
}