static bool probe_cb(void *cb_ctx, struct spdk_pci_device *dev, struct spdk_nvme_ctrlr_opts *opts) { if (spdk_pci_device_has_non_uio_driver(dev)) { /* * If an NVMe controller is found, but it is attached to a non-uio * driver (i.e. the kernel NVMe driver), we will not try to attach * to it. */ fprintf(stderr, "non-uio kernel driver attached to NVMe\n"); fprintf(stderr, " controller at PCI address %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); fprintf(stderr, " skipping...\n"); return false; } printf("Attaching to %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); return true; }
static void display_controller(struct dev *dev, int model) { const struct spdk_nvme_ctrlr_data *cdata; uint8_t str[128]; uint32_t i; cdata = spdk_nvme_ctrlr_get_data(dev->ctrlr); if (model == CONTROLLER_DISPLAY_SIMPLISTIC) { printf("%04x:%02x:%02x.%02x ", spdk_pci_device_get_domain(dev->pci_dev), spdk_pci_device_get_bus(dev->pci_dev), spdk_pci_device_get_dev(dev->pci_dev), spdk_pci_device_get_func(dev->pci_dev)); printf("%-40.40s %-20.20s ", cdata->mn, cdata->sn); printf("%5d ", cdata->cntlid); printf("\n"); return; } printf("=====================================================\n"); printf("NVMe Controller: %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev->pci_dev), spdk_pci_device_get_bus(dev->pci_dev), spdk_pci_device_get_dev(dev->pci_dev), spdk_pci_device_get_func(dev->pci_dev)); printf("============================\n"); printf("Controller Capabilities/Features\n"); printf("Controller ID: %d\n", cdata->cntlid); snprintf(str, sizeof(cdata->sn) + 1, "%s", cdata->sn); printf("Serial Number: %s\n", str); printf("\n"); printf("Admin Command Set Attributes\n"); printf("============================\n"); printf("Namespace Manage And Attach: %s\n", cdata->oacs.ns_manage ? "Supported" : "Not Supported"); printf("Namespace Format: %s\n", cdata->oacs.format ? "Supported" : "Not Supported"); printf("\n"); printf("NVM Command Set Attributes\n"); printf("============================\n"); if (cdata->fna.format_all_ns) { printf("Namespace format operation applies to all namespaces\n"); } else { printf("Namespace format operation applies to per namespace\n"); } printf("\n"); printf("Namespace Attributes\n"); printf("============================\n"); for (i = 1; i <= spdk_nvme_ctrlr_get_num_ns(dev->ctrlr); i++) { display_namespace(spdk_nvme_ctrlr_get_ns(dev->ctrlr, i)); } }
static bool probe_cb(void *cb_ctx, struct spdk_pci_device *dev, struct spdk_nvme_ctrlr_opts *opts) { printf("Attaching to %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); return true; }
static uint64_t get_pci_addr(struct spdk_pci_device *pci_dev) { uint64_t cmp; cmp = (uint64_t)spdk_pci_device_get_domain(pci_dev) << 24; cmp |= (uint64_t)spdk_pci_device_get_bus(pci_dev) << 16; cmp |= (uint64_t)spdk_pci_device_get_dev(pci_dev) << 8; cmp |= (uint64_t)spdk_pci_device_get_func(pci_dev); return cmp; }
static void attach_cb(void *cb_ctx, struct spdk_pci_device *dev, struct spdk_nvme_ctrlr *ctrlr, const struct spdk_nvme_ctrlr_opts *opts) { printf("Attached to %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); register_ctrlr(ctrlr); }
static bool probe_cb(void *cb_ctx, struct spdk_pci_device *dev, struct spdk_nvme_ctrlr_opts *opts) { if (spdk_pci_device_has_non_uio_driver(dev)) { fprintf(stderr, "non-uio kernel driver attached to NVMe\n"); fprintf(stderr, " controller at PCI address %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); fprintf(stderr, " skipping...\n"); return false; } printf("Attaching to %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); return true; }
static void attach_cb(void *cb_ctx, struct spdk_pci_device *dev, struct spdk_nvme_ctrlr *ctrlr, const struct spdk_nvme_ctrlr_opts *opts) { u2_ctrlr = ctrlr; u2_ns = spdk_nvme_ctrlr_get_ns(u2_ctrlr, u2_ns_id); u2_ns_sector = spdk_nvme_ns_get_sector_size(u2_ns); u2_ns_size = spdk_nvme_ns_get_size(u2_ns); u2_qpair = spdk_nvme_ctrlr_alloc_io_qpair(u2_ctrlr, 0); printf("attached to %04x:%02x:%02x.%02x!\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); }
static bool probe_cb(void *cb_ctx, struct spdk_pci_device *dev, struct spdk_nvme_ctrlr_opts *opts) { static uint32_t ctrlr_found = 0; if (ctrlr_found == 1) { fprintf(stderr, "only attching to one controller, so skipping\n"); fprintf(stderr, " controller at PCI address %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); return false; } ctrlr_found = 1; printf("Attaching to %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); return true; }
static bool probe_cb(void *cb_ctx, struct spdk_pci_device *dev, struct spdk_nvme_ctrlr_opts *opts) { if (u2_ctrlr) { return false; } if (spdk_pci_device_has_non_uio_driver(dev)) { fprintf(stderr, "%04x:%02x:%02x.%02x: non-UIO/kernel driver detected!\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); return false; } return true; }
static void attach_cb(void *cb_ctx, struct spdk_pci_device *pci_dev, struct spdk_nvme_ctrlr *ctrlr, const struct spdk_nvme_ctrlr_opts *opts) { struct dev *dev; /* add to dev list */ dev = &devs[num_devs++]; dev->ctrlr = ctrlr; snprintf(dev->name, sizeof(dev->name), "%04X:%02X:%02X.%02X", spdk_pci_device_get_domain(pci_dev), spdk_pci_device_get_bus(pci_dev), spdk_pci_device_get_dev(pci_dev), spdk_pci_device_get_func(pci_dev)); printf("Attached to %s\n", dev->name); }
static void attach_cb(void *cb_ctx, struct spdk_pci_device *dev, struct spdk_nvme_ctrlr *ctrlr, const struct spdk_nvme_ctrlr_opts *opts) { int nsid, num_ns; struct ctrlr_entry *entry; const struct spdk_nvme_ctrlr_data *cdata = spdk_nvme_ctrlr_get_data(ctrlr); entry = malloc(sizeof(struct ctrlr_entry)); if (entry == NULL) { perror("ctrlr_entry malloc"); exit(1); } printf("Attached to %04x:%02x:%02x.%02x\n", spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev), spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev)); snprintf(entry->name, sizeof(entry->name), "%-20.20s (%-20.20s)", cdata->mn, cdata->sn); entry->ctrlr = ctrlr; entry->next = g_controllers; g_controllers = entry; /* * Each controller has one of more namespaces. An NVMe namespace is basically * equivalent to a SCSI LUN. The controller's IDENTIFY data tells us how * many namespaces exist on the controller. For Intel(R) P3X00 controllers, * it will just be one namespace. * * Note that in NVMe, namespace IDs start at 1, not 0. */ num_ns = spdk_nvme_ctrlr_get_num_ns(ctrlr); printf("Using controller %s with %d namespaces.\n", entry->name, num_ns); for (nsid = 1; nsid <= num_ns; nsid++) { register_ns(ctrlr, spdk_nvme_ctrlr_get_ns(ctrlr, nsid)); } }