C++ (Cpp) spiMasterInit Exemples

Exemple #1

Fichier : main.c Projet : eaglevis/FlashBang

uint8_t setup(void)
{
	keyInit();
	lcdInit();

	spiMasterInit();
	uint8_t rinit = rInit();

	// IO

	SET(DDR, F_TRIG);
	SET(DDR, F_QUENCH);

	CLR(PORT, F_TRIG);
	CLR(PORT, F_QUENCH);

	SET(DDR, LED);
	CLR(PORT, LED);
// timers
	initTicker();


	// interrupt
	PORTD |= (1<<PD2)|(1<<PD3);
	// INT0 and INT1 active LOW
	EIMSK |= (1<<INT0) | (1<<INT1);

	sei();

	return rinit;
}

Exemple #2

Fichier : interProcCommMaster.c Projet : boboll/SLUGS

void sensorMCUInit(void) {
    gpsInit();
    uartInit();
    loggerInit();
    spiMasterInit();
    protParserInit();
#ifndef NO_MAGNETO
    magnetoInit();
#endif
    cubeInit();
    aknControlData.sensorReboot =1;
}

Exemple #3

void Lcd::init(void)
{
	font = 0;
	fdev_setup_stream(&lcdf, (int (*)(char, FILE*)) &lcd.lcdPut, NULL, _FDEV_SETUP_WRITE);

	spiMasterInit();

	CLR_SCE;
	CLR_RST;
	_delay_ms(100);
	SET_RST;
	SET_SCE;

	command(0x21);	// Switch to extended instruction set.
	command(0xbf);	// Set VOP.
	command(0x04);	// Set temperature coefficient.
	command(0x14);	// Set bias.
	command(0x20);	// Switch to basic instruction set.
	command(0x0c);	// Set normal display mode.

	clear();
	sync();
}

Exemple #4

Fichier : nrf24l01.c Projet : obeny/ehal

// --------------------------------------------------------------------------
BOOL nrf24Init(const spi_cfg_st *spi_st)
{
	u_nrf24_reg_t reg_val;
	UINT8 i;

	spi = (spi_cfg_st*)spi_st;
	curr_mode = NRF24_MODE_POWERDOWN;
	b_dynamic_payloads = false;
	b_is_p_variant = false;

	NRF24_CSN_HIGH();
	NRF24_CE_LOW();
	delayMs(100);

	// initialize SPI and do some dummy reads to allow chip settle down
	spiMasterInit(spi, SPI_CLK_POL_POS, SPI_CLK_PHA_SAMPLE, SPI_CLK_ORD_MSB);
	for (i = 0; i < NRF24_STARTUP_REG_READ_CNT; ++i)
		nrf24_readByteRegister(NRF24_REG_CONFIG, &reg_val.byte);

	reg_val.byte = 0;
	nrf24_writeByteRegister(NRF24_REG_CONFIG, &reg_val.byte);

	// check communication
	reg_val.CONFIG.EN_CRC = 1;
	if (!nrf24_writeByteRegister(NRF24_REG_CONFIG, &reg_val.byte))
	{
		nrf24_debug("communication problem, please check wiring\n");
		return (false);
	}
	else
	{
		nrf24_debug("communication ok\n");
	}

	// check whether we have nrf24l01+ variant
	reg_val.byte = 0;
	reg_val.RF_SETUP_PLUS.RF_DR_LOW = 1;
	if (nrf24_writeByteRegister(NRF24_REG_RF_SETUP, &reg_val.byte))
	{
		nrf24_debug("detected nRF24L01+ chip\n");
		b_is_p_variant = true;
	}
	else
	{
		nrf24_debug("detected nRF24L01 chip\n");
	}

	//
	// SETUP PHASE
	//

	// disable chip by default
	if (!nrf24SetMode(NRF24_MODE_POWERDOWN))
		return (false);
	// set 2 byte CRC by default
	if (!nrf24SetCrcLength(NRF24_CRC_16))
		return (false);
	// set data rate to 1Mbps (most reliable and supported by all chips)
	if (!nrf24SetDataRate(NRF24_DRATE_1M))
		return (false);
	// leave tx power at low level
	if (!nrf24SetPowerLevel(NRF24_PL_LOW))
		return (false);
	// set default address width to 5 bytes
	if (!nrf24SetAddressWidth(NRF24_ADRWIDTH_5))
		return (false);
	// set default channel in the middle of spectrum
	if (!nrf24SetChannel(64))
		return (false);
	// set maximum delay (1500us) for retransmission (15 retries) to make testing easier
	if (!nrf24SetAutoRetransmit(1500, 15))
		return (false);

	// disable auto acknowledgement on all pipes
	reg_val.byte = 0;
	nrf24_writeByteRegister(NRF24_REG_EN_AA, &reg_val.byte);

	// default receive pipe addresses
	nrf24_writeRegister(NRF24_REG_RX_ADDR_P0, (BYTE*)"00000", 5);
	nrf24_writeRegister(NRF24_REG_RX_ADDR_P1, (BYTE*)"11111", 5);
	nrf24_writeRegister(NRF24_REG_RX_ADDR_P2, (BYTE*)"2", 1);
	nrf24_writeRegister(NRF24_REG_RX_ADDR_P3, (BYTE*)"3", 1);
	nrf24_writeRegister(NRF24_REG_RX_ADDR_P4, (BYTE*)"4", 1);
	nrf24_writeRegister(NRF24_REG_RX_ADDR_P5, (BYTE*)"5", 1);
	
	// default transmitter address
	nrf24_writeRegister(NRF24_REG_TX_ADDR, (BYTE*)"00000", 5);

	// disable all pipes
	nrf24_writeByteRegister(NRF24_REG_EN_RXADDR, &reg_val.byte);

	// disable all receive pipes (no payload expected)
	nrf24_writeByteRegister(NRF24_REG_RX_PW_P0, &reg_val.byte);
	nrf24_writeByteRegister(NRF24_REG_RX_PW_P1, &reg_val.byte);
	nrf24_writeByteRegister(NRF24_REG_RX_PW_P2, &reg_val.byte);
	nrf24_writeByteRegister(NRF24_REG_RX_PW_P3, &reg_val.byte);
	nrf24_writeByteRegister(NRF24_REG_RX_PW_P4, &reg_val.byte);
	nrf24_writeByteRegister(NRF24_REG_RX_PW_P5, &reg_val.byte);

	// activate disabled registers
	nrf24_enableFeatures();

	// disable dynamic payloads
	reg_val.byte = 0;
	if (!nrf24_writeByteRegister(NRF24_REG_DYNPD, &reg_val.byte))
		return (false);
	if (!nrf24_writeByteRegister(NRF24_REG_FEATURE, &reg_val.byte))
		return (false);

	// reset status
	nrf24_resetStatus(true, true, true);

	// flush tx and rx fifos
	nrf24FlushRx();
	nrf24FlushTx();

	nrf24_debug("init ok\n");

	return (true);
}