/*
* Class: edu_wpi_first_wpilibj_hal_SPIJNI
* Method: spiSetSpeed
* Signature: (BI)V
*/
JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_SPIJNI_spiSetSpeed
(JNIEnv *, jclass, jbyte port, jint speed)
{
SPIJNI_LOG(logDEBUG) << "Calling SPIJNI spiSetSpeed";
SPIJNI_LOG(logDEBUG) << "Port = " << (jint) port;
SPIJNI_LOG(logDEBUG) << "Speed = " << (jint) speed;
spiSetSpeed(port, speed);
}
/**
* @brief Support some spi driver commands for application.
* @param[in] fd is interface number.
* @param[in] cmd is command.
* @param[in] arg0 is the first argument of command.
* @param[in] arg1 is the second argument of command.
* @return command status.
* @retval 0 Success otherwise fail. Fail value could be
* - \ref SPI_ERR_NODEV
* - \ref SPI_ERR_IO
* - \ref SPI_ERR_ARG
*/
int32_t spiIoctl(int32_t fd, uint32_t cmd, uint32_t arg0, uint32_t arg1)
{
spi_dev *dev;
if(fd != 0 && fd != 1)
return(SPI_ERR_NODEV);
dev = (spi_dev *)((uint32_t)&spi_device[fd]);
if(dev->openflag == 0)
return(SPI_ERR_IO);
switch(cmd)
{
case SPI_IOC_TRIGGER:
dev->intflag = 0;
spi_out(dev, spi_in(dev, CNTRL) | 0x1 ,CNTRL);
break;
case SPI_IOC_SET_INTERRUPT:
if(arg0 == SPI_ENABLE_INTERRUPT)
spi_out(dev, spi_in(dev, CNTRL) | (0x1<<17) ,CNTRL);
else
spi_out(dev, spi_in(dev, CNTRL) & ~(0x1<<17) ,CNTRL);
break;
case SPI_IOC_SET_SPEED:
spiSetSpeed(dev, (uint32_t)arg0);
break;
case SPI_IOC_SET_DUAL_QUAD_MODE:
if(arg0 == SPI_DISABLE_DUAL_QUAD)
{
spi_out(dev, (spi_in(dev, CNTRL) & ~(0x3 << 21)) ,CNTRL);
break;
}
if(arg0 == SPI_DUAL_MODE)
spi_out(dev, (spi_in(dev, CNTRL) & ~(0x3 << 21)) | (0x1 << 22) ,CNTRL);
else
spi_out(dev, (spi_in(dev, CNTRL) & ~(0x3 << 21)) | (0x1 << 21) ,CNTRL);
break;
case SPI_IOC_SET_DUAL_QUAD_DIR:
if(arg0 == SPI_DUAL_QUAD_INPUT)
spi_out(dev, spi_in(dev, CNTRL) & ~(0x1 << 20) ,CNTRL);
else
spi_out(dev, spi_in(dev, CNTRL) | (0x1 << 20) ,CNTRL);
break;
case SPI_IOC_SET_LSB_MSB:
if(arg0 == SPI_MSB)
spi_out(dev, spi_in(dev, CNTRL) & ~(0x1 << 10) ,CNTRL);
else
spi_out(dev, spi_in(dev, CNTRL) | (0x1 << 10) ,CNTRL);
break;
case SPI_IOC_SET_TX_NUM:
if(arg0 < 4)
spi_out(dev, (spi_in(dev, CNTRL) & ~(0x3 << 8)) | (arg0 << 8) ,CNTRL);
else
return SPI_ERR_ARG;
break;
case SPI_IOC_SET_TX_BITLEN:
if(arg0 < 32)
spi_out(dev, (spi_in(dev, CNTRL) & ~(0x1f << 3)) | (arg0 << 3) ,CNTRL);
else
return SPI_ERR_ARG;
break;
case SPI_IOC_SET_MODE:
if(arg0 > SPI_MODE_3)
return SPI_ERR_ARG;
if(arg0 == SPI_MODE_0)
spi_out(dev, (spi_in(dev, CNTRL) & ~((0x3<<1) | (1UL<<31))) | (1<<2) ,CNTRL);
else if(arg0 == SPI_MODE_1)
spi_out(dev, (spi_in(dev, CNTRL) & ~((0x3<<1) | (1UL<<31))) | (1<<1) ,CNTRL);
else if(arg0 == SPI_MODE_2)
spi_out(dev, (spi_in(dev, CNTRL) & ~((0x3<<1) | (1UL<<31))) | ((1UL<<31) | (1<<2)) ,CNTRL);
else
spi_out(dev, (spi_in(dev, CNTRL) & ~((0x3<<1) | (1UL<<31))) | ((1UL<<31) | (1<<1)) ,CNTRL);
break;
case SPI_IOC_ENABLE_SS:
if(arg0 == SPI_SS_SS0)
spi_out(dev, (spi_in(dev, SSR) & ~(0x3)) | 0x1 ,SSR);
else if(arg0 == SPI_SS_SS1)
spi_out(dev, (spi_in(dev, SSR) & ~(0x3)) | 0x2 ,SSR);
else if(arg0 == SPI_SS_BOTH)
spi_out(dev, (spi_in(dev, SSR) & ~(0x3)) | 0x3 ,SSR);
else
return SPI_ERR_ARG;
break;
case SPI_IOC_DISABLE_SS:
if(arg0 == SPI_SS_SS0)
spi_out(dev, (spi_in(dev, SSR) & ~(0x1)) ,SSR);
else if(arg0 == SPI_SS_SS1)
spi_out(dev, (spi_in(dev, SSR) & ~(0x2)) ,SSR);
else if(arg0 == SPI_SS_BOTH)
spi_out(dev, (spi_in(dev, SSR) & ~(0x3)) ,SSR);
else
return SPI_ERR_ARG;
break;
case SPI_IOC_SET_AUTOSS:
if(arg0 == SPI_DISABLE_AUTOSS)
spi_out(dev, spi_in(dev, SSR) & ~(0x1 << 3) ,SSR);
else
spi_out(dev, spi_in(dev, SSR) | (0x1 << 3) ,SSR);
break;
case SPI_IOC_SET_SS_ACTIVE_LEVEL:
if(arg0 == SPI_SS_ACTIVE_LOW)
spi_out(dev, spi_in(dev, SSR) & ~(0x1 << 2) ,SSR);
else
spi_out(dev, spi_in(dev, SSR) | (0x1 << 2) ,SSR);
default:
break;
}
return 0;
}
