/*
* append_lines: Insert text from stdin to after given address; stop
* when either a single period is read or EOF. Return status.
*/
int
append_lines (off_t after, ed_buffer_t *ed)
{
char *s;
size_t len;
ed_line_node_t *lp;
ed_undo_node_t *up = NULL;
int status;
ed->state->input_is_binary = 0;
for (ed->state->dot = after;;)
{
if (!ed->exec->global)
{
if (!(ed->input = get_stdin_line (&len, ed)))
{
/* Permit EOF (i.e., key stroke: CTL + D) at beginning of
line as alternative to `.' */
status = feof (stdin) ? 0 : ERR;
clearerr (stdin);
return status;
}
if (*(ed->input + len - 1) != '\n')
{
ed->exec->err = _("End-of-file unexpected");
clearerr (stdin);
return ERR;
}
++ed->exec->line_no;
}
else if (*ed->input == '\0')
return 0;
if (*ed->input == '.' && *(ed->input + 1) == '\n')
{
++ed->input;
return 0;
}
if (ed->exec->global)
{
for (s = ed->input; *s++ != '\n';)
;
len = s - ed->input;
}
spl1 ();
ed->state->is_binary |= ed->state->input_is_binary;
if (after == ed->state->lines)
ed->state->newline_appended = 0;
if (!(ed->input = put_buffer_line (ed->input, len, ed)))
{
spl0 ();
return ERR;
}
lp = get_line_node (ed->state->dot, ed);
APPEND_UNDO_NODE (lp, up, ed->state->dot, ed);
ed->state->is_empty = 0;
ed->state->is_modified = 1;
spl0 ();
}
/* NOTREACHED */
}
/*
* copy_lines: Copy a range of lines to after given address. Return status.
*/
int
copy_lines (off_t from, off_t to, off_t after, ed_buffer_t *ed)
{
ed_line_node_t *lp, *np;
ed_undo_node_t *up = NULL;
off_t ci[2];
int split = (from <= after && after < to);
int i;
ci[0] = (split ? after : to) - from + 1;
ci[1] = (split ? to - after : 0);
for (i = 0; i < 2; ++i)
{
lp = get_line_node (i == 0 ? from : after + 1, ed);
for (; ci[i]-- > 0; lp = lp->q_forw)
{
spl1 ();
if (!(np = append_line_node (lp->len, lp->seek, after, ed)))
{
spl0 ();
return ERR;
}
ed->state->dot = ++after;
APPEND_UNDO_NODE (np, up, after, ed);
ed->state->is_modified = 1;
spl0 ();
}
}
return 0;
}
/*
* move_lines: Move a range of lines to after given address. Return status.
*/
int
move_lines (off_t from, off_t to, off_t after, ed_buffer_t *ed)
{
ed_line_node_t *b1, *a1, *b2, *a2;
off_t succ = INC_MOD (to, ed->state->lines);
off_t prec = from - 1;
int done = (after == from - 1 || after == to);
spl1 ();
if (done)
{
a2 = get_line_node (succ, ed);
b2 = get_line_node (prec, ed);
ed->state->dot = to;
}
else if (!append_undo_node (UMOV, prec, succ, ed)
|| !append_undo_node (UMOV, after,
INC_MOD (after, ed->state->lines), ed))
{
spl0 ();
return ERR;
}
else
{
a1 = get_line_node (succ, ed);
if (from > after)
{
b1 = get_line_node (prec, ed);
/* this get_line_node last! */
b2 = get_line_node (after, ed);
}
else
{
b2 = get_line_node (after, ed);
/* this get_line_node last! */
b1 = get_line_node (prec, ed);
}
a2 = b2->q_forw;
LINK_NODES (b2, b1->q_forw);
LINK_NODES (a1->q_back, a2);
LINK_NODES (b1, a1);
ed->state->dot = after + (from > after ? to - from + 1 : 0);
}
if (ed->exec->global)
delete_global_nodes (b2->q_forw, a2, ed);
ed->state->is_modified = 1;
spl0 ();
return 0;
}
/*
* void cpu_configure()
*
* Configure all the root devices
* The root devices are expected to configure their own children
*/
void
cpu_configure(void)
{
config_hook_init();
/*
* Configure all the roots.
* We have to have a mainbus
*/
#if 0
startrtclock();
#endif
/*
* Since the ICU is not standard on the ARM we don't know
* if we have one until we find a bridge.
* Since various PCI interrupts could be routed via the ICU
* (for PCI devices in the bridge) we need to set up the ICU
* now so that these interrupts can be established correctly
* i.e. This is a hack.
*/
if (config_rootfound("mainbus", NULL) == NULL)
panic("configure: mainbus not configured");
/* Debugging information */
#ifdef DIAGNOSTIC
dump_spl_masks();
#endif
/* Time to start taking interrupts so lets open the flood gates .... */
(void)spl0();
}
void
cpu_configure(void)
{
footbridge_intr_evcnt_attach();
/*
* Since various PCI interrupts could be routed via the ICU
* (for PCI devices in the bridge) we need to set up the ICU
* now so that these interrupts can be established correctly
* i.e. This is a hack.
*/
isa_intr_init();
config_rootfound("mainbus", NULL);
#if defined(DEBUG)
/* Debugging information */
printf("ipl_bio=%08x ipl_net=%08x ipl_tty=%08x ipl_vm=%08x\n",
footbridge_imask[IPL_BIO], footbridge_imask[IPL_NET],
footbridge_imask[IPL_TTY], footbridge_imask[IPL_VM]);
printf("ipl_audio=%08x ipl_imp=%08x ipl_high=%08x ipl_serial=%08x\n",
footbridge_imask[IPL_AUDIO], footbridge_imask[IPL_CLOCK],
footbridge_imask[IPL_HIGH], footbridge_imask[IPL_SERIAL]);
#endif /* defined(DEBUG) */
/* Time to start taking interrupts so lets open the flood gates .... */
(void)spl0();
}
/*
* Determine i/o configuration for a machine.
*/
static void
configure(void *dummy)
{
configure_start();
device_add_child(root_bus, platform.iobus, 0);
root_bus_configure();
if((hwrpb->rpb_type != ST_DEC_3000_300) &&
(hwrpb->rpb_type != ST_DEC_3000_500)){
/*
* Probe ISA devices after everything.
*/
#if NISA > 0
if (isa_bus_device)
isa_probe_children(isa_bus_device);
#endif
}
configure_finish();
cninit_finish();
/*
* Now we're ready to handle (pending) interrupts.
* XXX this is slightly misplaced.
*/
spl0();
cold = 0;
}
/*
* Set up the real-time and statistics clocks. Leave stathz 0 only if
* no alternative timer is available.
*/
void
cpu_initclocks(void)
{
switch (mach_type) {
#if defined(MIPS1)
case MACH_SGI_IP6 | MACH_SGI_IP10:
case MACH_SGI_IP12:
/* int(4) will take care of our clocks */
/* enable hardware interrupts including hardclock(9) */
spl0();
break;
#endif /* MIPS1 */
#if defined(MIPS3)
case MACH_SGI_IP20:
case MACH_SGI_IP22:
case MACH_SGI_IP30:
case MACH_SGI_IP32:
mips3_initclocks();
break;
#endif /* MIPS3 */
default:
panic("cpu_initclocks(): unknown mach_type IP%d", mach_type);
break;
}
}
/*
* New threads actually come through here on the way to the function
* they're supposed to start in. This is so when that function exits,
* thread_exit() can be called automatically.
*/
void
mi_threadstart(void *data1, unsigned long data2,
void (*func)(void *, unsigned long))
{
/* If we have an address space, activate it */
if (curthread->t_vmspace) {
as_activate(curthread->t_vmspace);
}
/* Enable interrupts */
spl0();
assert(curthread->pid >= 1);
//kprintf("curthread pid is %d\n",curthread->pid);
#if OPT_SYNCHPROBS
/* Yield a random number of times to get a good mix of threads */
{
int i, n;
n = random()%161 + random()%161;
for (i=0; i<n; i++) {
thread_yield();
}
}
#endif
#if OPT_A2
int result = conSetup(curthread); // stdin , stdout, stderr
if(result) panic("Out of Memory\n");
#endif
/* Call the function */
func(data1, data2);
/* Done. */
thread_exit();
}
/*
* New threads actually come through here on the way to the function
* they're supposed to start in. This is so when that function exits,
* thread_exit() can be called automatically.
*/
void
mi_threadstart(void *data1, unsigned long data2,
void (*func)(void *, unsigned long))
{
/* If we have an address space, activate it */
if (curthread->t_vmspace) {
as_activate(curthread->t_vmspace);
}
/* Enable interrupts */
spl0();
#if OPT_SYNCHPROBS
/* Yield a random number of times to get a good mix of threads */
{
int i, n;
n = random()%161 + random()%161;
for (i=0; i<n; i++) {
thread_yield();
}
}
#endif
/* Call the function */
func(data1, data2);
/* Done. */
thread_exit(0);
}
/*
* Do general device autoconfiguration,
* then choose root device (etc.)
* Called by sys/kern/subr_autoconf.c: configure()
*/
void
cpu_configure(void)
{
/*
* Consider stopping for a debugger before
* autoconfiguration.
*/
if (boothowto & RB_KDB) {
#ifdef KGDB
/* XXX - Ask on console for kgdb_dev? */
/* Note: this will just return if kgdb_dev==NODEV */
kgdb_connect(1);
#else /* KGDB */
/* Either DDB or no debugger (just PROM). */
Debugger();
#endif /* KGDB */
}
/* General device autoconfiguration. */
if (config_rootfound("mainbus", NULL) == NULL)
panic("%s: mainbus not found", __func__);
/*
* Now that device autoconfiguration is finished,
* we can safely enable interrupts.
*/
printf("enabling interrupts\n");
(void)spl0();
}
/*
* Timer thread.
*
* Handle all expired timers. Each callout routine is
* called with scheduler locked and interrupts enabled.
*/
static void
timer_thread(void *dummy)
{
struct timer *tmr;
splhigh();
for (;;) {
/*
* Wait until next timer expiration.
*/
sched_sleep(&timer_event);
while (!list_empty(&expire_list)) {
/*
* callout
*/
tmr = timer_next(&expire_list);
list_remove(&tmr->link);
tmr->state = TM_STOP;
sched_lock();
spl0();
(*tmr->func)(tmr->arg);
/*
* Unlock scheduler here in order to give
* chance to higher priority threads to run.
*/
sched_unlock();
splhigh();
}
}
/* NOTREACHED */
}
/*
* Determine i/o configuration for a machine.
*/
void
cpu_configure(void)
{
startrtclock();
#if NBIOS32 > 0
bios32_init();
platform_init();
#endif
x86_64_proc0_tss_ldt_init();
if (config_rootfound("mainbus", NULL) == NULL)
panic("configure: mainbus not configured");
#ifdef INTRDEBUG
intr_printconfig();
#endif
#if NIOAPIC > 0
ioapic_enable();
#endif
#ifdef MULTIPROCESSOR
cpu_init_idle_lwps();
#endif
spl0();
lcr8(0);
}
/*
* Determine mass storage and memory configuration for a machine.
* We get the PROM's root device and make sure we understand it, then
* attach it as `mainbus0'. We also set up to handle the PROM `sync'
* command.
*/
void
cpu_configure(void)
{
if (CPU_ISSUN4V)
mdesc_init();
bool userconf = (boothowto & RB_USERCONF) != 0;
/* fetch boot device settings */
get_bootpath_from_prom();
if (((boothowto & RB_USERCONF) != 0) && !userconf)
/*
* Old bootloaders do not pass boothowto, and MI code
* has already handled userconfig before we get here
* and finally fetch the right options. So if we missed
* it, just do it here.
*/
userconf_prompt();
/* block clock interrupts and anything below */
splclock();
/* Enable device interrupts */
setpstate(getpstate()|PSTATE_IE);
if (config_rootfound("mainbus", NULL) == NULL)
panic("mainbus not configured");
/* Enable device interrupts */
setpstate(getpstate()|PSTATE_IE);
(void)spl0();
}
/*
* Further secondary CPU initialization.
*
* We are now running on our startup stack, with proper page tables.
* There is nothing to do but display some details about the CPU and its CMMUs.
*/
void
secondary_main()
{
struct cpu_info *ci = curcpu();
int s;
cpu_configuration_print(0);
ncpus++;
sched_init_cpu(ci);
nanouptime(&ci->ci_schedstate.spc_runtime);
ci->ci_curproc = NULL;
ci->ci_randseed = (arc4random() & 0x7fffffff) + 1;
/*
* Release cpu_hatch_mutex to let other secondary processors
* have a chance to run.
*/
hatch_pending_count--;
__cpu_simple_unlock(&cpu_hatch_mutex);
/* wait for cpu_boot_secondary_processors() */
__cpu_simple_lock(&cpu_boot_mutex);
__cpu_simple_unlock(&cpu_boot_mutex);
spl0();
SCHED_LOCK(s);
set_psr(get_psr() & ~PSR_IND);
SET(ci->ci_flags, CIF_ALIVE);
cpu_switchto(NULL, sched_chooseproc());
}
/*
* This function is where new threads start running. The arguments
* ENTRYPOINT, DATA1, and DATA2 are passed through from thread_fork.
*
* Because new code comes here from inside the middle of
* thread_switch, the beginning part of this function must match the
* tail of thread_switch.
*/
void
thread_startup(void (*entrypoint)(void *data1, unsigned long data2),
void *data1, unsigned long data2)
{
struct thread *cur;
cur = curthread;
/* Clear the wait channel and set the thread state. */
cur->t_wchan_name = NULL;
cur->t_state = S_RUN;
/* Release the runqueue lock acquired in thread_switch. */
spinlock_release(&curcpu->c_runqueue_lock);
/* Activate our address space in the MMU. */
as_activate();
/* Clean up dead threads. */
exorcise();
/* Enable interrupts. */
spl0();
/* Call the function. */
entrypoint(data1, data2);
/* Done. */
thread_exit();
}
void
cpu_hatch(void)
{
char *v = (char*)CPUINFO_VA;
int i;
for (i = 0; i < 4*PAGE_SIZE; i += sizeof(long))
flush(v + i);
cpu_pmap_init(curcpu());
CPUSET_ADD(cpus_active, cpu_number());
cpu_reset_fpustate();
curlwp = curcpu()->ci_data.cpu_idlelwp;
membar_Sync();
/* wait for the boot CPU to flip the switch */
while (sync_tick == 0) {
/* we do nothing here */
}
settick(0);
if (curcpu()->ci_system_clockrate[0] != 0) {
setstick(0);
stickintr_establish(PIL_CLOCK, stickintr);
} else {
tickintr_establish(PIL_CLOCK, tickintr);
}
spl0();
}
/*
* If "data set ready" is down return an error; otherwise
* wait until the dataset is in read state with no carrier,
* which means a record has just been received.
*/
dpwait()
{
for(;;) {
if ((DPADDR->dptcsr&DSRDY)==0 || dp11.dp_buf==0) {
u.u_error = EIO;
return(1);
}
spl6();
if (dp11.dp_state==READ && (DPADDR->dptcsr&CARRIER)==0) {
spl0();
return(0);
}
sleep(&dp11, DPPRI);
spl0();
}
}
static int
nd_poll(TIUSER *tiptr, int retry, int *eventp)
{
clock_t start_bolt = ddi_get_lbolt();
clock_t timout = TIMEOUT * (retry + 1);
int error;
nd_log("nfs_dump: calling t_kspoll\n");
*eventp = 0;
while (!*eventp && ((ddi_get_lbolt() - start_bolt) < timout)) {
/*
* Briefly enable interrupts before checking for a reply;
* the network transports do not yet support do_polled_io.
*/
int s = spl0();
splx(s);
if (error = t_kspoll(tiptr, 0, READWAIT, eventp)) {
nfs_perror(error,
"\nnfs_dump: t_kspoll failed: %m\n");
return (EIO);
}
runqueues();
}
if (retry == RETRIES && !*eventp) {
cmn_err(CE_WARN, "\tnfs_dump: server not responding");
return (EIO);
}
return (0);
}
void
mainbus_bootstrap(void)
{
/* Interrupts should be off (and have been off since startup) */
KASSERT(curthread->t_curspl > 0);
/* Initialize the system LAMEbus data */
lamebus = lamebus_init();
/* Probe CPUs (should these be done as device attachments instead?) */
lamebus_find_cpus(lamebus);
/*
* Print the device name for the main bus.
*/
kprintf("lamebus0 (system main bus)\n");
/*
* Now we can take interrupts without croaking, so turn them on.
* Some device probes might require being able to get interrupts.
*/
spl0();
/*
* Now probe all the devices attached to the bus.
* (This amounts to all devices.)
*/
autoconf_lamebus(lamebus, 0);
/*
* Configure the MIPS on-chip timer to interrupt HZ times a second.
*/
mips_timer_set(CPU_FREQUENCY / HZ);
}
void
cpu_configure(void)
{
if (config_rootfound("mainbus", NULL) == NULL)
panic("configure: mainbus not configured");
spl0();
}
/*
* void idle(void):
* When no processes are on the run queue, wait for something to come
* ready. Separated function for profiling.
*/
void
idle()
{
spl0();
uvm_pageidlezero();
__asm__ __volatile__("sleep");
splsched();
}
void
genppc_cpu_configure(void)
{
aprint_normal("vmmask %x schedmask %x highmask %x\n",
(u_int)imask[IPL_VM] & 0x7fffffff,
(u_int)imask[IPL_SCHED] & 0x7fffffff,
(u_int)imask[IPL_HIGH] & 0x7fffffff);
spl0();
}
/*
* Give up the processor till a wakeup occurs
* on chan, at which time the process
* enters the scheduling queue at priority pri.
* The most important effect of pri is that when
* pri<0 a signal cannot disturb the sleep;
* if pri>=0 signals will be processed.
* Callers of this routine must be prepared for
* premature return, and check that the reason for
* sleeping has gone away.
*/
sleep(chan, pri)
{
register *rp, s;
s = PS->integ;
rp = u.u_procp;
if(pri >= 0) {
if(issig())
goto psig;
spl6();
rp->p_wchan = chan;
rp->p_stat = SWAIT;
rp->p_pri = pri;
spl0();
if(runin != 0) {
runin = 0;
wakeup(&runin);
}
swtch();
if(issig())
goto psig;
} else {
spl6();
rp->p_wchan = chan;
rp->p_stat = SSLEEP;
rp->p_pri = pri;
spl0();
swtch();
}
PS->integ = s;
return;
/*
* If priority was low (>=0) and
* there has been a signal,
* execute non-local goto to
* the qsav location.
* (see trap1/trap.c)
*/
psig:
aretu(u.u_qsav);
}
/* mark_global_nodes: Add lines matching a pattern to global queue. */
int
mark_global_nodes (int want_match, ed_buffer_t *ed)
{
regmatch_t rm[1];
regex_t *re;
ed_line_node_t *lp;
off_t from = ed->exec->region->start;
off_t to = ed->exec->region->end;
off_t n = from ? to - from + 1 : 0;
char dc = *ed->input; /* pattern delimiting char */
char *s;
spl1 ();
if (!(re = get_compiled_regex (dc, RE_SEARCH, ed)))
{
spl0 ();
return ERR;
}
if (*ed->input == dc && *ed->input != '\n')
++ed->input;
reset_global_queue (ed);
spl0 ();
lp = get_line_node (from, ed);
for (; n; --n, lp = lp->q_forw)
{
if (!(s = get_buffer_line (lp, ed)))
return ERR;
#ifdef REG_STARTEND
rm->rm_so = 0;
rm->rm_eo = lp->len;
if ((!regexec (re, s, 0, rm, REG_STARTEND)) == want_match
&& !append_global_node (lp, ed))
#else
if (ed->state->is_binary)
NUL_TO_NEWLINE (s, lp->len);
if (!regexec (re, s, 0, NULL, 0) == want_match
&& !append_global_node (lp, ed))
#endif /* !REG_STARTEND */
return ERR;
}
return 0;
}
void
cpu_configure(void)
{
(void)splhigh();
if (config_rootfound("zbbus", NULL) == NULL)
panic("no zbbus found");
spl0();
}
void
cpu_configure(void)
{
intr_init();
splhigh();
if (config_rootfound("mainbus", NULL) == NULL)
panic("no mainbus found");
spl0();
}
void
cpu_configure(void)
{
irq_init();
config_rootfound("cpu", NULL);
config_rootfound("arcvideo", NULL);
config_rootfound("iobus", NULL);
spl0();
fiq_on();
}
pcclose(dev, flag)
{
if (flag==0) {
spl4();
while (getc(&pc11.pcin) >= 0);
PCADDR->pcrcsr = 0;
pc11.pcstate = CLOSED;
spl0();
} else
pcleader();
}
/*
* cpu_configure:
* called at boot time, configure all devices on the system
*/
void
cpu_configure(void)
{
mrg_init(); /* Init Mac ROM Glue */
startrtclock(); /* start before ADB attached */
if (config_rootfound("mainbus", NULL) == NULL)
panic("No mainbus found!");
(void)spl0();
}
void
cpu_configure()
{
/* Start configuration */
splhigh();
if (config_rootfound("mainbus", NULL) == NULL)
panic("no mainbus found");
/* Configuration is finished, turn on interrupts. */
spl0();
}
