static inline int dpidle_handler(int cpu)
{
    int ret = 0;
    if (idle_switch[IDLE_TYPE_DP]) {
#ifdef SPM_DEEPIDLE_PROFILE_TIME
        gpt_get_cnt(SPM_PROFILE_APXGPT,&dpidle_profile[0]);
#endif
        if (dpidle_can_enter()) {
            dpidle_pre_handler();
            spm_go_to_dpidle(slp_spm_deepidle_flags, 0);
            dpidle_post_handler();
            ret = 1;

#ifdef CONFIG_SMP
            idle_ver("DP:timer_left=%d, timer_left2=%d, delta=%d\n",
                dpidle_timer_left, dpidle_timer_left2, dpidle_timer_left-dpidle_timer_left2);
#else
            idle_ver("DP:timer_left=%d, timer_left2=%d, delta=%d, timeout val=%d\n",
                dpidle_timer_left, dpidle_timer_left2, dpidle_timer_left2-dpidle_timer_left,dpidle_timer_cmp-dpidle_timer_left);
#endif
#ifdef SPM_DEEPIDLE_PROFILE_TIME
            gpt_get_cnt(SPM_PROFILE_APXGPT,&dpidle_profile[3]);
            idle_ver("1:%u, 2:%u, 3:%u, 4:%u\n",
                 dpidle_profile[0], dpidle_profile[1], dpidle_profile[2],dpidle_profile[3]);
#endif
        }
    }

    return ret;
}
Exemple #2
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static inline int dpidle_handler(int cpu)
{
    int ret = 0;
    if (idle_switch[IDLE_TYPE_DP]) {
        if (dpidle_can_enter()) {
            spm_go_to_dpidle(dpidle_cpu_pdn, 0);
            ret = 1;
        }
    }

    return ret;
}
static int mt6735_dpidle_enter(struct cpuidle_device *dev,
			      struct cpuidle_driver *drv, int index)
{
    if (printk_ratelimit())
        printk(KERN_WARNING "MT6735 cpuidle DPIDLE\n");

#if 1
    dpidle_pre_handler();
    spm_go_to_dpidle(slp_spm_deepidle_flags, 0);
    dpidle_post_handler();
#else
	cpu_do_idle();
#endif

    idle_cnt_inc(IDLE_TYPE_DP, 0);

	return index;
}
static inline int dpidle_handler(int cpu)
{
    int ret = 0;
    if (idle_switch[IDLE_TYPE_DP]) {
        if (dpidle_can_enter()) {
            dpidle_pre_handler();
            spm_go_to_dpidle(slp_spm_deepidle_flags, 0);
            dpidle_post_handler();
            ret = 1;
#ifdef CONFIG_SMP
            idle_ver("DP:timer_left=%d, timer_left2=%d, delta=%d\n",
                dpidle_timer_left, dpidle_timer_left2, dpidle_timer_left-dpidle_timer_left2);
#else
            idle_ver("DP:timer_left=%d, timer_left2=%d, delta=%d, timeout val=%d\n",
                dpidle_timer_left, dpidle_timer_left2, dpidle_timer_left2-dpidle_timer_left,dpidle_timer_cmp-dpidle_timer_left);
#endif
        }
    }

    return ret;
}
int dpidle_handler(int cpu)
{
    int ret = 0;
    wake_reason_t wr = WR_NONE;
    if (idle_switch[IDLE_TYPE_DP]) {
        if (dpidle_can_enter()) {
            idle_ver("idle-enter SPM: Deepidle\n");
            wr = spm_go_to_dpidle(dpidle_cpu_pdn, dpidle_cpu_pwrlevel);
            idle_ver("deepidle %s\n",spm_get_wake_up_result(SPM_PCM_DEEP_IDLE));
#ifdef CONFIG_SMP
            idle_ver("timer_left=%d, timer_left2=%d, delta=%d\n",
                     dpidle_timer_left, dpidle_timer_left2, dpidle_timer_left-dpidle_timer_left2);
#else
            idle_ver("timer_left=%d, timer_left2=%d, delta=%d, timeout val=%d\n",
                     dpidle_timer_left, dpidle_timer_left2, dpidle_timer_left2-dpidle_timer_left,dpidle_timer_cmp-dpidle_timer_left);
#endif
            ret = 1;
        }

    }

    return ret;
}