static void ssb_core_reset(struct b44_private *bp)
{
u32 val;
const u32 mask = (SBTMSLOW_CLOCK | SBTMSLOW_FGC | SBTMSLOW_RESET);
ssb_core_disable(bp);
bw32(bp, B44_SBTMSLOW, mask);
bflush(bp, B44_SBTMSLOW, 1);
/* Clear SERR if set, this is a hw bug workaround. */
if (br32(bp, B44_SBTMSHIGH) & SBTMSHIGH_SERR)
bw32(bp, B44_SBTMSHIGH, 0);
val = br32(bp, B44_SBIMSTATE);
if (val & (SBIMSTATE_BAD)) {
bw32(bp, B44_SBIMSTATE, val & ~SBIMSTATE_BAD);
}
bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
bflush(bp, B44_SBTMSLOW, 1);
bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK));
bflush(bp, B44_SBTMSLOW, 1);
}
static void ssb_core_reset(struct b44 *bp)
{
u32 val;
ssb_core_disable(bp);
bw32(bp, B44_SBTMSLOW, (SBTMSLOW_RESET | SBTMSLOW_CLOCK | SBTMSLOW_FGC));
br32(bp, B44_SBTMSLOW);
udelay(1);
/* Clear SERR if set, this is a hw bug workaround. */
if (br32(bp, B44_SBTMSHIGH) & SBTMSHIGH_SERR)
bw32(bp, B44_SBTMSHIGH, 0);
val = br32(bp, B44_SBIMSTATE);
if (val & (SBIMSTATE_IBE | SBIMSTATE_TO))
bw32(bp, B44_SBIMSTATE, val & ~(SBIMSTATE_IBE | SBIMSTATE_TO));
bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
br32(bp, B44_SBTMSLOW);
udelay(1);
bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK));
br32(bp, B44_SBTMSLOW);
udelay(1);
}
/**
* Remove device
*
* @v pci PCI device
*/
static void b44_remove(struct pci_device *pci)
{
struct net_device *netdev = pci_get_drvdata(pci);
struct b44_private *bp = netdev_priv(netdev);
ssb_core_disable(bp);
unregister_netdev(netdev);
iounmap(bp->regs);
netdev_nullify(netdev);
netdev_put(netdev);
}
