int main() {

	ssc_init("/dev/ttyUSB0", 9600);
	pan( 0 );
	tilt( 0 );

	cascade = (CvHaarClassifierCascade*)cvLoad(
		"cascade.xml", 0, 0, 0 );
	if( !cascade )
    {
        fprintf( stderr, "ERROR: Could not load classifier cascade\n" );
        return 1;
    }
	storage = cvCreateMemStorage(0);

	struct camera *cam = init_camera( LCAM );
	load_params( cam );

	cvNamedWindow( "Face", CV_WINDOW_AUTOSIZE );

	CvPoint pt1, pt2;
	CvRect *r;
	CvSeq *faces;
	float multip = 0.1;
	int x_diff, y_diff;

	while( cvWaitKey( 10 ) == -1 ) {

		cap_frame( cam );
		undistort( cam );
		
		cvClearMemStorage( storage );
		faces = cvHaarDetectObjects( cam->undist, cascade, storage,
        	1.1, 2, CV_HAAR_DO_CANNY_PRUNING, cvSize(40, 40) );

		if (faces->total > 0) {
;
			r = (CvRect*)cvGetSeqElem( faces, 0 );
			pt1.x = r->x;
			pt2.x = r->x + r->width;
			pt1.y = r->y;
			pt2.y = r->y + r->height;
			cvRectangle( cam->undist, pt1, pt2, CV_RGB(255,0,0), 3, 8, 0 );
			
			x_diff = (cam->frame->width / 2) - (r->x + (r->width/2)) ;
            y_diff = (cam->frame->height / 2) - (r->y + (r->height/2)) ;

            pan( -(int)(x_diff * multip) );
            tilt( (int)(y_diff * multip) );

		}

		cvShowImage( "Face", cam->undist );

	}
	cvDestroyAllWindows();
	cvReleaseMemStorage( &storage );
	free_camera( cam );
}
Exemple #2
0
/************************************************************************
 * Function name:	init
 * Description:	Initialize SSC interface 
 * Input value:	None
 * Return value:	0 on success
 ***********************************************************************/
int sflash_init(void)
{
  asc_puts("SFLASH\n");
	ssc_init((u32)SFLASH_BAUDRATE);
	spi_sflash.read_cmd    = SFLASH_READ;

#if defined(ON_VENUS) || defined(ON_IKOS)
	spi_sflash.cs = 0;      /* SPI_CS1 */
#else
//	spi_sflash.cs = 1;      /* SPI_CS2 */
	spi_sflash.cs = 0;      /* SPI_CS1 actual setting */

#endif
	spi_sflash.addr_cycles = SPI_ADDR_CYC_MAX;
	return SFLASH_OK;
}
Exemple #3
0
//------------------------------------------------------------------------------
/// Main function
//------------------------------------------------------------------------------
int main(void)
{
    unsigned char key;
    unsigned char isValid;

    // Configure all pins
    PIO_Configure(pins, PIO_LISTSIZE(pins));

    LED_Configure(0);
    LED_Set(0);
    LED_Configure(1);
    LED_Set(1);

    // Initialize the DBGU
    TRACE_CONFIGURE(DBGU_STANDARD, 115200, BOARD_MCK);

    // Switch to Main clock
    AT91C_BASE_PMC->PMC_MCKR = (AT91C_BASE_PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
    while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);

    // Configure PLL to 98.285MHz
    *AT91C_CKGR_PLLR = ((1 << 29) | (171 << AT91C_CKGR_MUL_SHIFT) \
        | (0x0 << AT91C_CKGR_OUT_SHIFT) |(0x3f << AT91C_CKGR_PLLCOUNT_SHIFT) \
        | (21 << AT91C_CKGR_DIV_SHIFT));
    while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) == 0);

    // Configure master clock in two operations
    AT91C_BASE_PMC->PMC_MCKR = (( AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLLA_CLK) & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
    while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);
    AT91C_BASE_PMC->PMC_MCKR = ( AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLLA_CLK);
    while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0);

    // DBGU reconfiguration
    DBGU_Configure(DBGU_STANDARD, 115200, SSC_MCK);

    // Configure and enable the TWI (required for accessing the DAC)
    *AT91C_PMC_PCER = (1<< AT91C_ID_TWI0); 
    TWI_ConfigureMaster(AT91C_BASE_TWI0, TWI_CLOCK, SSC_MCK);
    TWID_Initialize(&twid, AT91C_BASE_TWI0);

    printf("-- OsmoSDR firmware (" BOARD_NAME ") " GIT_REVISION " --\n\r");
    printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);

	req_ctx_init();
	PIO_InitializeInterrupts(0);

	cmd_state.out = vprintf;
	uart_cmd_reset(&cmd_state);
	uart_cmds_register(cmds, sizeof(cmds)/sizeof(cmds[0]));

	fastsource_init();
	VBus_Configure();

	power_peripherals(1);

	si570_init(&si570, &twid, SI570_I2C_ADDR);
	set_si570_freq(30000000);

	sam3u_e4k_init(&e4k, &twid, E4K_I2C_ADDR);
	e4k.vco.fosc = 30000000;

	osdr_fpga_init(SSC_MCK);
	//osdr_fpga_reg_write(OSDR_FPGA_REG_ADC_TIMING, (1 << 8) | 255);
	//osdr_fpga_reg_write(OSDR_FPGA_REG_PWM1, (1 << 400) | 800);
	osdr_fpga_set_iq_swap(0);

	ssc_init();
	e4k_init(&e4k);
	e4k_init(&e4k);

    // Enter menu loop
    while (1) {

    	if (DBGU_IsRxReady()) {
        	key = DBGU_GetChar();
        	// Process user input
        	if (uart_cmd_char(&cmd_state, key) == 1) {
        		//ssc_stats();
        	}
    	}
    	ssc_dma_start();
    	fastsource_start();
    }
}