static jresult_t start_transfer(td243fc_rev2_softc_t *sc, jint_t ep_n,
request_t *req)
{
td243fc_rev2_ep_t *ep = &sc->ep[ep_n];
juint32_t transfer_size = req->transfer_size - req->bytes_transferred;
KASSERT(!ep->req, ("Request still running\n"));
DBG_V(DSLAVE_DCD, ("DCD: start_transfer, ep=%d %s %d bytes "
"(z%d zlp%d)\n", ep_n, req->direction == DIRECTION_IN ? "IN" : "OUT",
req->transfer_size, req->zero, req->ep0_zlp_reply));
if (ep->pipe && ep->pipe->status == PIPE_STALLLED)
{
DBG_V(DSLAVE_DCD, ("Trying to start transfer on Stalled endpoint\n"));
goto Exit;
}
ep->req = req;
if (req->direction == DIRECTION_IN && ep_n == 1)
{
/* Make sure data stage start with DATA1 token */
TOGGLE_IF_NOT_SET(TD243FC_EP_TOGGLE_REG, TD243FC_EP_BIT(0, 1));
}
/* HSU Addition */
/* Don't start DMA on zero length OUT transaction. Sometimes it interferes
with the DMA of the next SETUP transaction */
if (transfer_size)
/* HSU End */
start_dma_transfer(sc, ep_n, transfer_size);
else
start_zero_packet(sc, ep_n);
Exit:
return 0;
}
/*
* Function called when the module is initialized
*/
static int __init dma_module_init(void) {
int error;
int i = 0;
transfers[0].data_type = OMAP_DMA_DATA_TYPE_S8;
/*transfers[1].data_type = OMAP_DMA_DATA_TYPE_S16;
transfers[2].data_type = OMAP_DMA_DATA_TYPE_S32;*/
for(i = 0; i < TRANSFER_COUNT; i++){
/* Create the transfer for the test */
transfers[i].device_id = OMAP_DMA_NO_DEVICE;
transfers[i].sync_mode = OMAP_DMA_SYNC_ELEMENT;
transfers[i].data_burst = OMAP_DMA_DATA_BURST_DIS;
transfers[i].endian_type = DMA_TEST_LITTLE_ENDIAN;
transfers[i].addressing_mode = OMAP_DMA_AMODE_POST_INC;
transfers[i].dst_addressing_mode = OMAP_DMA_AMODE_POST_INC;
transfers[i].priority = DMA_CH_PRIO_HIGH;
transfers[i].buffers.buf_size = (1024 * 1024);
/* Request a dma transfer */
error = request_dma(&transfers[i]);
if( error ){
set_test_passed(0);
return 1;
}
/* Request 2 buffer for the transfer and fill them */
error = create_transfer_buffers(&(transfers[i].buffers));
if( error ){
set_test_passed(0);
return 1;
}
fill_source_buffer(&(transfers[i].buffers));
/* Setup the dma transfer parameters */
setup_dma_transfer(&transfers[i]);
}
for(i = 0; i < TRANSFER_COUNT; i++){
/* Start the transfers */
start_dma_transfer(&transfers[i]);
}
/* Poll if the all the transfers have finished */
for(i = 0; i < TRANSFER_POLL_COUNT; i++){
if(get_transfers_finished()){
mdelay(TRANSFER_POLL_TIME);
check_test_passed();
break;
}else{
mdelay(TRANSFER_POLL_TIME);
}
}
/* This will happen if the poll retries have been reached*/
if(i == TRANSFER_POLL_COUNT){
set_test_passed(0);
return 1;
}
return 0;
}
static void prepare_setup_transfer(td243fc_rev2_softc_t *sc)
{
/* Set EP OUT for setup transfer */
TOGGLE_IF_SET(TD243FC_EP_TOGGLE_REG, TD243FC_EP_BIT(0, 0));
start_dma_transfer(sc, 0, 8);
}
/*
* Function called when the module is initialized
*/
static int __init dma_module_init(void) {
int error;
int i = 0;
wait_oswr_trigger = -1;
for (i = 0; i < TRANSFER_COUNT; i++) {
/* Create the transfer for the test */
transfers[i].device_id = OMAP_DMA_NO_DEVICE;
transfers[i].sync_mode = OMAP_DMA_SYNC_ELEMENT;
transfers[i].data_burst = OMAP_DMA_DATA_BURST_DIS;
transfers[i].data_type = OMAP_DMA_DATA_TYPE_S8;
transfers[i].endian_type = DMA_TEST_LITTLE_ENDIAN;
transfers[i].addressing_mode = OMAP_DMA_AMODE_POST_INC;
transfers[i].dst_addressing_mode = OMAP_DMA_AMODE_POST_INC;
transfers[i].priority = DMA_CH_PRIO_HIGH;
transfers[i].buffers.buf_size = (128 * (i+1)*(i+1)) + i % 2;
transfers[i].src_ei = transfers[i].dest_ei = 0;
transfers[i].src_fi = transfers[i].dest_fi = 0;
/* Request a dma transfer */
error = request_dma(&transfers[i]);
if( error ){
set_test_passed(0);
return 1;
}
/* Request 2 buffer for the transfer and fill them */
error = create_transfer_buffers(&(transfers[i].buffers));
if( error ){
set_test_passed(0);
return 1;
}
fill_source_buffer(&(transfers[i].buffers));
/* Setup the dma transfer parameters */
setup_dma_transfer(&transfers[i]);
}
for(i = 0; i < TRANSFER_COUNT; i++){
/* Start the transfers */
start_dma_transfer(&transfers[i]);
printk("Register Dump After configuration:\n");
printk("DMA channel number : %d\n", transfers[i].transfer_id);
dma_channel_registers_dump(transfers[i].transfer_id, reg_dump_after_config);
}
/* Poll if the all the transfers have finished */
for(i = 0; i < TRANSFER_POLL_COUNT; i++){
if(get_transfers_finished()){
mdelay(TRANSFER_POLL_TIME);
check_test_passed();
break;
}else{
mdelay(TRANSFER_POLL_TIME);
}
}
/* This will happen if the poll retries have been reached*/
if(i == TRANSFER_POLL_COUNT){
set_test_passed(0);
return 1;
}
return 0;
}
