static int mpulcd_init_panel(struct device *dev, dma_addr_t phys, int memsize,
struct stmp3xxx_platform_fb_entry *pentry)
{
int ret = 0;
lcd_clk = clk_get(dev, "lcdif");
if (IS_ERR(lcd_clk)) {
ret = PTR_ERR(lcd_clk);
goto out;
}
ret = clk_enable(lcd_clk);
if (ret)
goto out1;
ret = clk_set_rate(lcd_clk, 24000);
if (ret)
goto out2;
mpulcd_init_lcdif();
stmp3xxx_lcdif_dma_init(dev, phys, memsize, 1);
mpulcd_init_panel_hw();
stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_INIT, pentry);
return 0;
out2:
clk_disable(lcd_clk);
out1:
clk_put(lcd_clk);
out:
return ret;
}
static void release_panel(struct device *dev,
struct stmp3xxx_platform_fb_entry *pentry)
{
stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_RELEASE, pentry);
uninit_pinmux_spi();
uninit_pinmux();
release_dotclk_panel();
stmp3xxx_lcdif_dma_release();
clk_disable(lcd_clk);
clk_put(lcd_clk);
}
static void mpulcd_release_panel(struct device *dev,
struct stmp3xxx_platform_fb_entry *pentry)
{
stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_RELEASE, pentry);
mpulcd_display_off();
stmp3xxx_release_pin_group(&lcd_pins, "mpulcd_pin");
stmp3xxx_lcdif_dma_release();
clk_disable(lcd_clk);
clk_put(lcd_clk);
gpio_direction_output(PINID_LCD_ENABLE, 0);
}
static int init_panel(struct device *dev, dma_addr_t phys, int memsize,
struct stmp3xxx_platform_fb_entry *pentry)
{
int ret = 0;
lcd_clk = clk_get(dev, "lcdif");
if (IS_ERR(lcd_clk)) {
ret = PTR_ERR(lcd_clk);
goto out_1;
}
ret = clk_enable(lcd_clk);
if (ret) {
clk_put(lcd_clk);
goto out_1;
}
ret = clk_set_rate(lcd_clk,
1000000/pentry->cycle_time_ns); /* kHz */
if (ret) {
clk_disable(lcd_clk);
clk_put(lcd_clk);
goto out_1;
}
ret = init_pinmux();
if (ret)
goto out_1;
ret = init_pinmux_spi();
if (ret)
goto out_2;
init_panel_hw();
ret = stmp3xxx_lcdif_dma_init(dev, phys, memsize, 0);
if (ret)
goto out_3;
setup_dotclk_panel(DOTCLK_V_PULSE_WIDTH, DOTCLK_V_PERIOD,
DOTCLK_V_WAIT_CNT, DOTCLK_V_ACTIVE,
DOTCLK_H_PULSE_WIDTH, DOTCLK_H_PERIOD,
DOTCLK_V_WAIT_CNT, DOTCLK_H_ACTIVE, 1);
stmp3xxx_lcd_set_bl_pdata(pentry->bl_data);
stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_INIT, pentry);
return 0;
out_3:
uninit_pinmux_spi();
out_2:
uninit_pinmux();
out_1:
return ret;
}
static int init_panel(struct device *dev, dma_addr_t phys, int memsize,
struct stmp3xxx_platform_fb_entry *pentry)
{
int ret = 0;
lcd_clk = clk_get(dev, "lcdif");
if (IS_ERR(lcd_clk)) {
ret = PTR_ERR(lcd_clk);
goto out_1;
}
ret = clk_enable(lcd_clk);
if (ret) {
clk_put(lcd_clk);
goto out_1;
}
ret = clk_set_rate(lcd_clk,
1000000/pentry->cycle_time_ns); /* kHz */
if (ret) {
clk_disable(lcd_clk);
clk_put(lcd_clk);
goto out_1;
}
/*
* Make sure we do a high-to-low transition to reset the panel.
* First make it low for 100 msec, hi for 10 msec, low for 10 msec,
* then hi.
*/
HW_LCDIF_CTRL1_CLR(BM_LCDIF_CTRL1_RESET); /* low */
mdelay(100);
HW_LCDIF_CTRL1_SET(BM_LCDIF_CTRL1_RESET); /* high */
mdelay(10);
HW_LCDIF_CTRL1_CLR(BM_LCDIF_CTRL1_RESET); /* low */
/* For the Samsung, Reset must be held low at least 30 uSec
* Therefore, we'll hold it low for about 10 mSec just to be sure.
* Then we'll wait 1 mSec afterwards.
*/
mdelay(10);
HW_LCDIF_CTRL1_SET(BM_LCDIF_CTRL1_RESET); /* high */
mdelay(1);
ret = init_pinmux();
if (ret)
goto out_1;
ret = init_pinmux_spi();
if (ret)
goto out_2;
setup_dotclk_panel(DOTCLK_V_PULSE_WIDTH, DOTCLK_V_PERIOD,
DOTCLK_V_WAIT_CNT, DOTCLK_V_ACTIVE,
DOTCLK_H_PULSE_WIDTH, DOTCLK_H_PERIOD,
DOTCLK_H_WAIT_CNT, DOTCLK_H_ACTIVE, 0);
ret = stmp3xxx_lcdif_dma_init(dev, phys, memsize, 1);
if (ret)
goto out_3;
stmp3xxx_lcd_set_bl_pdata(pentry->bl_data);
stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_INIT, pentry);
return 0;
out_3:
uninit_pinmux_spi();
out_2:
uninit_pinmux();
out_1:
return ret;
}
