static void justin_panel_disable_hdmi(struct omap_dss_device *dssdev)
{
int MaximumCount = 10;
while ( hdmi_power_initialize==0 && MaximumCount-->0)
msleep(100);
MaximumCount = 10;
extern int is_hdmi_nxp_driver_enabled(void);
while(is_hdmi_nxp_driver_enabled() && MaximumCount-->0)
msleep(100);
/* prevent power off, before closing nxp driver.*/
// CONTROL_PADCONF_DSS_PCLK
omap_writel(omap_readl(0x480020D4) | 0x7, 0x480020D4);
justin_hdmi_reset_enable(0);
//2010-5-8 [email protected] sub-PMIC Power off
subpm_set_output(LDO1,0);
subpm_output_enable();
/* 20110531 comment by [email protected]
subpm_set_output(LDO2,0);
subpm_output_enable();
*/
#if 0
subpm_set_output(SWREG,0);
subpm_output_enable();
#endif
msleep(40);
if(HDMI_DSS_DBG) printk(KERN_INFO "%s :: Disable_hdmi\n",__func__);
hdmi_power_initialize =0;
}
static int omap_hsmmc_1_set_power(struct device *dev, int slot, int power_on,
int vdd)
{
int ret = 0;
struct omap_hsmmc_host *host = platform_get_drvdata(to_platform_device(dev));
omap_hsmmc1_before_set_reg(dev, slot, power_on, vdd);
//if((host->suspended) != 1) // not suspend case! do control regulator ON,OFF regularly
{
if (power_on)
{
subpm_set_output(LDO1, 1);
subpm_output_enable();
}
else
{
subpm_set_output(LDO1, 0);
subpm_output_enable();
}
}
#if 0
else // suspend case! ON is allowed , OFF is not allowed
{
if (power_on)
static int justin_panel_enable_hdmi(struct omap_dss_device *dssdev)
{
//[[ 20120521 [email protected] for HDMI start
int MaximumCount = 10;
while ( hdmi_power_initialize==1 && MaximumCount-->0)
msleep(100);
hdmi_power_initialize =1;
// CONTROL_PADCONF_DSS_PCLK
omap_writel(omap_readl(0x480020D4) & ~0x7, 0x480020D4);
extern void lp8720_reinit();
lp8720_reinit();
mdelay(20);
//justin_panel_power_enable(1);
justin_hdmi_reset_enable(1);
mdelay(20);
//2010-5-8 [email protected] sub-PMIC Power on
#if 0 //20120521 [email protected] for HDMI
subpm_set_output(SWREG,1);
subpm_output_enable();
#endif
subpm_set_output(LDO1,1);
subpm_output_enable();
/* 20110531 comment by [email protected]
subpm_set_output(LDO2,1);
subpm_output_enable();
*/
if(HDMI_DSS_DBG) printk(KERN_INFO "%s :: Enable_hdmi\n",__func__);
msleep(20);
return 0;
}
static int dw9716_lens_power_set(enum v4l2_power power)
{
static enum v4l2_power previous_pwr = V4L2_POWER_OFF;
switch (power) {
case V4L2_POWER_ON:
printk("dw9716_lens_power_set(ON)\n");
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.09.19] - CAM
gpio_direction_output(SUBPM_ENABLE, 1);
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.09.19] - CAM
#if 1
subpm_set_output(LDO5,1);
subpm_output_enable();
#endif
/* nStandBy is active HIGH. set HIGH to release reset */
gpio_direction_output(DW9716_VCM_ENABLE, true);
// gpio_set_value(DW9716_VCM_ENABLE, 0);
gpio_set_value(DW9716_VCM_ENABLE, 1);
gpio_direction_output(DW9716_VCM_ENABLE, 1);
break;
case V4L2_POWER_OFF:
//subpm_set_output(LDO5,0);
//subpm_output_enable();
printk( "dw9716_lens_power_set(OFF)\n");
//gpio_free(DW9716_VCM_ENABLE);
break;
case V4L2_POWER_STANDBY:
printk ("dw9716_lens_power_set(STANDBY)");
//gpio_set_value(DW9716_VCM_ENABLE, 0);
//subpm_set_output(LDO5,0);
//subpm_output_enable();
break;
}
previous_pwr = power;
return 0;
}
static int dw9716_lens_power_set(enum v4l2_power power)
{
static enum v4l2_power previous_pwr = V4L2_POWER_OFF;
switch (power) {
case V4L2_POWER_ON:
printk("dw9716_lens_power_set(ON)\n");
#if 1
subpm_set_output(LDO5,1);
subpm_output_enable();
#endif
/* nStandBy is active HIGH. set HIGH to release reset */
gpio_direction_output(DW9716_VCM_ENABLE, true);
// gpio_set_value(DW9716_VCM_ENABLE, 0);
gpio_set_value(DW9716_VCM_ENABLE, 1);
gpio_direction_output(DW9716_VCM_ENABLE, 1);
break;
case V4L2_POWER_OFF:
//subpm_set_output(LDO5,0);
//subpm_output_enable();
printk( "dw9716_lens_power_set(OFF)\n");
//gpio_free(DW9716_VCM_ENABLE);
break;
case V4L2_POWER_STANDBY:
printk ("dw9716_lens_power_set(STANDBY)");
//gpio_set_value(DW9716_VCM_ENABLE, 0);
//subpm_set_output(LDO5,0);
//subpm_output_enable();
break;
}
previous_pwr = power;
return 0;
}
static int imx072_sensor_power_set(struct v4l2_int_device *s, enum v4l2_power power)
{
struct omap34xxcam_videodev *vdev = s->u.slave->master->priv;
struct isp_device *isp = dev_get_drvdata(vdev->cam->isp);
struct isp_csi2_lanes_cfg lanecfg;
struct isp_csi2_phy_cfg phyconfig;
static enum v4l2_power previous_power = V4L2_POWER_OFF;
// 20110426 [email protected] Update omap_pm_set_max_mpu_wakeup_lat() for 2.6.35 kernel [START]
static struct pm_qos_request_list *qos_request;
// 20110426 [email protected] Update omap_pm_set_max_mpu_wakeup_lat() for 2.6.35 kernel [END]
int err = 0;
switch (power) {
case V4L2_POWER_ON:
/* Power Up Sequence */
printk(KERN_DEBUG "imx072_sensor_power_set(ON)\n");
// [email protected] [TBD]Temporarily block the following code because PM APIs have been changed [START]
#if 1
/*
* Through-put requirement:
* Set max OCP freq for 3630 is 200 MHz through-put
* is in KByte/s so 200000 KHz * 4 = 800000 KByte/s
*/
omap_pm_set_min_bus_tput(vdev->cam->isp,
OCP_INITIATOR_AGENT, 800000);
/* Hold a constraint to keep MPU in C1 */
omap_pm_set_max_mpu_wakeup_lat(&qos_request, 12);
#endif
// [email protected] [TBD]Temporarily block the following code because PM APIs have been changed [END]
isp_csi2_reset(&isp->isp_csi2);
lanecfg.clk.pol = IMX072_CSI2_CLOCK_POLARITY;
lanecfg.clk.pos = IMX072_CSI2_CLOCK_LANE;
lanecfg.data[0].pol = IMX072_CSI2_DATA0_POLARITY;
lanecfg.data[0].pos = IMX072_CSI2_DATA0_LANE;
lanecfg.data[1].pol = IMX072_CSI2_DATA1_POLARITY;
lanecfg.data[1].pos = IMX072_CSI2_DATA1_LANE;
lanecfg.data[2].pol = 0;
lanecfg.data[2].pos = 0;
lanecfg.data[3].pol = 0;
lanecfg.data[3].pos = 0;
isp_csi2_complexio_lanes_config(&isp->isp_csi2, &lanecfg);
isp_csi2_complexio_lanes_update(&isp->isp_csi2, true);
isp_csi2_ctrl_config_ecc_enable(&isp->isp_csi2, true);
phyconfig.ths_term = IMX072_CSI2_PHY_THS_TERM;
phyconfig.ths_settle = IMX072_CSI2_PHY_THS_SETTLE;
phyconfig.tclk_term = IMX072_CSI2_PHY_TCLK_TERM;
phyconfig.tclk_miss = IMX072_CSI2_PHY_TCLK_MISS;
phyconfig.tclk_settle = IMX072_CSI2_PHY_TCLK_SETTLE;
isp_csi2_phy_config(&isp->isp_csi2, &phyconfig);
isp_csi2_phy_update(&isp->isp_csi2, true);
isp_configure_interface(vdev->cam->isp, &imx072_if_config);
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.09.19] - CAM
gpio_direction_output(SUBPM_ENABLE, 1);
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.09.19] - CAM
/* Request and configure gpio pins */
if (gpio_request(IMX072_RESET_GPIO, "imx072_rst") != 0)
return -EIO;
subpm_set_output(SWREG,1);
subpm_output_enable();
subpm_set_output(LDO4,1);
subpm_output_enable();
subpm_set_output(LDO3,1);
subpm_output_enable();
twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
VAUX_1_8_V, TWL4030_VAUX4_DEDICATED);
twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
VAUX_DEV_GRP_P1, TWL4030_VAUX4_DEV_GRP);
udelay(100);
/* have to put sensor to reset to guarantee detection */
gpio_direction_output(IMX072_RESET_GPIO, 1);
// gpio_set_value(IMX072_RESET_GPIO, 1);
udelay(100);
// gpio_direction_output(IMX072_RESET_GPIO, 0);
gpio_set_value(IMX072_RESET_GPIO, 0);
udelay(1500);
/* nRESET is active LOW. set HIGH to release reset */
// gpio_direction_output(IMX072_RESET_GPIO, 1);
gpio_set_value(IMX072_RESET_GPIO, 1);
udelay(300);
break;
case V4L2_POWER_OFF:
subpm_set_output(LDO5,0);
subpm_output_enable();
gpio_set_value(DW9716_VCM_ENABLE, 0);
isp_disable_mclk(isp);
isp_csi2_complexio_power(&isp->isp_csi2, ISP_CSI2_POWER_OFF);
isp_csi2_reset(&isp->isp_csi2);
isp_csi2_ctrl_config_ecc_enable(&isp->isp_csi2, true);
isp_csi2_complexio_power(&isp->isp_csi2, ISP_CSI2_POWER_OFF);
isp_disable_mclk(isp);
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.09.19] - CAM
gpio_direction_output(SUBPM_ENABLE, 0);
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.09.19] - CAM
break;
case V4L2_POWER_STANDBY:
printk(KERN_DEBUG "imx072_sensor_power_set(%s)\n",
(power == V4L2_POWER_OFF) ? "OFF" : "STANDBY");
/* Power Down Sequence */
isp_csi2_complexio_power(&isp->isp_csi2, ISP_CSI2_POWER_OFF);
twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
VAUX_DEV_GRP_NONE, TWL4030_VAUX4_DEV_GRP);
gpio_set_value(IMX072_RESET_GPIO, 0);
udelay(5);
subpm_set_output(LDO3,0);
subpm_output_enable();
subpm_set_output(LDO4,0);
subpm_output_enable();
subpm_set_output(SWREG,0);
subpm_output_enable();
gpio_free(IMX072_RESET_GPIO);
// [email protected] [TBD]Temporarily block the following code because PM APIs have been changed [START]
#if 1
/* Remove pm constraints */
omap_pm_set_min_bus_tput(vdev->cam->isp, OCP_INITIATOR_AGENT, 0);
//omap_pm_set_max_mpu_wakeup_lat(vdev->cam->isp, -1);
omap_pm_set_max_mpu_wakeup_lat(&qos_request, -1);
#endif
// [email protected] [TBD]Temporarily block the following code because PM APIs have been changed [END]
/* Make sure not to disable the MCLK twice in a row */
if (previous_power == V4L2_POWER_ON)
isp_disable_mclk(isp);
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.09.19] - CAM
isp_disable_mclk(isp);
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.09.19] - CAM
break;
}
/* Save powerstate to know what was before calling POWER_ON. */
previous_power = power;
return err;
}
/*LGE_CHANGE_S*/
static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
int vdd)
{
u32 reg, prog_io;
int ret = 0;
struct omap_mmc_platform_data *mmc = dev->platform_data;
pr_debug("%s %s power_on:%d", __func__, mmc->slots[0].name, power_on);
if (power_on) {
if (mmc->slots[0].internal_clock) {
reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
reg |= OMAP2_MMCSDIO1ADPCLKISEL;
omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
}
reg = omap_ctrl_readl(control_pbias_offset);
/* Set MMC I/O to 52Mhz */
prog_io = omap_ctrl_readl
(OMAP343X_CONTROL_PROG_IO1);
prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL;
omap_ctrl_writel
(prog_io, OMAP343X_CONTROL_PROG_IO1);
reg &= ~OMAP2_PBIASLITEPWRDNZ0;
omap_ctrl_writel(reg, control_pbias_offset);
reg = omap_ctrl_readl(control_pbias_offset);
if ((1 << vdd) <= MMC_VDD_165_195)
reg &= ~OMAP2_PBIASLITEVMODE0;
else
reg |= OMAP2_PBIASLITEVMODE0;
omap_ctrl_writel(reg, control_pbias_offset);
gpio_direction_output(138,1);
#if 0 /* scchoi */
subpm_set_output(LDO1, 1);
subpm_output_enable();
#endif
/* 1ms delay required for PBIAS configuration */
msleep(1);
reg = omap_ctrl_readl(control_pbias_offset);
reg |= (OMAP2_PBIASLITEPWRDNZ0 |
OMAP2_PBIASSPEEDCTRL0);
omap_ctrl_writel(reg, control_pbias_offset);
} else {
reg = omap_ctrl_readl(control_pbias_offset);
reg &= ~OMAP2_PBIASLITEPWRDNZ0;
omap_ctrl_writel(reg, control_pbias_offset);
gpio_direction_output(138,0);
#if 0 /* scchoi */
subpm_set_output(LDO1, 0);
subpm_output_enable();
#endif
/* 100ms delay required for PBIAS configuration */
msleep(10);
reg = omap_ctrl_readl(control_pbias_offset);
reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0
| OMAP2_PBIASLITEVMODE0);
omap_ctrl_writel(reg, control_pbias_offset);
}
return ret;
}
static int imx072_sensor_power_set(struct v4l2_int_device *s, enum v4l2_power power)
{
struct omap34xxcam_videodev *vdev = s->u.slave->master->priv;
struct isp_device *isp = dev_get_drvdata(vdev->cam->isp);
struct isp_csi2_lanes_cfg lanecfg;
struct isp_csi2_phy_cfg phyconfig;
static enum v4l2_power previous_power = V4L2_POWER_OFF;
int err = 0;
switch (power) {
case V4L2_POWER_ON:
/* Power Up Sequence */
printk(KERN_DEBUG "imx072_sensor_power_set(ON)\n");
/*
* Through-put requirement:
* Set max OCP freq for 3630 is 200 MHz through-put
* is in KByte/s so 200000 KHz * 4 = 800000 KByte/s
*/
omap_pm_set_min_bus_tput(vdev->cam->isp,
OCP_INITIATOR_AGENT, 800000);
/* S[, 20120922, [email protected], PM from froyo. */
doing_wakeup = 1;
/* E], 20120922, [email protected], PM from froyo. */
/* Hold a constraint to keep MPU in C1 */
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2012.05.22] - CAM
pm_qos_update_request(&pm_qos_handler,
SET_MPU_CONSTRAINT);
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2012.05.22] - CAM
isp_csi2_reset(&isp->isp_csi2);
lanecfg.clk.pol = IMX072_CSI2_CLOCK_POLARITY;
lanecfg.clk.pos = IMX072_CSI2_CLOCK_LANE;
lanecfg.data[0].pol = IMX072_CSI2_DATA0_POLARITY;
lanecfg.data[0].pos = IMX072_CSI2_DATA0_LANE;
lanecfg.data[1].pol = IMX072_CSI2_DATA1_POLARITY;
lanecfg.data[1].pos = IMX072_CSI2_DATA1_LANE;
lanecfg.data[2].pol = 0;
lanecfg.data[2].pos = 0;
lanecfg.data[3].pol = 0;
lanecfg.data[3].pos = 0;
isp_csi2_complexio_lanes_config(&isp->isp_csi2, &lanecfg);
isp_csi2_complexio_lanes_update(&isp->isp_csi2, true);
isp_csi2_ctrl_config_ecc_enable(&isp->isp_csi2, true);
phyconfig.ths_term = IMX072_CSI2_PHY_THS_TERM;
phyconfig.ths_settle = IMX072_CSI2_PHY_THS_SETTLE;
phyconfig.tclk_term = IMX072_CSI2_PHY_TCLK_TERM;
phyconfig.tclk_miss = IMX072_CSI2_PHY_TCLK_MISS;
phyconfig.tclk_settle = IMX072_CSI2_PHY_TCLK_SETTLE;
isp_csi2_phy_config(&isp->isp_csi2, &phyconfig);
isp_csi2_phy_update(&isp->isp_csi2, true);
isp_configure_interface(vdev->cam->isp, &imx072_if_config);
/* Request and configure gpio pins */
if (gpio_request(IMX072_RESET_GPIO, "imx072_rst") != 0)
return -EIO;
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.07.26] - CAM
//KJK for HDMI Sub PMIC usage 2011.03.10
//extern void lp8720_reinit();
//lp8720_reinit();
//gpio_direction_output(lp8720_pdata.en_gpio_num, 1);
//subpm_lp8720_power_on();
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.07.26] - CAM
subpm_set_output(SWREG,1);
subpm_output_enable();
subpm_set_output(LDO4,1);
subpm_output_enable();
subpm_set_output(LDO3,1);
subpm_output_enable();
twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
VAUX_1_8_V, TWL4030_VAUX4_DEDICATED);
twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
VAUX_DEV_GRP_P1, TWL4030_VAUX4_DEV_GRP);
udelay(100);
/* have to put sensor to reset to guarantee detection */
gpio_direction_output(IMX072_RESET_GPIO, 1);
// gpio_set_value(IMX072_RESET_GPIO, 1);
udelay(100);
// gpio_direction_output(IMX072_RESET_GPIO, 0);
gpio_set_value(IMX072_RESET_GPIO, 0);
udelay(1500);
/* nRESET is active LOW. set HIGH to release reset */
// gpio_direction_output(IMX072_RESET_GPIO, 1);
gpio_set_value(IMX072_RESET_GPIO, 1);
udelay(300);
break;
case V4L2_POWER_OFF:
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.07.26] - CAM
printk(KERN_DEBUG "imx072_sensor_power_set(OFF)\n");
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.07.26] - CAM
subpm_set_output(LDO5,0);
subpm_output_enable();
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.07.26] - CAM
//KJK for HDMI Sub PMIC usage 2011.03.10
//gpio_direction_output(lp8720_pdata.en_gpio_num, 0);
//subpm_lp8720_power_off();
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.07.26] - CAM
gpio_set_value(DW9716_VCM_ENABLE, 0);
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.07.26] - CAM
/* This is not required cuz it is disabled in isp_csi_memvs.c*/
/* isp_disable_mclk(isp); */
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.07.26] - CAM
isp_csi2_complexio_power(&isp->isp_csi2, ISP_CSI2_POWER_OFF);
isp_csi2_reset(&isp->isp_csi2);
isp_csi2_ctrl_config_ecc_enable(&isp->isp_csi2, true);
isp_csi2_complexio_power(&isp->isp_csi2, ISP_CSI2_POWER_OFF);
break;
case V4L2_POWER_STANDBY:
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2011.07.26] - CAM
#ifdef CONFIG_OMAP2_DSS_HDMI
{
extern int hdmi_power_initialize;
int hdmi_wait_cnt = 0;
for(hdmi_wait_cnt = 0; hdmi_wait_cnt<20; hdmi_wait_cnt++)
{
if (hdmi_power_initialize== 0)
{
printk("==========================================================\n");
printk("waiting DONE for HDMI : %d looping \n", hdmi_wait_cnt);
printk("==========================================================\n");
break;
}
printk("==========================================================\n");
printk("HDMI is not done yet...waiting for HDMI DONE : %d looping \n", hdmi_wait_cnt);
printk("==========================================================\n");
msleep(100);
}
}
#endif
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2011.07.26] - CAM
printk(KERN_DEBUG "imx072_sensor_power_set(%s)\n",
(power == V4L2_POWER_OFF) ? "OFF" : "STANDBY");
/* Power Down Sequence */
isp_csi2_complexio_power(&isp->isp_csi2, ISP_CSI2_POWER_OFF);
twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
VAUX_DEV_GRP_NONE, TWL4030_VAUX4_DEV_GRP);
gpio_set_value(IMX072_RESET_GPIO, 0);
udelay(5);
subpm_set_output(LDO3,0);
subpm_output_enable();
subpm_set_output(LDO4,0);
subpm_output_enable();
subpm_set_output(SWREG,0);
subpm_output_enable();
gpio_free(IMX072_RESET_GPIO);
/* S[, 20120922, [email protected], PM from froyo. */
doing_wakeup = 0;
/* E], 20120922, [email protected], PM from froyo. */
/* Remove pm constraints */
//--[[ LGE_UBIQUIX_MODIFIED_START : [email protected] [2012.05.22] - CAM
omap_pm_set_min_bus_tput(vdev->cam->isp, OCP_INITIATOR_AGENT, -1);
pm_qos_update_request(&pm_qos_handler,
CLEAR_MPU_CONSTRAINT);
//--]] LGE_UBIQUIX_MODIFIED_END : [email protected] [2012.05.22] - CAM
break;
}
/* Save powerstate to know what was before calling POWER_ON. */
previous_power = power;
return err;
}