void device_execute_interface::spin_until_time(const attotime &duration)
{
static int timetrig = 0;
// suspend until the given trigger fires
suspend_until_trigger(TRIGGER_SUSPENDTIME + timetrig, true);
// then set a timer for it
m_scheduler->timer_set(duration, FUNC(static_timed_trigger_callback), TRIGGER_SUSPENDTIME + timetrig, this);
timetrig = (timetrig + 1) % 256;
}
void am9517a_device::execute_run()
{
do
{
switch (m_state)
{
case STATE_SI:
set_eop(CLEAR_LINE);
if (!COMMAND_DISABLE)
{
int priority[] = { 0, 1, 2, 3 };
if (COMMAND_ROTATING_PRIORITY)
{
int last_channel = m_last_channel;
for (int channel = 3; channel >= 0; channel--)
{
priority[channel] = last_channel;
last_channel--;
if (last_channel < 0) last_channel = 3;
}
}
for (int channel = 0; channel < 4; channel++)
{
if (is_request_active(priority[channel]) || is_software_request_active(priority[channel]))
{
m_current_channel = m_last_channel = priority[channel];
m_state = STATE_S0;
break;
}
else if (COMMAND_MEM_TO_MEM && BIT(m_request, channel) && ((m_channel[channel].m_mode & 0xc0) == MODE_SINGLE))
{
m_current_channel = m_last_channel = priority[channel];
m_state = STATE_S0;
break;
}
}
}
if(m_state == STATE_SI)
{
suspend_until_trigger(1, true);
m_icount = 0;
}
break;
case STATE_S0:
set_hreq(1);
if (m_hack)
{
m_state = (MODE_MASK == MODE_CASCADE) ? STATE_SC : get_state1(true);
}
else
{
suspend_until_trigger(1, true);
m_icount = 0;
}
break;
case STATE_SC:
if (!is_request_active(m_current_channel))
{
set_hreq(0);
m_current_channel = -1;
m_state = STATE_SI;
}
else
{
suspend_until_trigger(1, true);
m_icount = 0;
}
set_dack();
break;
case STATE_S1:
m_state = STATE_S2;
break;
case STATE_S2:
set_dack();
m_state = COMMAND_COMPRESSED_TIMING ? STATE_S4 : STATE_S3;
break;
case STATE_S3:
dma_read();
if (COMMAND_EXTENDED_WRITE)
{
dma_write();
}
m_state = m_ready ? STATE_S4 : STATE_SW;
break;
case STATE_SW:
m_state = m_ready ? STATE_S4 : STATE_SW;
break;
case STATE_S4:
if (COMMAND_COMPRESSED_TIMING)
{
dma_read();
dma_write();
}
else if (!COMMAND_EXTENDED_WRITE)
{
dma_write();
}
dma_advance();
break;
case STATE_S11:
m_current_channel = 0;
m_state = STATE_S12;
break;
case STATE_S12:
m_state = STATE_S13;
break;
case STATE_S13:
m_state = STATE_S14;
break;
case STATE_S14:
dma_read();
m_state = STATE_S21;
break;
case STATE_S21:
m_current_channel = 1;
m_state = STATE_S22;
break;
case STATE_S22:
m_state = STATE_S23;
break;
case STATE_S23:
m_state = STATE_S24;
break;
case STATE_S24:
dma_write();
dma_advance();
m_current_channel = 0;
m_channel[m_current_channel].m_count--;
if (MODE_ADDRESS_DECREMENT)
{
m_channel[m_current_channel].m_address--;
}
else
{
m_channel[m_current_channel].m_address++;
}
break;
}
m_icount--;
} while (m_icount > 0);
}
void i8257_device::execute_run()
{
do
{
switch (m_state)
{
case STATE_SI:
set_tc(0);
if(next_channel())
m_state = STATE_S0;
else
{
suspend_until_trigger(1, true);
m_icount = 0;
}
break;
case STATE_S0:
set_hreq(1);
if (m_hack)
{
m_state = STATE_S1;
}
else
{
suspend_until_trigger(1, true);
m_icount = 0;
}
break;
case STATE_S1:
set_tc(0);
m_state = STATE_S2;
break;
case STATE_S2:
set_dack();
m_state = STATE_S3;
break;
case STATE_S3:
dma_read();
if (MODE_EXTENDED_WRITE)
{
dma_write();
}
m_state = m_ready ? STATE_S4 : STATE_SW;
break;
case STATE_SW:
m_state = m_ready ? STATE_S4 : STATE_SW;
break;
case STATE_S4:
if (!MODE_EXTENDED_WRITE)
{
dma_write();
}
advance();
if(next_channel())
m_state = STATE_S1;
else
{
set_hreq(0);
m_current_channel = -1;
m_state = STATE_SI;
set_dack();
}
break;
}
m_icount--;
} while (m_icount > 0);
}
