int tegra_cpu_kill(unsigned cpu)
{
cpu = cpu_logical_map(cpu);
/* Clock gate the CPU */
tegra_wait_cpu_in_reset(cpu);
tegra_disable_cpu_clock(cpu);
return 1;
}
int tegra_cpu_kill(unsigned int cpu)
{
cpu = cpu_logical_map(cpu);
tegra_wait_cpu_in_reset(cpu);
tegra_disable_cpu_clock(cpu);
return 1;
}
/*
* platform-specific code to shutdown a CPU
*
* Called with IRQs disabled
*/
void __ref tegra_cpu_die(unsigned int cpu)
{
cpu = cpu_logical_map(cpu);
/* Flush the L1 data cache. */
flush_cache_all();
/* Shut down the current CPU. */
tegra_hotplug_shutdown();
/* Clock gate the CPU */
tegra_wait_cpu_in_reset(cpu);
tegra_disable_cpu_clock(cpu);
/* Should never return here. */
BUG();
}
/*
* platform-specific code to shutdown a CPU
*
* Called with IRQs disabled
*/
void tegra_cpu_die(unsigned int cpu)
{
cpu = cpu_logical_map(cpu);
#ifndef CONFIG_ARCH_TEGRA_2x_SOC
/* Disable GIC CPU interface for this CPU. */
tegra_gic_cpu_disable(false);
#endif
/* Flush the L1 data cache. */
tegra_flush_l1_cache();
/* Shut down the current CPU. */
tegra_hotplug_shutdown();
/* Clock gate the CPU */
tegra_wait_cpu_in_reset(cpu);
tegra_disable_cpu_clock(cpu);
/* Should never return here. */
BUG();
}