void __init tegra_soc_init_dvfs(void)
{
int i;
struct clk *c;
struct dvfs *d;
int process_id;
int ret;
int cpu_process_id = tegra_cpu_process_id();
int core_process_id = tegra_core_process_id();
int speedo_id = tegra_soc_speedo_id();
BUG_ON(speedo_id >= ARRAY_SIZE(cpu_speedo_nominal_millivolts));
tegra2_dvfs_rail_vdd_cpu.nominal_millivolts =
cpu_speedo_nominal_millivolts[speedo_id];
BUG_ON(speedo_id >= ARRAY_SIZE(core_speedo_nominal_millivolts));
tegra2_dvfs_rail_vdd_core.nominal_millivolts =
core_speedo_nominal_millivolts[speedo_id];
tegra2_dvfs_rail_vdd_aon.nominal_millivolts =
core_speedo_nominal_millivolts[speedo_id];
tegra_dvfs_init_rails(tegra2_dvfs_rails, ARRAY_SIZE(tegra2_dvfs_rails));
tegra_dvfs_add_relationships(tegra2_dvfs_relationships,
ARRAY_SIZE(tegra2_dvfs_relationships));
/*
* VDD_CORE must always be at least 50 mV higher than VDD_CPU
* Fill out cpu_core_millivolts based on cpu_millivolts
*/
for (i = 0; i < ARRAY_SIZE(dvfs_init); i++) {
d = &dvfs_init[i];
process_id = strcmp(d->clk_name, "cpu") ?
core_process_id : cpu_process_id;
if ((d->process_id != -1 && d->process_id != process_id) ||
(d->speedo_id != -1 && d->speedo_id != speedo_id)) {
pr_debug("tegra_dvfs: rejected %s speedo %d,"
" process %d\n", d->clk_name, d->speedo_id,
d->process_id);
continue;
}
c = tegra_get_clock_by_name(d->clk_name);
if (!c) {
pr_debug("tegra_dvfs: no clock found for %s\n",
d->clk_name);
continue;
}
ret = tegra_enable_dvfs_on_clk(c, d);
if (ret)
pr_err("tegra_dvfs: failed to enable dvfs on %s\n",
c->name);
}
if (tegra_dvfs_core_disabled)
tegra_dvfs_rail_disable(&tegra2_dvfs_rail_vdd_core);
if (tegra_dvfs_cpu_disabled)
tegra_dvfs_rail_disable(&tegra2_dvfs_rail_vdd_cpu);
}
static void __init dvfs_init_one(struct dvfs *d)
{
struct clk *c;
int ret;
c = tegra_get_clock_by_name(d->clk_name);
if (!c) {
pr_debug("tegra_dvfs: no clock found for %s\n", d->clk_name);
return;
}
ret = tegra_enable_dvfs_on_clk(c, d);
if (ret)
pr_err("tegra_dvfs: failed to enable dvfs on %s\n", c->name);
}
static void __init init_dvfs_one(struct dvfs *d, int nominal_mv_index)
{
int ret;
struct clk *c = tegra_get_clock_by_name(d->clk_name);
if (!c) {
pr_debug("tegra3_dvfs: no clock found for %s\n",
d->clk_name);
return;
}
/*
* Update max rate for auto-dvfs clocks, except EMC.
* EMC is a special case, since EMC dvfs is board dependent: max rate
* and EMC scaling frequencies are determined by tegra BCT (flashed
* together with the image) and board specific EMC DFS table; we will
* check the scaling ladder against nominal core voltage when the table
* is loaded (and if on particular board the table is not loaded, EMC
* scaling is disabled).
*/
if (!(c->flags & PERIPH_EMC_ENB) && d->auto_dvfs) {
BUG_ON(!d->freqs[nominal_mv_index]);
tegra_init_max_rate(
c, d->freqs[nominal_mv_index] * d->freqs_mult);
}
if(!strncmp(d->clk_name,"cpu_g",strlen("cpu_g"))){
d->max_millivolts= d->dvfs_rail->max_millivolts;
printk("max_millivolts of cpu_g is d->max_millivolts =%u\n",d->max_millivolts );
}
else
d->max_millivolts = d->dvfs_rail->nominal_millivolts;
/*
* Check if we may skip enabling dvfs on PLLM. PLLM is a special case,
* since its frequency never exceeds boot rate, and configuration with
* restricted PLLM usage is possible.
*/
if (!(c->flags & PLLM) || is_pllm_dvfs(c, d)) {
ret = tegra_enable_dvfs_on_clk(c, d);
if (ret)
pr_err("tegra3_dvfs: failed to enable dvfs on %s\n",
c->name);
}
}
void __init tegra2_init_dvfs(void)
{
int i;
struct clk *c;
struct dvfs *d;
int ret;
int cpu_process_id = tegra_cpu_process_id();
tegra_dvfs_init_rails(tegra2_dvfs_rails, ARRAY_SIZE(tegra2_dvfs_rails));
tegra_dvfs_add_relationships(tegra2_dvfs_relationships,
ARRAY_SIZE(tegra2_dvfs_relationships));
/*
* VDD_CORE must always be at least 50 mV higher than VDD_CPU
* Fill out cpu_core_millivolts based on cpu_millivolts
*/
for (i = 0; i < ARRAY_SIZE(dvfs_init); i++) {
d = &dvfs_init[i];
if (d->cpu_process_id != -1 &&
d->cpu_process_id != cpu_process_id)
continue;
c = tegra_get_clock_by_name(d->clk_name);
if (!c) {
pr_debug("tegra_dvfs: no clock found for %s\n",
d->clk_name);
continue;
}
ret = tegra_enable_dvfs_on_clk(c, d);
if (ret)
pr_err("tegra_dvfs: failed to enable dvfs on %s\n",
c->name);
}
if (tegra_dvfs_core_disabled)
tegra_dvfs_rail_disable(&tegra2_dvfs_rail_vdd_core);
if (tegra_dvfs_cpu_disabled)
tegra_dvfs_rail_disable(&tegra2_dvfs_rail_vdd_cpu);
}
static void __init init_dvfs_one(struct dvfs *d, int nominal_mv_index)
{
int ret;
struct clk *c = tegra_get_clock_by_name(d->clk_name);
if (!c) {
pr_debug("tegra3_dvfs: no clock found for %s\n",
d->clk_name);
return;
}
if (d->auto_dvfs) {
/* Update max rate for auto-dvfs clocks */
BUG_ON(!d->freqs[nominal_mv_index]);
tegra_init_max_rate(
c, d->freqs[nominal_mv_index] * d->freqs_mult);
}
d->max_millivolts = d->dvfs_rail->nominal_millivolts;
ret = tegra_enable_dvfs_on_clk(c, d);
if (ret)
pr_err("tegra3_dvfs: failed to enable dvfs on %s\n",
c->name);
}
