int __init tegranote7c_pinmux_init(void) { tegranote7c_gpio_init_configure(); tegra_drive_pinmux_config_table(tegranote7c_drive_pinmux, ARRAY_SIZE(tegranote7c_drive_pinmux)); tegra_pinmux_config_table(tegranote7c_pinmux_common, ARRAY_SIZE(tegranote7c_pinmux_common)); tegra_pinmux_config_table(tegranote7c_unused_pins_lowpower, ARRAY_SIZE(tegranote7c_unused_pins_lowpower)); tegra_pinmux_config_table(manual_config_pinmux, ARRAY_SIZE(manual_config_pinmux)); if (get_tegra_uart_debug_port_id() == UART_FROM_SDCARD) tegra_pinmux_config_table(e2542_uart_config_pinmux, ARRAY_SIZE(e2542_uart_config_pinmux)); #ifdef CONFIG_PM_SLEEP tegra11x_set_sleep_pinmux(tegranote7c_sleep_pinmux, ARRAY_SIZE(tegranote7c_sleep_pinmux)); tegra11x_set_sleep_gpio(tegranote7c_sleep_gpio, ARRAY_SIZE(tegranote7c_sleep_gpio)); #endif return 0; }
static int pluto_imx091_power_on(struct nvc_regulator *vreg) { int err; if (unlikely(WARN_ON(!vreg))) return -EFAULT; if (pluto_get_extra_regulators()) goto imx091_poweron_fail; gpio_set_value(CAM1_POWER_DWN_GPIO, 0); usleep_range(10, 20); err = regulator_enable(vreg[IMX091_VREG_AVDD].vreg); if (unlikely(err)) goto imx091_avdd_fail; err = regulator_enable(vreg[IMX091_VREG_DVDD].vreg); if (unlikely(err)) goto imx091_dvdd_fail; err = regulator_enable(vreg[IMX091_VREG_IOVDD].vreg); if (unlikely(err)) goto imx091_iovdd_fail; usleep_range(1, 2); gpio_set_value(CAM1_POWER_DWN_GPIO, 1); tegra_pinmux_config_table(&mclk_enable, 1); err = regulator_enable(pluto_i2cvdd); if (unlikely(err)) goto imx091_i2c_fail; err = regulator_enable(pluto_vcmvdd); if (unlikely(err)) goto imx091_vcm_fail; usleep_range(300, 310); return 1; imx091_vcm_fail: regulator_disable(pluto_i2cvdd); imx091_i2c_fail: tegra_pinmux_config_table(&mclk_disable, 1); gpio_set_value(CAM1_POWER_DWN_GPIO, 0); regulator_disable(vreg[IMX091_VREG_IOVDD].vreg); imx091_iovdd_fail: regulator_disable(vreg[IMX091_VREG_DVDD].vreg); imx091_dvdd_fail: regulator_disable(vreg[IMX091_VREG_AVDD].vreg); imx091_avdd_fail: imx091_poweron_fail: pr_err("%s FAILED\n", __func__); return -ENODEV; }
static int pluto_imx132_power_on(struct imx132_power_rail *pw) { int err; if (unlikely(WARN_ON(!pw || !pw->avdd || !pw->iovdd || !pw->dvdd))) return -EFAULT; if (pluto_get_extra_regulators()) goto pluto_imx132_poweron_fail; gpio_set_value(CAM2_POWER_DWN_GPIO, 0); tegra_pinmux_config_table(&pbb0_enable, 1); err = regulator_enable(pluto_i2cvdd); if (unlikely(err)) goto imx132_i2c_fail; err = regulator_enable(pluto_vcmvdd); if (unlikely(err)) goto imx132_vcm_fail; err = regulator_enable(pw->avdd); if (unlikely(err)) goto imx132_avdd_fail; err = regulator_enable(pw->dvdd); if (unlikely(err)) goto imx132_dvdd_fail; err = regulator_enable(pw->iovdd); if (unlikely(err)) goto imx132_iovdd_fail; usleep_range(1, 2); gpio_set_value(CAM2_POWER_DWN_GPIO, 1); return 0; imx132_iovdd_fail: regulator_disable(pw->dvdd); imx132_dvdd_fail: regulator_disable(pw->avdd); imx132_avdd_fail: regulator_disable(pluto_vcmvdd); imx132_vcm_fail: regulator_disable(pluto_i2cvdd); imx132_i2c_fail: tegra_pinmux_config_table(&pbb0_disable, 1); pluto_imx132_poweron_fail: pr_err("%s failed.\n", __func__); return -ENODEV; }
static int macallan_camera_init(void) { tegra_pinmux_config_table(&mclk_disable, 1); tegra_pinmux_config_table(&pbb0_disable, 1); i2c_register_board_info(2, macallan_i2c_board_info_e1625, ARRAY_SIZE(macallan_i2c_board_info_e1625)); return 0; }
static int keenhi_t40_camera_init(void) { tegra_pinmux_config_table(&mclk_disable, 1); tegra_pinmux_config_table(&pbb0_disable, 1); camera_gpio_init(); i2c_register_board_info(2, keenhi_t40_camera_i2c_board_info, ARRAY_SIZE(keenhi_t40_camera_i2c_board_info)); return 0; }
static int pluto_camera_init(void) { pr_debug("%s: ++\n", __func__); tegra_pinmux_config_table(&mclk_disable, 1); tegra_pinmux_config_table(&pbb0_disable, 1); i2c_register_board_info(2, pluto_i2c_board_info_e1625, ARRAY_SIZE(pluto_i2c_board_info_e1625)); return 0; }
int __init endeavoru_pinmux_init(void) { tegra_pinmux_config_table(endeavoru_pinmux_common, ARRAY_SIZE(endeavoru_pinmux_common)); tegra_drive_pinmux_config_table(endeavoru_drive_pinmux, ARRAY_SIZE(endeavoru_drive_pinmux)); tegra_pinmux_config_table(endeavoru_pinmux_EVT_XE, ARRAY_SIZE(endeavoru_pinmux_EVT_XE)); return 0; }
static int tegratab_camera_init(void) { #ifndef CONFIG_USE_OF tegra_pinmux_config_table(&mclk_disable, 1); #endif tegra_pinmux_config_table(&pbb0_disable, 1); i2c_register_board_info(2, tegratab_i2c_board_info_e1599, ARRAY_SIZE(tegratab_i2c_board_info_e1599)); return 0; }
int __init endeavoru_pinmux_init(void) { platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); tegra_pinmux_config_table(endeavoru_pinmux_common, ARRAY_SIZE(endeavoru_pinmux_common)); tegra_drive_pinmux_config_table(endeavoru_drive_pinmux, ARRAY_SIZE(endeavoru_drive_pinmux)); tegra_pinmux_config_table(endeavoru_pinmux_EVT_XE, ARRAY_SIZE(endeavoru_pinmux_EVT_XE)); return 0; }
int __init enterprise_pinmux_init(void) { tegra_pinmux_config_table(enterprise_pinmux, ARRAY_SIZE(enterprise_pinmux)); tegra_drive_pinmux_config_table(enterprise_drive_pinmux, ARRAY_SIZE(enterprise_drive_pinmux)); tegra_pinmux_config_table(enterprise_unused_pinmux, ARRAY_SIZE(enterprise_unused_pinmux)); enterprise_set_unused_pin_gpio(enterprise_unused_gpio_pins, ARRAY_SIZE(enterprise_unused_gpio_pins)); return 0; }
int __init dalmore_pinmux_init(void) { tegra_pinmux_config_table(dalmore_pinmux_set_nontristate, ARRAY_SIZE(dalmore_pinmux_set_nontristate)); dalmore_gpio_init_configure(); tegra_pinmux_config_table(dalmore_pinmux_common, ARRAY_SIZE(dalmore_pinmux_common)); tegra_drive_pinmux_config_table(dalmore_drive_pinmux, ARRAY_SIZE(dalmore_drive_pinmux)); tegra_pinmux_config_table(unused_pins_lowpower, ARRAY_SIZE(unused_pins_lowpower)); return 0; }
int __init tegratab_pinmux_init(void) { tegratab_gpio_init_configure(); tegra_pinmux_config_table(tegratab_pinmux_common, ARRAY_SIZE(tegratab_pinmux_common)); tegra_drive_pinmux_config_table(tegratab_drive_pinmux, ARRAY_SIZE(tegratab_drive_pinmux)); tegra_pinmux_config_table(unused_pins_lowpower, ARRAY_SIZE(unused_pins_lowpower)); tegra_pinmux_config_table(manual_config_pinmux, ARRAY_SIZE(manual_config_pinmux)); return 0; }
static int tegratab_mt9m114_power_on(struct mt9m114_power_rail *pw) { int err; pr_err("%s: exe.\n",__func__); if (unlikely(!pw || !pw->avdd || !pw->iovdd)) return -EFAULT; gpio_set_value(CAM_RSTN, 0); usleep_range(1000, 1020); pr_err("%s: exe 2.\n",__func__); err = regulator_enable(pw->iovdd); if (unlikely(err)) goto mt9m114_iovdd_fail; usleep_range(300, 320); err = regulator_enable(pw->avdd); if (unlikely(err)) goto mt9m114_avdd_fail; usleep_range(1000, 1020); gpio_set_value(CAM_RSTN, 1); usleep_range(1000, 1020); tegra_pinmux_config_table(&pbb0_enable, 1); usleep_range(200, 220); return 1; mt9m114_avdd_fail: regulator_disable(pw->iovdd); mt9m114_iovdd_fail: gpio_set_value(CAM_RSTN, 0); return -ENODEV; }
static int tegratab_ov7695_power_on(struct ov7695_power_rail *pw) { int err; if (unlikely(!pw || !pw->avdd || !pw->iovdd)) return -EFAULT; gpio_set_value(CAM2_POWER_DWN_GPIO, 0); usleep_range(1000, 1020); err = regulator_enable(pw->iovdd); if (unlikely(err)) goto ov7695_iovdd_fail; usleep_range(300, 320); err = regulator_enable(pw->avdd); if (unlikely(err)) goto ov7695_avdd_fail; usleep_range(1000, 1020); gpio_set_value(CAM2_POWER_DWN_GPIO, 1); usleep_range(1000, 1020); tegra_pinmux_config_table(&pbb0_enable, 1); usleep_range(200, 220); return 0; ov7695_avdd_fail: regulator_disable(pw->iovdd); ov7695_iovdd_fail: gpio_set_value(CAM_RSTN, 0); return -ENODEV; }
int __init x3_pinmux_init(void) { tegra_pinmux_config_table(x3_pinmux, ARRAY_SIZE(x3_pinmux)); tegra_drive_pinmux_config_table(x3_drive_pinmux, ARRAY_SIZE(x3_drive_pinmux)); return 0; }
static void __init asymptote_i2c_register_devices(void) { tegra_pinmux_config_table(mxt_pinmux_config, ARRAY_SIZE(mxt_pinmux_config)); gpio_request(ASYMPTOTE_GPIO_MXT_RST, "TSP_LDO_ON"); tegra_gpio_enable(ASYMPTOTE_GPIO_MXT_RST); gpio_direction_output(ASYMPTOTE_GPIO_MXT_RST, 1); gpio_export(ASYMPTOTE_GPIO_MXT_RST, 0); gpio_request(ASYMPTOTE_GPIO_MXT_SLEEP, "TSP_SLEEP"); tegra_gpio_enable(ASYMPTOTE_GPIO_MXT_SLEEP); gpio_direction_output(ASYMPTOTE_GPIO_MXT_SLEEP, 0); gpio_export(ASYMPTOTE_GPIO_MXT_SLEEP, 0); gpio_request(TEGRA_GPIO_MXT_IRQ, "TSP_INT"); tegra_gpio_enable(TEGRA_GPIO_MXT_IRQ); gpio_direction_input(TEGRA_GPIO_MXT_IRQ); gpio_request(TEGRA_GPIO_MPU3050_IRQ, "mpu_int"); gpio_direction_input(TEGRA_GPIO_MPU3050_IRQ); gpio_request(TEGRA_GPIO_NCT1008_THERM2_IRQ, "temp_alert"); gpio_direction_input(TEGRA_GPIO_NCT1008_THERM2_IRQ); gpio_request(TEGRA_GPIO_ISL29018_IRQ, "tsl2563"); gpio_direction_input(ASYMPTOTE_GPIO_TSL2563_IRQ); i2c_register_board_info(0, &wm8903_device, 1); i2c_register_board_info(0, &mpu3050_device, 1); i2c_register_board_info(0, &tsl2563_device, 1); i2c_register_board_info(2, &bq20z75_device, 1); i2c_register_board_info(3, &asymptote_mxt_device, 1); i2c_register_board_info(4, &adt7461_device, 1); }
static void __init seaboard_i2c_register_devices(void) { tegra_pinmux_config_table(mxt_pinmux_config, ARRAY_SIZE(mxt_pinmux_config)); gpio_request(SEABOARD_GPIO_MXT_RST, "TSP_LDO_ON"); tegra_gpio_enable(SEABOARD_GPIO_MXT_RST); gpio_direction_output(SEABOARD_GPIO_MXT_RST, 1); gpio_export(SEABOARD_GPIO_MXT_RST, 0); gpio_request(TEGRA_GPIO_MXT_IRQ, "TSP_INT"); tegra_gpio_enable(TEGRA_GPIO_MXT_IRQ); gpio_direction_input(TEGRA_GPIO_MXT_IRQ); gpio_request(TEGRA_GPIO_MPU3050_IRQ, "mpu_int"); gpio_direction_input(TEGRA_GPIO_MPU3050_IRQ); gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018"); gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ); gpio_request(TEGRA_GPIO_NCT1008_THERM2_IRQ, "temp_alert"); gpio_direction_input(TEGRA_GPIO_NCT1008_THERM2_IRQ); i2c_register_board_info(0, &wm8903_device, 1); i2c_register_board_info(0, &isl29018_device, 1); i2c_register_board_info(0, &seaboard_mxt_device, 1); i2c_register_board_info(0, &mpu3050_device, 1); i2c_register_board_info(2, &bq20z75_device, 1); i2c_register_board_info(4, &adt7461_device, 1); i2c_register_board_info(4, &ak8975_device, 1); }
int __init whistler_baseband_init(void) { tegra_pinmux_config_table(whistler_null_ulpi_pinmux, ARRAY_SIZE(whistler_null_ulpi_pinmux)); platform_device_register(&icera_baseband_device); return 0; }
static int macallan_imx091_power_on(struct nvc_regulator *vreg) { int err; if (unlikely(WARN_ON(!vreg))) return -EFAULT; gpio_set_value(CAM1_POWER_DWN_GPIO, 0); usleep_range(10, 20); err = regulator_enable(vreg[IMX091_VREG_AVDD].vreg); if (err) goto imx091_avdd_fail; err = regulator_enable(vreg[IMX091_VREG_IOVDD].vreg); if (err) goto imx091_iovdd_fail; usleep_range(1, 2); gpio_set_value(CAM1_POWER_DWN_GPIO, 1); tegra_pinmux_config_table(&mclk_enable, 1); usleep_range(300, 310); return 1; imx091_iovdd_fail: regulator_disable(vreg[IMX091_VREG_AVDD].vreg); imx091_avdd_fail: gpio_set_value(CAM1_POWER_DWN_GPIO, 0); pr_err("%s FAILED\n", __func__); return -ENODEV; }
void __init adam_pinmux_init(void) { tegra_pinmux_config_table(adam_pinmux, ARRAY_SIZE(adam_pinmux)); tegra_drive_pinmux_config_table(adam_drive_pinmux, ARRAY_SIZE(adam_drive_pinmux)); tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); }
void __init olympus_pinmux_init(void) { tegra_pinmux_config_table(stingray_pinmux, ARRAY_SIZE(stingray_pinmux)); tegra_drive_pinmux_config_table(stingray_drive_pinmux, ARRAY_SIZE(stingray_drive_pinmux)); }
static int kai_mt9p111_power_off(void) { pr_err("%s:==========>EXE\n",__func__); gpio_set_value(MT9P111_POWER_RST_PIN, 0); msleep(5); if (keenhi_t40_vcmvdd){ regulator_disable(keenhi_t40_vcmvdd); regulator_put(keenhi_t40_vcmvdd); keenhi_t40_vcmvdd =NULL; } if (macallan_2v8_cam1){ regulator_disable(macallan_2v8_cam1); regulator_put(macallan_2v8_cam1); macallan_2v8_cam1 =NULL; } tegra_pinmux_config_table(&mclk_disable, 1); if (macallan_1v8_cam1){ regulator_disable(macallan_1v8_cam1); regulator_put(macallan_1v8_cam1); macallan_1v8_cam1 =NULL; } gpio_set_value(MT9P111_POWER_DWN_PIN, 1); return 0; }
void __init seaboard_pinmux_init(void) { /* * PINGROUP_SPIC contains two pins: * + PX2, DISABLE_CHRGR (output) * + PX3, WM8903 codec IRQ (input) * * The pinmux module can only configure TRISTATE vs. NORMAL on a * per-group rather than per-pin basis. The group must be NORMAL * since at least one pin is an output. However, we must ensure that * the WM8903 IRQ is never driven, since the WM8903 itself is driving * it, and we don't want multiple drivers. To ensure this, configure * PX3 as a GPIO here, and set is as an input, before the pinmux table * is written, which is when the pins will be un-tristated. */ tegra_gpio_enable(TEGRA_GPIO_WM8903_IRQ); gpio_request(TEGRA_GPIO_WM8903_IRQ, "wm8903"); gpio_direction_input(TEGRA_GPIO_WM8903_IRQ); /* Ensure the reset line stays high. */ gpio_request(TEGRA_GPIO_RESET, "reset"); gpio_direction_output(TEGRA_GPIO_RESET, 1); tegra_gpio_enable(TEGRA_GPIO_RESET); tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); tegra_drive_pinmux_config_table(seaboard_drive_pinmux, ARRAY_SIZE(seaboard_drive_pinmux)); tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); }
static int tegratab_ov5693_power_on(struct ov5693_power_rail *pw) { int err; if (unlikely(!pw || !pw->avdd || !pw->dovdd)) return -EFAULT; if (tegratab_get_vcmvdd()) goto ov5693_poweron_fail; gpio_set_value(CAM1_POWER_DWN_GPIO, 0); usleep_range(10, 20); err = regulator_enable(pw->avdd); if (err) goto ov5693_avdd_fail; err = regulator_enable(pw->dovdd); if (err) goto ov5693_iovdd_fail; usleep_range(1, 2); gpio_set_value(CAM1_POWER_DWN_GPIO, 1); err = regulator_enable(tegratab_vcmvdd); if (unlikely(err)) goto ov5693_vcmvdd_fail; tegra_pinmux_config_table(&mclk_enable, 1); usleep_range(300, 310); return 0; ov5693_vcmvdd_fail: regulator_disable(pw->dovdd); ov5693_iovdd_fail: regulator_disable(pw->avdd); ov5693_avdd_fail: gpio_set_value(CAM1_POWER_DWN_GPIO, 0); ov5693_poweron_fail: pr_err("%s FAILED\n", __func__); return -ENODEV; }
void __init shuttle_pinmux_init(void) { tegra_pinmux_config_table(shuttle_pinmux, ARRAY_SIZE(shuttle_pinmux)); tegra_drive_pinmux_config_table(shuttle_drive_pinmux, ARRAY_SIZE(shuttle_drive_pinmux)); tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); }
void __init dolak_pinmux_init(void) { tegra14x_default_pinmux(); tegra_pinmux_config_table(dolak_pinmux, ARRAY_SIZE(dolak_pinmux)); tegra_drive_pinmux_config_table(dolak_drive_pinmux, ARRAY_SIZE(dolak_drive_pinmux)); }
void __init harmony_pinmux_init(void) { tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); tegra_drive_pinmux_config_table(harmony_drive_pinmux, ARRAY_SIZE(harmony_drive_pinmux)); tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); }
int __init n1_pinmux_init(void) { tegra_pinmux_config_table(n1_pinmux, ARRAY_SIZE(n1_pinmux)); tegra_drive_pinmux_config_table(n1_drive_pinmux, ARRAY_SIZE(n1_drive_pinmux)); tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); return 0; }
int __init grouper_pinmux_init(void) { struct board_info board_info; tegra_get_board_info(&board_info); BUG_ON(board_info.board_id != BOARD_E1565); grouper_gpio_init_configure(); tegra_pinmux_config_table(grouper_pinmux_common, ARRAY_SIZE(grouper_pinmux_common)); tegra_drive_pinmux_config_table(grouper_drive_pinmux, ARRAY_SIZE(grouper_drive_pinmux)); tegra_pinmux_config_table(unused_pins_lowpower, ARRAY_SIZE(unused_pins_lowpower)); grouper_pinmux_audio_init(); return 0; }
int __init p1852_pinmux_init(void) { tegra_pinmux_config_table(p1852_pinmux_common, ARRAY_SIZE(p1852_pinmux_common)); tegra_drive_pinmux_config_table(p1852_drive_pinmux, ARRAY_SIZE(p1852_drive_pinmux)); return 0; }