/* Reset ide card, set up handlers */ void ti99_ide_init(int in_tms9995_mode) { rtc65271_init(memory_region(region_dsr) + offset_ide_ram2, clk_interrupt_callback); ti99_ide_RAM = memory_region(region_dsr) + offset_ide_ram; ti99_peb_set_card_handlers(0x1000, & ide_handlers); cur_page = 0; sram_enable = 0; cru_register = 0; tms9995_mode = in_tms9995_mode; }
/* Reset hsgpl card, set up handlers */ void ti99_hsgpl_init(void) { hsgpl.GRAM_ptr = memory_region(region_hsgpl) + offset_hsgpl_gram; hsgpl.RAM6_ptr = memory_region(region_hsgpl) + offset_hsgpl_ram6; hsgpl.addr = 0; hsgpl.raddr_LSB = 0; hsgpl.waddr_LSB = 0; hsgpl.cur_port = 0; hsgpl.cur_bank = 0; hsgpl.cru_reg = 0; set_hsgpl_crdena(/*0*/1); at29c040a_init_data_ptr(feeprom_grom0, memory_region(region_hsgpl) + offset_hsgpl_grom); at29c040a_init(feeprom_grom0); at29c040a_init_data_ptr(feeprom_grom1, memory_region(region_hsgpl) + offset_hsgpl_grom + 0x80000); at29c040a_init(feeprom_grom1); at29c040a_init_data_ptr(feeprom_rom6, memory_region(region_hsgpl) + offset_hsgpl_rom6); at29c040a_init(feeprom_rom6); at29c040a_init_data_ptr(feeprom_dsr, memory_region(region_hsgpl) + offset_hsgpl_dsr); at29c040a_init(feeprom_dsr); ti99_peb_set_card_handlers(0x1b00, & hsgpl_handlers); }