static int
tulip_open(/*RTnet*/struct rtnet_device *rtdev)
{
struct tulip_private *tp = (struct tulip_private *)rtdev->priv;
int retval;
if ((retval = /*RTnet*/rtdm_irq_request(&tp->irq_handle, rtdev->irq,
tulip_interrupt, 0, "rt_tulip",
rtdev))) {
printk("%s: Unable to install ISR for IRQ %d\n",
rtdev->name,rtdev->irq);
return retval;
}
rt_stack_connect(rtdev, &STACK_manager);
tulip_init_ring (rtdev);
tulip_up (rtdev);
rtnetif_start_queue (rtdev);
return 0;
}
static int
tulip_open(struct device *dev)
{
struct tulip_private *tp = (struct tulip_private *)dev->priv;
int ioaddr = dev->base_addr;
/* Reset the chip, holding bit 0 set at least 10 PCI cycles. */
outl(0xfff80001, ioaddr + CSR0);
SLOW_DOWN_IO;
/* Deassert reset. Set 8 longword cache alignment, 8 longword burst.
Cache alignment bits 15:14 Burst length 13:8
0000 No alignment 0x00000000 unlimited 0800 8 longwords
4000 8 longwords 0100 1 longword 1000 16 longwords
8000 16 longwords 0200 2 longwords 2000 32 longwords
C000 32 longwords 0400 4 longwords
Wait the specified 50 PCI cycles after a reset by initializing
Tx and Rx queues and the address filter list. */
outl(0xfff84800, ioaddr + CSR0);
if (irq2dev_map[dev->irq] != NULL
|| (irq2dev_map[dev->irq] = dev) == NULL
|| dev->irq == 0
|| request_irq(dev->irq, &tulip_interrupt, 0, "DEC 21040 Tulip")) {
return -EAGAIN;
}
if (tulip_debug > 1)
printk("%s: tulip_open() irq %d.\n", dev->name, dev->irq);
tulip_init_ring(dev);
/* Fill the whole address filter table with our physical address. */
{
unsigned short *eaddrs = (unsigned short *)dev->dev_addr;
int *setup_frm = tp->setup_frame, i;
/* You must add the broadcast address when doing perfect filtering! */
*setup_frm++ = 0xffff;
*setup_frm++ = 0xffff;
*setup_frm++ = 0xffff;
/* Fill the rest of the accept table with our physical address. */
for (i = 1; i < 16; i++) {
*setup_frm++ = eaddrs[0];
*setup_frm++ = eaddrs[1];
*setup_frm++ = eaddrs[2];
}
/* Put the setup frame on the Tx list. */
tp->tx_ring[0].length = 0x08000000 | 192;
tp->tx_ring[0].buffer1 = (char *)tp->setup_frame;
tp->tx_ring[0].buffer2 = 0;
tp->tx_ring[0].status = 0x80000000;
tp->cur_tx++, tp->dirty_tx++;
}
outl((int)tp->rx_ring, ioaddr + CSR3);
outl((int)tp->tx_ring, ioaddr + CSR4);
/* Turn on the xcvr interface. */
outl(0x00000000, ioaddr + CSR13);
outl(0x00000004, ioaddr + CSR13);
/* Start the chip's Tx and Rx processes. */
outl(0xfffe2002, ioaddr + CSR6);
/* Trigger an immediate transmit demand to process the setup frame. */
outl(0, ioaddr + CSR1);
dev->tbusy = 0;
dev->interrupt = 0;
dev->start = 1;
/* Enable interrupts by setting the interrupt mask. */
outl(0xFFFFFFFF, ioaddr + CSR7);
if (tulip_debug > 2) {
printk("%s: Done tulip_open(), CSR0 %8.8x, CSR13 %8.8x.\n",
dev->name, inl(ioaddr + CSR0), inl(ioaddr + CSR13));
}
return 0;
}
